1
2
3
4
5
6#include <linux/clk.h>
7#include <linux/err.h>
8#include <linux/io.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/platform_device.h>
12#include <linux/pwm.h>
13
14#define PWM_CONTROL 0x000
15#define PWM_CONTROL_SHIFT(x) ((x) * 8)
16#define PWM_CONTROL_MASK 0xff
17#define PWM_MODE 0x80
18#define PWM_ENABLE (1 << 0)
19#define PWM_POLARITY (1 << 4)
20
21#define PERIOD(x) (((x) * 0x10) + 0x10)
22#define DUTY(x) (((x) * 0x10) + 0x14)
23
24#define MIN_PERIOD 108
25
26struct bcm2835_pwm {
27 struct pwm_chip chip;
28 struct device *dev;
29 void __iomem *base;
30 struct clk *clk;
31};
32
33static inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip)
34{
35 return container_of(chip, struct bcm2835_pwm, chip);
36}
37
38static int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
39{
40 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
41 u32 value;
42
43 value = readl(pc->base + PWM_CONTROL);
44 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
45 value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm));
46 writel(value, pc->base + PWM_CONTROL);
47
48 return 0;
49}
50
51static void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
52{
53 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
54 u32 value;
55
56 value = readl(pc->base + PWM_CONTROL);
57 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
58 writel(value, pc->base + PWM_CONTROL);
59}
60
61static int bcm2835_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
62 int duty_ns, int period_ns)
63{
64 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
65 unsigned long rate = clk_get_rate(pc->clk);
66 unsigned long scaler;
67
68 if (!rate) {
69 dev_err(pc->dev, "failed to get clock rate\n");
70 return -EINVAL;
71 }
72
73 scaler = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate);
74
75 if (period_ns <= MIN_PERIOD) {
76 dev_err(pc->dev, "period %d not supported, minimum %d\n",
77 period_ns, MIN_PERIOD);
78 return -EINVAL;
79 }
80
81 writel(DIV_ROUND_CLOSEST(duty_ns, scaler),
82 pc->base + DUTY(pwm->hwpwm));
83 writel(DIV_ROUND_CLOSEST(period_ns, scaler),
84 pc->base + PERIOD(pwm->hwpwm));
85
86 return 0;
87}
88
89static int bcm2835_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
90{
91 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
92 u32 value;
93
94 value = readl(pc->base + PWM_CONTROL);
95 value |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm);
96 writel(value, pc->base + PWM_CONTROL);
97
98 return 0;
99}
100
101static void bcm2835_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
102{
103 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
104 u32 value;
105
106 value = readl(pc->base + PWM_CONTROL);
107 value &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm));
108 writel(value, pc->base + PWM_CONTROL);
109}
110
111static int bcm2835_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
112 enum pwm_polarity polarity)
113{
114 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
115 u32 value;
116
117 value = readl(pc->base + PWM_CONTROL);
118
119 if (polarity == PWM_POLARITY_NORMAL)
120 value &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm));
121 else
122 value |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm);
123
124 writel(value, pc->base + PWM_CONTROL);
125
126 return 0;
127}
128
129static const struct pwm_ops bcm2835_pwm_ops = {
130 .request = bcm2835_pwm_request,
131 .free = bcm2835_pwm_free,
132 .config = bcm2835_pwm_config,
133 .enable = bcm2835_pwm_enable,
134 .disable = bcm2835_pwm_disable,
135 .set_polarity = bcm2835_set_polarity,
136 .owner = THIS_MODULE,
137};
138
139static int bcm2835_pwm_probe(struct platform_device *pdev)
140{
141 struct bcm2835_pwm *pc;
142 struct resource *res;
143 int ret;
144
145 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
146 if (!pc)
147 return -ENOMEM;
148
149 pc->dev = &pdev->dev;
150
151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
152 pc->base = devm_ioremap_resource(&pdev->dev, res);
153 if (IS_ERR(pc->base))
154 return PTR_ERR(pc->base);
155
156 pc->clk = devm_clk_get(&pdev->dev, NULL);
157 if (IS_ERR(pc->clk)) {
158 dev_err(&pdev->dev, "clock not found: %ld\n", PTR_ERR(pc->clk));
159 return PTR_ERR(pc->clk);
160 }
161
162 ret = clk_prepare_enable(pc->clk);
163 if (ret)
164 return ret;
165
166 pc->chip.dev = &pdev->dev;
167 pc->chip.ops = &bcm2835_pwm_ops;
168 pc->chip.npwm = 2;
169 pc->chip.of_xlate = of_pwm_xlate_with_flags;
170 pc->chip.of_pwm_n_cells = 3;
171
172 platform_set_drvdata(pdev, pc);
173
174 ret = pwmchip_add(&pc->chip);
175 if (ret < 0)
176 goto add_fail;
177
178 return 0;
179
180add_fail:
181 clk_disable_unprepare(pc->clk);
182 return ret;
183}
184
185static int bcm2835_pwm_remove(struct platform_device *pdev)
186{
187 struct bcm2835_pwm *pc = platform_get_drvdata(pdev);
188
189 clk_disable_unprepare(pc->clk);
190
191 return pwmchip_remove(&pc->chip);
192}
193
194static const struct of_device_id bcm2835_pwm_of_match[] = {
195 { .compatible = "brcm,bcm2835-pwm", },
196 { }
197};
198MODULE_DEVICE_TABLE(of, bcm2835_pwm_of_match);
199
200static struct platform_driver bcm2835_pwm_driver = {
201 .driver = {
202 .name = "bcm2835-pwm",
203 .of_match_table = bcm2835_pwm_of_match,
204 },
205 .probe = bcm2835_pwm_probe,
206 .remove = bcm2835_pwm_remove,
207};
208module_platform_driver(bcm2835_pwm_driver);
209
210MODULE_AUTHOR("Bart Tanghe <bart.tanghe@thomasmore.be>");
211MODULE_DESCRIPTION("Broadcom BCM2835 PWM driver");
212MODULE_LICENSE("GPL v2");
213
