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11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
19#include <linux/slab.h>
20#include <linux/gpio.h>
21#include <linux/mfd/tps65910.h>
22#include <linux/regulator/of_regulator.h>
23
24#define TPS65910_SUPPLY_STATE_ENABLED 0x1
25#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
26 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
27 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
28 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
29
30
31static const unsigned int VIO_VSEL_table[] = {
32 1500000, 1800000, 2500000, 3300000,
33};
34
35
36
37
38static const unsigned int VRTC_VSEL_table[] = {
39 1800000,
40};
41
42
43static const unsigned int VDD3_VSEL_table[] = {
44 5000000,
45};
46
47
48static const unsigned int VDIG1_VSEL_table[] = {
49 1200000, 1500000, 1800000, 2700000,
50};
51
52
53static const unsigned int VDIG2_VSEL_table[] = {
54 1000000, 1100000, 1200000, 1800000,
55};
56
57
58static const unsigned int VPLL_VSEL_table[] = {
59 1000000, 1100000, 1800000, 2500000,
60};
61
62
63static const unsigned int VDAC_VSEL_table[] = {
64 1800000, 2600000, 2800000, 2850000,
65};
66
67
68static const unsigned int VAUX1_VSEL_table[] = {
69 1800000, 2500000, 2800000, 2850000,
70};
71
72
73static const unsigned int VAUX2_VSEL_table[] = {
74 1800000, 2800000, 2900000, 3300000,
75};
76
77
78static const unsigned int VAUX33_VSEL_table[] = {
79 1800000, 2000000, 2800000, 3300000,
80};
81
82
83static const unsigned int VMMC_VSEL_table[] = {
84 1800000, 2800000, 3000000, 3300000,
85};
86
87
88static const unsigned int VBB_VSEL_table[] = {
89 3000000, 2520000, 3150000, 5000000,
90};
91
92struct tps_info {
93 const char *name;
94 const char *vin_name;
95 u8 n_voltages;
96 const unsigned int *voltage_table;
97 int enable_time_us;
98};
99
100static struct tps_info tps65910_regs[] = {
101 {
102 .name = "vrtc",
103 .vin_name = "vcc7",
104 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
105 .voltage_table = VRTC_VSEL_table,
106 .enable_time_us = 2200,
107 },
108 {
109 .name = "vio",
110 .vin_name = "vccio",
111 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
112 .voltage_table = VIO_VSEL_table,
113 .enable_time_us = 350,
114 },
115 {
116 .name = "vdd1",
117 .vin_name = "vcc1",
118 .enable_time_us = 350,
119 },
120 {
121 .name = "vdd2",
122 .vin_name = "vcc2",
123 .enable_time_us = 350,
124 },
125 {
126 .name = "vdd3",
127 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
128 .voltage_table = VDD3_VSEL_table,
129 .enable_time_us = 200,
130 },
131 {
132 .name = "vdig1",
133 .vin_name = "vcc6",
134 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
135 .voltage_table = VDIG1_VSEL_table,
136 .enable_time_us = 100,
137 },
138 {
139 .name = "vdig2",
140 .vin_name = "vcc6",
141 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
142 .voltage_table = VDIG2_VSEL_table,
143 .enable_time_us = 100,
144 },
145 {
146 .name = "vpll",
147 .vin_name = "vcc5",
148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
150 .enable_time_us = 100,
151 },
152 {
153 .name = "vdac",
154 .vin_name = "vcc5",
155 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
156 .voltage_table = VDAC_VSEL_table,
157 .enable_time_us = 100,
158 },
159 {
160 .name = "vaux1",
161 .vin_name = "vcc4",
162 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
163 .voltage_table = VAUX1_VSEL_table,
164 .enable_time_us = 100,
165 },
166 {
167 .name = "vaux2",
168 .vin_name = "vcc4",
169 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
170 .voltage_table = VAUX2_VSEL_table,
171 .enable_time_us = 100,
172 },
173 {
174 .name = "vaux33",
175 .vin_name = "vcc3",
176 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
177 .voltage_table = VAUX33_VSEL_table,
178 .enable_time_us = 100,
179 },
180 {
181 .name = "vmmc",
182 .vin_name = "vcc3",
183 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
184 .voltage_table = VMMC_VSEL_table,
185 .enable_time_us = 100,
186 },
187 {
188 .name = "vbb",
189 .vin_name = "vcc7",
190 .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
191 .voltage_table = VBB_VSEL_table,
192 },
193};
194
195static struct tps_info tps65911_regs[] = {
196 {
197 .name = "vrtc",
198 .vin_name = "vcc7",
199 .enable_time_us = 2200,
200 },
201 {
202 .name = "vio",
203 .vin_name = "vccio",
204 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
205 .voltage_table = VIO_VSEL_table,
206 .enable_time_us = 350,
207 },
208 {
209 .name = "vdd1",
210 .vin_name = "vcc1",
211 .n_voltages = 0x4C,
212 .enable_time_us = 350,
213 },
214 {
215 .name = "vdd2",
216 .vin_name = "vcc2",
217 .n_voltages = 0x4C,
218 .enable_time_us = 350,
219 },
220 {
221 .name = "vddctrl",
222 .n_voltages = 0x44,
223 .enable_time_us = 900,
224 },
225 {
226 .name = "ldo1",
227 .vin_name = "vcc6",
228 .n_voltages = 0x33,
229 .enable_time_us = 420,
230 },
231 {
232 .name = "ldo2",
233 .vin_name = "vcc6",
234 .n_voltages = 0x33,
235 .enable_time_us = 420,
236 },
237 {
238 .name = "ldo3",
239 .vin_name = "vcc5",
240 .n_voltages = 0x1A,
241 .enable_time_us = 230,
242 },
243 {
244 .name = "ldo4",
245 .vin_name = "vcc5",
246 .n_voltages = 0x33,
247 .enable_time_us = 230,
248 },
249 {
250 .name = "ldo5",
251 .vin_name = "vcc4",
252 .n_voltages = 0x1A,
253 .enable_time_us = 230,
254 },
255 {
256 .name = "ldo6",
257 .vin_name = "vcc3",
258 .n_voltages = 0x1A,
259 .enable_time_us = 230,
260 },
261 {
262 .name = "ldo7",
263 .vin_name = "vcc3",
264 .n_voltages = 0x1A,
265 .enable_time_us = 230,
266 },
267 {
268 .name = "ldo8",
269 .vin_name = "vcc3",
270 .n_voltages = 0x1A,
271 .enable_time_us = 230,
272 },
273};
274
275#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
276static unsigned int tps65910_ext_sleep_control[] = {
277 0,
278 EXT_CONTROL_REG_BITS(VIO, 1, 0),
279 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
280 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
281 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
282 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
283 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
284 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
285 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
286 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
287 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
288 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
289 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
290};
291
292static unsigned int tps65911_ext_sleep_control[] = {
293 0,
294 EXT_CONTROL_REG_BITS(VIO, 1, 0),
295 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
296 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
297 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
298 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
299 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
300 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
301 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
302 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
303 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
304 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
305 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
306};
307
308struct tps65910_reg {
309 struct regulator_desc *desc;
310 struct tps65910 *mfd;
311 struct regulator_dev **rdev;
312 struct tps_info **info;
313 int num_regulators;
314 int mode;
315 int (*get_ctrl_reg)(int);
316 unsigned int *ext_sleep_control;
317 unsigned int board_ext_control[TPS65910_NUM_REGS];
318};
319
320static int tps65910_get_ctrl_register(int id)
321{
322 switch (id) {
323 case TPS65910_REG_VRTC:
324 return TPS65910_VRTC;
325 case TPS65910_REG_VIO:
326 return TPS65910_VIO;
327 case TPS65910_REG_VDD1:
328 return TPS65910_VDD1;
329 case TPS65910_REG_VDD2:
330 return TPS65910_VDD2;
331 case TPS65910_REG_VDD3:
332 return TPS65910_VDD3;
333 case TPS65910_REG_VDIG1:
334 return TPS65910_VDIG1;
335 case TPS65910_REG_VDIG2:
336 return TPS65910_VDIG2;
337 case TPS65910_REG_VPLL:
338 return TPS65910_VPLL;
339 case TPS65910_REG_VDAC:
340 return TPS65910_VDAC;
341 case TPS65910_REG_VAUX1:
342 return TPS65910_VAUX1;
343 case TPS65910_REG_VAUX2:
344 return TPS65910_VAUX2;
345 case TPS65910_REG_VAUX33:
346 return TPS65910_VAUX33;
347 case TPS65910_REG_VMMC:
348 return TPS65910_VMMC;
349 case TPS65910_REG_VBB:
350 return TPS65910_BBCH;
351 default:
352 return -EINVAL;
353 }
354}
355
356static int tps65911_get_ctrl_register(int id)
357{
358 switch (id) {
359 case TPS65910_REG_VRTC:
360 return TPS65910_VRTC;
361 case TPS65910_REG_VIO:
362 return TPS65910_VIO;
363 case TPS65910_REG_VDD1:
364 return TPS65910_VDD1;
365 case TPS65910_REG_VDD2:
366 return TPS65910_VDD2;
367 case TPS65911_REG_VDDCTRL:
368 return TPS65911_VDDCTRL;
369 case TPS65911_REG_LDO1:
370 return TPS65911_LDO1;
371 case TPS65911_REG_LDO2:
372 return TPS65911_LDO2;
373 case TPS65911_REG_LDO3:
374 return TPS65911_LDO3;
375 case TPS65911_REG_LDO4:
376 return TPS65911_LDO4;
377 case TPS65911_REG_LDO5:
378 return TPS65911_LDO5;
379 case TPS65911_REG_LDO6:
380 return TPS65911_LDO6;
381 case TPS65911_REG_LDO7:
382 return TPS65911_LDO7;
383 case TPS65911_REG_LDO8:
384 return TPS65911_LDO8;
385 default:
386 return -EINVAL;
387 }
388}
389
390static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
391{
392 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
393 struct tps65910 *mfd = pmic->mfd;
394 int reg, value, id = rdev_get_id(dev);
395
396 reg = pmic->get_ctrl_reg(id);
397 if (reg < 0)
398 return reg;
399
400 switch (mode) {
401 case REGULATOR_MODE_NORMAL:
402 return tps65910_reg_update_bits(pmic->mfd, reg,
403 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
404 LDO_ST_ON_BIT);
405 case REGULATOR_MODE_IDLE:
406 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
407 return tps65910_reg_set_bits(mfd, reg, value);
408 case REGULATOR_MODE_STANDBY:
409 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
410 }
411
412 return -EINVAL;
413}
414
415static unsigned int tps65910_get_mode(struct regulator_dev *dev)
416{
417 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
418 int ret, reg, value, id = rdev_get_id(dev);
419
420 reg = pmic->get_ctrl_reg(id);
421 if (reg < 0)
422 return reg;
423
424 ret = tps65910_reg_read(pmic->mfd, reg, &value);
425 if (ret < 0)
426 return ret;
427
428 if (!(value & LDO_ST_ON_BIT))
429 return REGULATOR_MODE_STANDBY;
430 else if (value & LDO_ST_MODE_BIT)
431 return REGULATOR_MODE_IDLE;
432 else
433 return REGULATOR_MODE_NORMAL;
434}
435
436static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
437{
438 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
439 int ret, id = rdev_get_id(dev);
440 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
441
442 switch (id) {
443 case TPS65910_REG_VDD1:
444 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
445 if (ret < 0)
446 return ret;
447 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
448 if (ret < 0)
449 return ret;
450 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
451 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
452 if (ret < 0)
453 return ret;
454 sr = opvsel & VDD1_OP_CMD_MASK;
455 opvsel &= VDD1_OP_SEL_MASK;
456 srvsel &= VDD1_SR_SEL_MASK;
457 vselmax = 75;
458 break;
459 case TPS65910_REG_VDD2:
460 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
461 if (ret < 0)
462 return ret;
463 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
464 if (ret < 0)
465 return ret;
466 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
467 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
468 if (ret < 0)
469 return ret;
470 sr = opvsel & VDD2_OP_CMD_MASK;
471 opvsel &= VDD2_OP_SEL_MASK;
472 srvsel &= VDD2_SR_SEL_MASK;
473 vselmax = 75;
474 break;
475 case TPS65911_REG_VDDCTRL:
476 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
477 &opvsel);
478 if (ret < 0)
479 return ret;
480 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
481 &srvsel);
482 if (ret < 0)
483 return ret;
484 sr = opvsel & VDDCTRL_OP_CMD_MASK;
485 opvsel &= VDDCTRL_OP_SEL_MASK;
486 srvsel &= VDDCTRL_SR_SEL_MASK;
487 vselmax = 64;
488 break;
489 }
490
491
492 if (!mult)
493 mult = 1;
494
495 if (sr) {
496
497 if (srvsel < 3)
498 srvsel = 3;
499 if (srvsel > vselmax)
500 srvsel = vselmax;
501 return srvsel - 3;
502 } else {
503
504
505 if (opvsel < 3)
506 opvsel = 3;
507 if (opvsel > vselmax)
508 opvsel = vselmax;
509 return opvsel - 3;
510 }
511 return -EINVAL;
512}
513
514static int tps65910_get_voltage_sel(struct regulator_dev *dev)
515{
516 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
517 int ret, reg, value, id = rdev_get_id(dev);
518
519 reg = pmic->get_ctrl_reg(id);
520 if (reg < 0)
521 return reg;
522
523 ret = tps65910_reg_read(pmic->mfd, reg, &value);
524 if (ret < 0)
525 return ret;
526
527 switch (id) {
528 case TPS65910_REG_VIO:
529 case TPS65910_REG_VDIG1:
530 case TPS65910_REG_VDIG2:
531 case TPS65910_REG_VPLL:
532 case TPS65910_REG_VDAC:
533 case TPS65910_REG_VAUX1:
534 case TPS65910_REG_VAUX2:
535 case TPS65910_REG_VAUX33:
536 case TPS65910_REG_VMMC:
537 value &= LDO_SEL_MASK;
538 value >>= LDO_SEL_SHIFT;
539 break;
540 case TPS65910_REG_VBB:
541 value &= BBCH_BBSEL_MASK;
542 value >>= BBCH_BBSEL_SHIFT;
543 break;
544 default:
545 return -EINVAL;
546 }
547
548 return value;
549}
550
551static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
552{
553 return dev->desc->volt_table[0];
554}
555
556static int tps65911_get_voltage_sel(struct regulator_dev *dev)
557{
558 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
559 int ret, id = rdev_get_id(dev);
560 unsigned int value, reg;
561
562 reg = pmic->get_ctrl_reg(id);
563
564 ret = tps65910_reg_read(pmic->mfd, reg, &value);
565 if (ret < 0)
566 return ret;
567
568 switch (id) {
569 case TPS65911_REG_LDO1:
570 case TPS65911_REG_LDO2:
571 case TPS65911_REG_LDO4:
572 value &= LDO1_SEL_MASK;
573 value >>= LDO_SEL_SHIFT;
574 break;
575 case TPS65911_REG_LDO3:
576 case TPS65911_REG_LDO5:
577 case TPS65911_REG_LDO6:
578 case TPS65911_REG_LDO7:
579 case TPS65911_REG_LDO8:
580 value &= LDO3_SEL_MASK;
581 value >>= LDO_SEL_SHIFT;
582 break;
583 case TPS65910_REG_VIO:
584 value &= LDO_SEL_MASK;
585 value >>= LDO_SEL_SHIFT;
586 break;
587 default:
588 return -EINVAL;
589 }
590
591 return value;
592}
593
594static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
595 unsigned selector)
596{
597 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
598 int id = rdev_get_id(dev), vsel;
599 int dcdc_mult = 0;
600
601 switch (id) {
602 case TPS65910_REG_VDD1:
603 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
604 if (dcdc_mult == 1)
605 dcdc_mult--;
606 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
607
608 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
609 VDD1_VGAIN_SEL_MASK,
610 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
611 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
612 break;
613 case TPS65910_REG_VDD2:
614 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
615 if (dcdc_mult == 1)
616 dcdc_mult--;
617 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
618
619 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
620 VDD1_VGAIN_SEL_MASK,
621 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
622 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
623 break;
624 case TPS65911_REG_VDDCTRL:
625 vsel = selector + 3;
626 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
627 }
628
629 return 0;
630}
631
632static int tps65910_set_voltage_sel(struct regulator_dev *dev,
633 unsigned selector)
634{
635 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
636 int reg, id = rdev_get_id(dev);
637
638 reg = pmic->get_ctrl_reg(id);
639 if (reg < 0)
640 return reg;
641
642 switch (id) {
643 case TPS65910_REG_VIO:
644 case TPS65910_REG_VDIG1:
645 case TPS65910_REG_VDIG2:
646 case TPS65910_REG_VPLL:
647 case TPS65910_REG_VDAC:
648 case TPS65910_REG_VAUX1:
649 case TPS65910_REG_VAUX2:
650 case TPS65910_REG_VAUX33:
651 case TPS65910_REG_VMMC:
652 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
653 selector << LDO_SEL_SHIFT);
654 case TPS65910_REG_VBB:
655 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
656 selector << BBCH_BBSEL_SHIFT);
657 }
658
659 return -EINVAL;
660}
661
662static int tps65911_set_voltage_sel(struct regulator_dev *dev,
663 unsigned selector)
664{
665 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
666 int reg, id = rdev_get_id(dev);
667
668 reg = pmic->get_ctrl_reg(id);
669 if (reg < 0)
670 return reg;
671
672 switch (id) {
673 case TPS65911_REG_LDO1:
674 case TPS65911_REG_LDO2:
675 case TPS65911_REG_LDO4:
676 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
677 selector << LDO_SEL_SHIFT);
678 case TPS65911_REG_LDO3:
679 case TPS65911_REG_LDO5:
680 case TPS65911_REG_LDO6:
681 case TPS65911_REG_LDO7:
682 case TPS65911_REG_LDO8:
683 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
684 selector << LDO_SEL_SHIFT);
685 case TPS65910_REG_VIO:
686 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
687 selector << LDO_SEL_SHIFT);
688 case TPS65910_REG_VBB:
689 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
690 selector << BBCH_BBSEL_SHIFT);
691 }
692
693 return -EINVAL;
694}
695
696
697static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
698 unsigned selector)
699{
700 int volt, mult = 1, id = rdev_get_id(dev);
701
702 switch (id) {
703 case TPS65910_REG_VDD1:
704 case TPS65910_REG_VDD2:
705 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
706 volt = VDD1_2_MIN_VOLT +
707 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
708 break;
709 case TPS65911_REG_VDDCTRL:
710 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
711 break;
712 default:
713 BUG();
714 return -EINVAL;
715 }
716
717 return volt * 100 * mult;
718}
719
720static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
721{
722 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
723 int step_mv = 0, id = rdev_get_id(dev);
724
725 switch (id) {
726 case TPS65911_REG_LDO1:
727 case TPS65911_REG_LDO2:
728 case TPS65911_REG_LDO4:
729
730 if (selector < 5)
731 selector = 0;
732 else
733 selector -= 4;
734
735 step_mv = 50;
736 break;
737 case TPS65911_REG_LDO3:
738 case TPS65911_REG_LDO5:
739 case TPS65911_REG_LDO6:
740 case TPS65911_REG_LDO7:
741 case TPS65911_REG_LDO8:
742
743 if (selector < 3)
744 selector = 0;
745 else
746 selector -= 2;
747
748 step_mv = 100;
749 break;
750 case TPS65910_REG_VIO:
751 return pmic->info[id]->voltage_table[selector];
752 default:
753 return -EINVAL;
754 }
755
756 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
757}
758
759
760static struct regulator_ops tps65910_ops_dcdc = {
761 .is_enabled = regulator_is_enabled_regmap,
762 .enable = regulator_enable_regmap,
763 .disable = regulator_disable_regmap,
764 .set_mode = tps65910_set_mode,
765 .get_mode = tps65910_get_mode,
766 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
767 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
768 .set_voltage_time_sel = regulator_set_voltage_time_sel,
769 .list_voltage = tps65910_list_voltage_dcdc,
770 .map_voltage = regulator_map_voltage_ascend,
771};
772
773static struct regulator_ops tps65910_ops_vdd3 = {
774 .is_enabled = regulator_is_enabled_regmap,
775 .enable = regulator_enable_regmap,
776 .disable = regulator_disable_regmap,
777 .set_mode = tps65910_set_mode,
778 .get_mode = tps65910_get_mode,
779 .get_voltage = tps65910_get_voltage_vdd3,
780 .list_voltage = regulator_list_voltage_table,
781 .map_voltage = regulator_map_voltage_ascend,
782};
783
784static struct regulator_ops tps65910_ops_vbb = {
785 .is_enabled = regulator_is_enabled_regmap,
786 .enable = regulator_enable_regmap,
787 .disable = regulator_disable_regmap,
788 .set_mode = tps65910_set_mode,
789 .get_mode = tps65910_get_mode,
790 .get_voltage_sel = tps65910_get_voltage_sel,
791 .set_voltage_sel = tps65910_set_voltage_sel,
792 .list_voltage = regulator_list_voltage_table,
793 .map_voltage = regulator_map_voltage_iterate,
794};
795
796static struct regulator_ops tps65910_ops = {
797 .is_enabled = regulator_is_enabled_regmap,
798 .enable = regulator_enable_regmap,
799 .disable = regulator_disable_regmap,
800 .set_mode = tps65910_set_mode,
801 .get_mode = tps65910_get_mode,
802 .get_voltage_sel = tps65910_get_voltage_sel,
803 .set_voltage_sel = tps65910_set_voltage_sel,
804 .list_voltage = regulator_list_voltage_table,
805 .map_voltage = regulator_map_voltage_ascend,
806};
807
808static struct regulator_ops tps65911_ops = {
809 .is_enabled = regulator_is_enabled_regmap,
810 .enable = regulator_enable_regmap,
811 .disable = regulator_disable_regmap,
812 .set_mode = tps65910_set_mode,
813 .get_mode = tps65910_get_mode,
814 .get_voltage_sel = tps65911_get_voltage_sel,
815 .set_voltage_sel = tps65911_set_voltage_sel,
816 .list_voltage = tps65911_list_voltage,
817 .map_voltage = regulator_map_voltage_ascend,
818};
819
820static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
821 int id, int ext_sleep_config)
822{
823 struct tps65910 *mfd = pmic->mfd;
824 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
825 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
826 int ret;
827
828
829
830
831
832 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
833 int en_count;
834 en_count = ((ext_sleep_config &
835 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
836 en_count += ((ext_sleep_config &
837 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
838 en_count += ((ext_sleep_config &
839 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
840 en_count += ((ext_sleep_config &
841 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
842 if (en_count > 1) {
843 dev_err(mfd->dev,
844 "External sleep control flag is not proper\n");
845 return -EINVAL;
846 }
847 }
848
849 pmic->board_ext_control[id] = ext_sleep_config;
850
851
852 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
853 ret = tps65910_reg_set_bits(mfd,
854 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
855 else
856 ret = tps65910_reg_clear_bits(mfd,
857 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
858 if (ret < 0) {
859 dev_err(mfd->dev,
860 "Error in configuring external control EN1\n");
861 return ret;
862 }
863
864
865 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
866 ret = tps65910_reg_set_bits(mfd,
867 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
868 else
869 ret = tps65910_reg_clear_bits(mfd,
870 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
871 if (ret < 0) {
872 dev_err(mfd->dev,
873 "Error in configuring external control EN2\n");
874 return ret;
875 }
876
877
878 if ((tps65910_chip_id(mfd) == TPS65910) &&
879 (id >= TPS65910_REG_VDIG1)) {
880 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
881 ret = tps65910_reg_set_bits(mfd,
882 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
883 else
884 ret = tps65910_reg_clear_bits(mfd,
885 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
886 if (ret < 0) {
887 dev_err(mfd->dev,
888 "Error in configuring external control EN3\n");
889 return ret;
890 }
891 }
892
893
894 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
895
896 ret = tps65910_reg_clear_bits(mfd,
897 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
898 if (!ret)
899 ret = tps65910_reg_clear_bits(mfd,
900 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
901 if (ret < 0)
902 dev_err(mfd->dev,
903 "Error in configuring SLEEP register\n");
904 return ret;
905 }
906
907
908
909
910
911
912 if ((id == TPS65910_REG_VDD1) ||
913 (id == TPS65910_REG_VDD2) ||
914 ((id == TPS65911_REG_VDDCTRL) &&
915 (tps65910_chip_id(mfd) == TPS65911))) {
916 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
917 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
918 int opvsel, srvsel;
919
920 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
921 if (ret < 0)
922 return ret;
923 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
924 if (ret < 0)
925 return ret;
926
927 if (opvsel & VDD1_OP_CMD_MASK) {
928 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
929
930 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
931 reg_val);
932 if (ret < 0) {
933 dev_err(mfd->dev,
934 "Error in configuring op register\n");
935 return ret;
936 }
937 }
938 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
939 if (ret < 0) {
940 dev_err(mfd->dev, "Error in setting sr register\n");
941 return ret;
942 }
943 }
944
945 ret = tps65910_reg_clear_bits(mfd,
946 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
947 if (!ret) {
948 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
949 ret = tps65910_reg_set_bits(mfd,
950 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
951 else
952 ret = tps65910_reg_clear_bits(mfd,
953 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
954 }
955 if (ret < 0)
956 dev_err(mfd->dev,
957 "Error in configuring SLEEP register\n");
958
959 return ret;
960}
961
962#ifdef CONFIG_OF
963
964static struct of_regulator_match tps65910_matches[] = {
965 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
966 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
967 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
968 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
969 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
970 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
971 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
972 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
973 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
974 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
975 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
976 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
977 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
978 { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
979};
980
981static struct of_regulator_match tps65911_matches[] = {
982 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
983 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
984 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
985 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
986 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
987 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
988 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
989 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
990 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
991 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
992 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
993 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
994 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
995};
996
997static struct tps65910_board *tps65910_parse_dt_reg_data(
998 struct platform_device *pdev,
999 struct of_regulator_match **tps65910_reg_matches)
1000{
1001 struct tps65910_board *pmic_plat_data;
1002 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1003 struct device_node *np, *regulators;
1004 struct of_regulator_match *matches;
1005 unsigned int prop;
1006 int idx = 0, ret, count;
1007
1008 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1009 GFP_KERNEL);
1010 if (!pmic_plat_data)
1011 return NULL;
1012
1013 np = pdev->dev.parent->of_node;
1014 regulators = of_get_child_by_name(np, "regulators");
1015 if (!regulators) {
1016 dev_err(&pdev->dev, "regulator node not found\n");
1017 return NULL;
1018 }
1019
1020 switch (tps65910_chip_id(tps65910)) {
1021 case TPS65910:
1022 count = ARRAY_SIZE(tps65910_matches);
1023 matches = tps65910_matches;
1024 break;
1025 case TPS65911:
1026 count = ARRAY_SIZE(tps65911_matches);
1027 matches = tps65911_matches;
1028 break;
1029 default:
1030 of_node_put(regulators);
1031 dev_err(&pdev->dev, "Invalid tps chip version\n");
1032 return NULL;
1033 }
1034
1035 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
1036 of_node_put(regulators);
1037 if (ret < 0) {
1038 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1039 ret);
1040 return NULL;
1041 }
1042
1043 *tps65910_reg_matches = matches;
1044
1045 for (idx = 0; idx < count; idx++) {
1046 if (!matches[idx].of_node)
1047 continue;
1048
1049 pmic_plat_data->tps65910_pmic_init_data[idx] =
1050 matches[idx].init_data;
1051
1052 ret = of_property_read_u32(matches[idx].of_node,
1053 "ti,regulator-ext-sleep-control", &prop);
1054 if (!ret)
1055 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1056
1057 }
1058
1059 return pmic_plat_data;
1060}
1061#else
1062static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1063 struct platform_device *pdev,
1064 struct of_regulator_match **tps65910_reg_matches)
1065{
1066 *tps65910_reg_matches = NULL;
1067 return NULL;
1068}
1069#endif
1070
1071static int tps65910_probe(struct platform_device *pdev)
1072{
1073 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1074 struct regulator_config config = { };
1075 struct tps_info *info;
1076 struct regulator_dev *rdev;
1077 struct tps65910_reg *pmic;
1078 struct tps65910_board *pmic_plat_data;
1079 struct of_regulator_match *tps65910_reg_matches = NULL;
1080 int i, err;
1081
1082 pmic_plat_data = dev_get_platdata(tps65910->dev);
1083 if (!pmic_plat_data && tps65910->dev->of_node)
1084 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1085 &tps65910_reg_matches);
1086
1087 if (!pmic_plat_data) {
1088 dev_err(&pdev->dev, "Platform data not found\n");
1089 return -EINVAL;
1090 }
1091
1092 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1093 if (!pmic)
1094 return -ENOMEM;
1095
1096 pmic->mfd = tps65910;
1097 platform_set_drvdata(pdev, pmic);
1098
1099
1100 err = tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1101 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1102 if (err < 0)
1103 return err;
1104
1105 switch (tps65910_chip_id(tps65910)) {
1106 case TPS65910:
1107 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65910_regs));
1108 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1109 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1110 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1111 info = tps65910_regs;
1112
1113
1114
1115
1116 tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL,
1117 DCDCCTRL_DCDCCKSYNC_MASK);
1118 break;
1119 case TPS65911:
1120 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65911_regs));
1121 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1122 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1123 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1124 info = tps65911_regs;
1125 break;
1126 default:
1127 dev_err(&pdev->dev, "Invalid tps chip version\n");
1128 return -ENODEV;
1129 }
1130
1131 pmic->desc = devm_kcalloc(&pdev->dev,
1132 pmic->num_regulators,
1133 sizeof(struct regulator_desc),
1134 GFP_KERNEL);
1135 if (!pmic->desc)
1136 return -ENOMEM;
1137
1138 pmic->info = devm_kcalloc(&pdev->dev,
1139 pmic->num_regulators,
1140 sizeof(struct tps_info *),
1141 GFP_KERNEL);
1142 if (!pmic->info)
1143 return -ENOMEM;
1144
1145 pmic->rdev = devm_kcalloc(&pdev->dev,
1146 pmic->num_regulators,
1147 sizeof(struct regulator_dev *),
1148 GFP_KERNEL);
1149 if (!pmic->rdev)
1150 return -ENOMEM;
1151
1152 for (i = 0; i < pmic->num_regulators; i++, info++) {
1153
1154 pmic->info[i] = info;
1155
1156 pmic->desc[i].name = info->name;
1157 pmic->desc[i].supply_name = info->vin_name;
1158 pmic->desc[i].id = i;
1159 pmic->desc[i].n_voltages = info->n_voltages;
1160 pmic->desc[i].enable_time = info->enable_time_us;
1161
1162 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1163 pmic->desc[i].ops = &tps65910_ops_dcdc;
1164 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1165 VDD1_2_NUM_VOLT_COARSE;
1166 pmic->desc[i].ramp_delay = 12500;
1167 } else if (i == TPS65910_REG_VDD3) {
1168 if (tps65910_chip_id(tps65910) == TPS65910) {
1169 pmic->desc[i].ops = &tps65910_ops_vdd3;
1170 pmic->desc[i].volt_table = info->voltage_table;
1171 } else {
1172 pmic->desc[i].ops = &tps65910_ops_dcdc;
1173 pmic->desc[i].ramp_delay = 5000;
1174 }
1175 } else if (i == TPS65910_REG_VBB &&
1176 tps65910_chip_id(tps65910) == TPS65910) {
1177 pmic->desc[i].ops = &tps65910_ops_vbb;
1178 pmic->desc[i].volt_table = info->voltage_table;
1179 } else {
1180 if (tps65910_chip_id(tps65910) == TPS65910) {
1181 pmic->desc[i].ops = &tps65910_ops;
1182 pmic->desc[i].volt_table = info->voltage_table;
1183 } else {
1184 pmic->desc[i].ops = &tps65911_ops;
1185 }
1186 }
1187
1188 err = tps65910_set_ext_sleep_config(pmic, i,
1189 pmic_plat_data->regulator_ext_sleep_control[i]);
1190
1191
1192
1193
1194 if (err < 0)
1195 dev_warn(tps65910->dev,
1196 "Failed to initialise ext control config\n");
1197
1198 pmic->desc[i].type = REGULATOR_VOLTAGE;
1199 pmic->desc[i].owner = THIS_MODULE;
1200 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1201 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1202
1203 config.dev = tps65910->dev;
1204 config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
1205 config.driver_data = pmic;
1206 config.regmap = tps65910->regmap;
1207
1208 if (tps65910_reg_matches)
1209 config.of_node = tps65910_reg_matches[i].of_node;
1210
1211 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1212 &config);
1213 if (IS_ERR(rdev)) {
1214 dev_err(tps65910->dev,
1215 "failed to register %s regulator\n",
1216 pdev->name);
1217 return PTR_ERR(rdev);
1218 }
1219
1220
1221 pmic->rdev[i] = rdev;
1222 }
1223 return 0;
1224}
1225
1226static void tps65910_shutdown(struct platform_device *pdev)
1227{
1228 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1229 int i;
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244 for (i = 0; i < pmic->num_regulators; i++) {
1245 int err;
1246 if (!pmic->rdev[i])
1247 continue;
1248
1249 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1250 if (err < 0)
1251 dev_err(&pdev->dev,
1252 "Error in clearing external control\n");
1253 }
1254}
1255
1256static struct platform_driver tps65910_driver = {
1257 .driver = {
1258 .name = "tps65910-pmic",
1259 },
1260 .probe = tps65910_probe,
1261 .shutdown = tps65910_shutdown,
1262};
1263
1264static int __init tps65910_init(void)
1265{
1266 return platform_driver_register(&tps65910_driver);
1267}
1268subsys_initcall(tps65910_init);
1269
1270static void __exit tps65910_cleanup(void)
1271{
1272 platform_driver_unregister(&tps65910_driver);
1273}
1274module_exit(tps65910_cleanup);
1275
1276MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1277MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1278MODULE_LICENSE("GPL v2");
1279MODULE_ALIAS("platform:tps65910-pmic");
1280
