LXR linux/drivers/scsi/lpfc/lpfc.h

   1/*******************************************************************
   2 * This file is part of the Emulex Linux Device Driver for         *
   3 * Fibre Channel Host Bus Adapters.                                *
   4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
   5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.     *
   6 * Copyright (C) 2004-2016 Emulex.  All rights reserved.           *
   7 * EMULEX and SLI are trademarks of Emulex.                        *
   8 * www.broadcom.com                                                *
   9 * Portions Copyright (C) 2004-2005 Christoph Hellwig              *
  10 *                                                                 *
  11 * This program is free software; you can redistribute it and/or   *
  12 * modify it under the terms of version 2 of the GNU General       *
  13 * Public License as published by the Free Software Foundation.    *
  14 * This program is distributed in the hope that it will be useful. *
  15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
  16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
  17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
  18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  19 * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
  20 * more details, a copy of which can be found in the file COPYING  *
  21 * included with this package.                                     *
  22 *******************************************************************/
  23
  24#include <scsi/scsi_host.h>
  25#include <linux/ktime.h>
  26#include <linux/workqueue.h>
  27
  28#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
  29#define CONFIG_SCSI_LPFC_DEBUG_FS
  30#endif
  31
  32struct lpfc_sli2_slim;
  33
  34#define ELX_MODEL_NAME_SIZE     80
  35
  36#define LPFC_PCI_DEV_LP         0x1
  37#define LPFC_PCI_DEV_OC         0x2
  38
  39#define LPFC_SLI_REV2           2
  40#define LPFC_SLI_REV3           3
  41#define LPFC_SLI_REV4           4
  42
  43#define LPFC_MAX_TARGET         4096    /* max number of targets supported */
  44#define LPFC_MAX_DISC_THREADS   64      /* max outstanding discovery els
  45                                           requests */
  46#define LPFC_MAX_NS_RETRY       3       /* Number of retry attempts to contact
  47                                           the NameServer  before giving up. */
  48#define LPFC_CMD_PER_LUN        3       /* max outstanding cmds per lun */
  49#define LPFC_DEFAULT_SG_SEG_CNT 64      /* sg element count per scsi cmnd */
  50#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128       /* sg element count per scsi
  51                cmnd for menlo needs nearly twice as for firmware
  52                downloads using bsg */
  53
  54#define LPFC_MIN_SG_SLI4_BUF_SZ 0x800   /* based on LPFC_DEFAULT_SG_SEG_CNT */
  55#define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */
  56#define LPFC_MAX_SG_SEG_CNT_DIF 512     /* sg element count per scsi cmnd  */
  57#define LPFC_MAX_SG_SEG_CNT     4096    /* sg element count per scsi cmnd */
  58#define LPFC_MIN_SG_SEG_CNT     32      /* sg element count per scsi cmnd */
  59#define LPFC_MAX_SGL_SEG_CNT    512     /* SGL element count per scsi cmnd */
  60#define LPFC_MAX_BPL_SEG_CNT    4096    /* BPL element count per scsi cmnd */
  61#define LPFC_MAX_NVME_SEG_CNT   256     /* max SGL element cnt per NVME cmnd */
  62
  63#define LPFC_MAX_SGE_SIZE       0x80000000 /* Maximum data allowed in a SGE */
  64#define LPFC_IOCB_LIST_CNT      2250    /* list of IOCBs for fast-path usage. */
  65#define LPFC_Q_RAMP_UP_INTERVAL 120     /* lun q_depth ramp up interval */
  66#define LPFC_VNAME_LEN          100     /* vport symbolic name length */
  67#define LPFC_TGTQ_RAMPUP_PCENT  5       /* Target queue rampup in percentage */
  68#define LPFC_MIN_TGT_QDEPTH     10
  69#define LPFC_MAX_TGT_QDEPTH     0xFFFF
  70
  71#define  LPFC_MAX_BUCKET_COUNT 20       /* Maximum no. of buckets for stat data
  72                                           collection. */
  73/*
  74 * Following time intervals are used of adjusting SCSI device
  75 * queue depths when there are driver resource error or Firmware
  76 * resource error.
  77 */
  78/* 1 Second */
  79#define QUEUE_RAMP_DOWN_INTERVAL        (msecs_to_jiffies(1000 * 1))
  80
  81/* Number of exchanges reserved for discovery to complete */
  82#define LPFC_DISC_IOCB_BUFF_COUNT 20
  83
  84#define LPFC_HB_MBOX_INTERVAL   5       /* Heart beat interval in seconds. */
  85#define LPFC_HB_MBOX_TIMEOUT    30      /* Heart beat timeout  in seconds. */
  86
  87/* Error Attention event polling interval */
  88#define LPFC_ERATT_POLL_INTERVAL        5 /* EATT poll interval in seconds */
  89
  90/* Define macros for 64 bit support */
  91#define putPaddrLow(addr)    ((uint32_t) (0xffffffff & (u64)(addr)))
  92#define putPaddrHigh(addr)   ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
  93#define getPaddr(high, low)  ((dma_addr_t)( \
  94                             (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
  95/* Provide maximum configuration definitions. */
  96#define LPFC_DRVR_TIMEOUT       16      /* driver iocb timeout value in sec */
  97#define FC_MAX_ADPTMSG          64
  98
  99#define MAX_HBAEVT      32
 100#define MAX_HBAS_NO_RESET 16
 101
 102/* Number of MSI-X vectors the driver uses */
 103#define LPFC_MSIX_VECTORS       2
 104
 105/* lpfc wait event data ready flag */
 106#define LPFC_DATA_READY         0       /* bit 0 */
 107
 108/* queue dump line buffer size */
 109#define LPFC_LBUF_SZ            128
 110
 111/* mailbox system shutdown options */
 112#define LPFC_MBX_NO_WAIT        0
 113#define LPFC_MBX_WAIT           1
 114
 115enum lpfc_polling_flags {
 116        ENABLE_FCP_RING_POLLING = 0x1,
 117        DISABLE_FCP_RING_INT    = 0x2
 118};
 119
 120struct perf_prof {
 121        uint16_t cmd_cpu[40];
 122        uint16_t rsp_cpu[40];
 123        uint16_t qh_cpu[40];
 124        uint16_t wqidx[40];
 125};
 126
 127/*
 128 * Provide for FC4 TYPE x28 - NVME.  The
 129 * bit mask for FCP and NVME is 0x8 identically
 130 * because they are 32 bit positions distance.
 131 */
 132#define LPFC_FC4_TYPE_BITMASK   0x00000100
 133
 134/* Provide DMA memory definitions the driver uses per port instance. */
 135struct lpfc_dmabuf {
 136        struct list_head list;
 137        void *virt;             /* virtual address ptr */
 138        dma_addr_t phys;        /* mapped address */
 139        uint32_t   buffer_tag;  /* used for tagged queue ring */
 140};
 141
 142struct lpfc_nvmet_ctxbuf {
 143        struct list_head list;
 144        struct lpfc_nvmet_rcv_ctx *context;
 145        struct lpfc_iocbq *iocbq;
 146        struct lpfc_sglq *sglq;
 147        struct work_struct defer_work;
 148};
 149
 150struct lpfc_dma_pool {
 151        struct lpfc_dmabuf   *elements;
 152        uint32_t    max_count;
 153        uint32_t    current_count;
 154};
 155
 156struct hbq_dmabuf {
 157        struct lpfc_dmabuf hbuf;
 158        struct lpfc_dmabuf dbuf;
 159        uint16_t total_size;
 160        uint16_t bytes_recv;
 161        uint32_t tag;
 162        struct lpfc_cq_event cq_event;
 163        unsigned long time_stamp;
 164        void *context;
 165};
 166
 167struct rqb_dmabuf {
 168        struct lpfc_dmabuf hbuf;
 169        struct lpfc_dmabuf dbuf;
 170        uint16_t total_size;
 171        uint16_t bytes_recv;
 172        uint16_t idx;
 173        struct lpfc_queue *hrq;   /* ptr to associated Header RQ */
 174        struct lpfc_queue *drq;   /* ptr to associated Data RQ */
 175};
 176
 177/* Priority bit.  Set value to exceed low water mark in lpfc_mem. */
 178#define MEM_PRI         0x100
 179
 180
 181/****************************************************************************/
 182/*      Device VPD save area                                                */
 183/****************************************************************************/
 184typedef struct lpfc_vpd {
 185        uint32_t status;        /* vpd status value */
 186        uint32_t length;        /* number of bytes actually returned */
 187        struct {
 188                uint32_t rsvd1; /* Revision numbers */
 189                uint32_t biuRev;
 190                uint32_t smRev;
 191                uint32_t smFwRev;
 192                uint32_t endecRev;
 193                uint16_t rBit;
 194                uint8_t fcphHigh;
 195                uint8_t fcphLow;
 196                uint8_t feaLevelHigh;
 197                uint8_t feaLevelLow;
 198                uint32_t postKernRev;
 199                uint32_t opFwRev;
 200                uint8_t opFwName[16];
 201                uint32_t sli1FwRev;
 202                uint8_t sli1FwName[16];
 203                uint32_t sli2FwRev;
 204                uint8_t sli2FwName[16];
 205        } rev;
 206        struct {
 207#ifdef __BIG_ENDIAN_BITFIELD
 208                uint32_t rsvd3  :19;  /* Reserved                             */
 209                uint32_t cdss   : 1;  /* Configure Data Security SLI          */
 210                uint32_t rsvd2  : 3;  /* Reserved                             */
 211                uint32_t cbg    : 1;  /* Configure BlockGuard                 */
 212                uint32_t cmv    : 1;  /* Configure Max VPIs                   */
 213                uint32_t ccrp   : 1;  /* Config Command Ring Polling          */
 214                uint32_t csah   : 1;  /* Configure Synchronous Abort Handling */
 215                uint32_t chbs   : 1;  /* Cofigure Host Backing store          */
 216                uint32_t cinb   : 1;  /* Enable Interrupt Notification Block  */
 217                uint32_t cerbm  : 1;  /* Configure Enhanced Receive Buf Mgmt  */
 218                uint32_t cmx    : 1;  /* Configure Max XRIs                   */
 219                uint32_t cmr    : 1;  /* Configure Max RPIs                   */
 220#else   /*  __LITTLE_ENDIAN */
 221                uint32_t cmr    : 1;  /* Configure Max RPIs                   */
 222                uint32_t cmx    : 1;  /* Configure Max XRIs                   */
 223                uint32_t cerbm  : 1;  /* Configure Enhanced Receive Buf Mgmt  */
 224                uint32_t cinb   : 1;  /* Enable Interrupt Notification Block  */
 225                uint32_t chbs   : 1;  /* Cofigure Host Backing store          */
 226                uint32_t csah   : 1;  /* Configure Synchronous Abort Handling */
 227                uint32_t ccrp   : 1;  /* Config Command Ring Polling          */
 228                uint32_t cmv    : 1;  /* Configure Max VPIs                   */
 229                uint32_t cbg    : 1;  /* Configure BlockGuard                 */
 230                uint32_t rsvd2  : 3;  /* Reserved                             */
 231                uint32_t cdss   : 1;  /* Configure Data Security SLI          */
 232                uint32_t rsvd3  :19;  /* Reserved                             */
 233#endif
 234        } sli3Feat;
 235} lpfc_vpd_t;
 236
 237
 238/*
 239 * lpfc stat counters
 240 */
 241struct lpfc_stats {
 242        /* Statistics for ELS commands */
 243        uint32_t elsLogiCol;
 244        uint32_t elsRetryExceeded;
 245        uint32_t elsXmitRetry;
 246        uint32_t elsDelayRetry;
 247        uint32_t elsRcvDrop;
 248        uint32_t elsRcvFrame;
 249        uint32_t elsRcvRSCN;
 250        uint32_t elsRcvRNID;
 251        uint32_t elsRcvFARP;
 252        uint32_t elsRcvFARPR;
 253        uint32_t elsRcvFLOGI;
 254        uint32_t elsRcvPLOGI;
 255        uint32_t elsRcvADISC;
 256        uint32_t elsRcvPDISC;
 257        uint32_t elsRcvFAN;
 258        uint32_t elsRcvLOGO;
 259        uint32_t elsRcvPRLO;
 260        uint32_t elsRcvPRLI;
 261        uint32_t elsRcvLIRR;
 262        uint32_t elsRcvRLS;
 263        uint32_t elsRcvRPS;
 264        uint32_t elsRcvRPL;
 265        uint32_t elsRcvRRQ;
 266        uint32_t elsRcvRTV;
 267        uint32_t elsRcvECHO;
 268        uint32_t elsRcvLCB;
 269        uint32_t elsRcvRDP;
 270        uint32_t elsXmitFLOGI;
 271        uint32_t elsXmitFDISC;
 272        uint32_t elsXmitPLOGI;
 273        uint32_t elsXmitPRLI;
 274        uint32_t elsXmitADISC;
 275        uint32_t elsXmitLOGO;
 276        uint32_t elsXmitSCR;
 277        uint32_t elsXmitRSCN;
 278        uint32_t elsXmitRNID;
 279        uint32_t elsXmitFARP;
 280        uint32_t elsXmitFARPR;
 281        uint32_t elsXmitACC;
 282        uint32_t elsXmitLSRJT;
 283
 284        uint32_t frameRcvBcast;
 285        uint32_t frameRcvMulti;
 286        uint32_t strayXmitCmpl;
 287        uint32_t frameXmitDelay;
 288        uint32_t xriCmdCmpl;
 289        uint32_t xriStatErr;
 290        uint32_t LinkUp;
 291        uint32_t LinkDown;
 292        uint32_t LinkMultiEvent;
 293        uint32_t NoRcvBuf;
 294        uint32_t fcpCmd;
 295        uint32_t fcpCmpl;
 296        uint32_t fcpRspErr;
 297        uint32_t fcpRemoteStop;
 298        uint32_t fcpPortRjt;
 299        uint32_t fcpPortBusy;
 300        uint32_t fcpError;
 301        uint32_t fcpLocalErr;
 302};
 303
 304struct lpfc_hba;
 305
 306
 307enum discovery_state {
 308        LPFC_VPORT_UNKNOWN     =  0,    /* vport state is unknown */
 309        LPFC_VPORT_FAILED      =  1,    /* vport has failed */
 310        LPFC_LOCAL_CFG_LINK    =  6,    /* local NPORT Id configured */
 311        LPFC_FLOGI             =  7,    /* FLOGI sent to Fabric */
 312        LPFC_FDISC             =  8,    /* FDISC sent for vport */
 313        LPFC_FABRIC_CFG_LINK   =  9,    /* Fabric assigned NPORT Id
 314                                         * configured */
 315        LPFC_NS_REG            =  10,   /* Register with NameServer */
 316        LPFC_NS_QRY            =  11,   /* Query NameServer for NPort ID list */
 317        LPFC_BUILD_DISC_LIST   =  12,   /* Build ADISC and PLOGI lists for
 318                                         * device authentication / discovery */
 319        LPFC_DISC_AUTH         =  13,   /* Processing ADISC list */
 320        LPFC_VPORT_READY       =  32,
 321};
 322
 323enum hba_state {
 324        LPFC_LINK_UNKNOWN    =   0,   /* HBA state is unknown */
 325        LPFC_WARM_START      =   1,   /* HBA state after selective reset */
 326        LPFC_INIT_START      =   2,   /* Initial state after board reset */
 327        LPFC_INIT_MBX_CMDS   =   3,   /* Initialize HBA with mbox commands */
 328        LPFC_LINK_DOWN       =   4,   /* HBA initialized, link is down */
 329        LPFC_LINK_UP         =   5,   /* Link is up  - issue READ_LA */
 330        LPFC_CLEAR_LA        =   6,   /* authentication cmplt - issue
 331                                       * CLEAR_LA */
 332        LPFC_HBA_READY       =  32,
 333        LPFC_HBA_ERROR       =  -1
 334};
 335
 336struct lpfc_trunk_link_state {
 337        enum hba_state state;
 338        uint8_t fault;
 339};
 340
 341struct lpfc_trunk_link  {
 342        struct lpfc_trunk_link_state link0,
 343                                     link1,
 344                                     link2,
 345                                     link3;
 346};
 347
 348struct lpfc_vport {
 349        struct lpfc_hba *phba;
 350        struct list_head listentry;
 351        uint8_t port_type;
 352#define LPFC_PHYSICAL_PORT 1
 353#define LPFC_NPIV_PORT  2
 354#define LPFC_FABRIC_PORT 3
 355        enum discovery_state port_state;
 356
 357        uint16_t vpi;
 358        uint16_t vfi;
 359        uint8_t vpi_state;
 360#define LPFC_VPI_REGISTERED     0x1
 361
 362        uint32_t fc_flag;       /* FC flags */
 363/* Several of these flags are HBA centric and should be moved to
 364 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
 365 */
 366#define FC_PT2PT                0x1      /* pt2pt with no fabric */
 367#define FC_PT2PT_PLOGI          0x2      /* pt2pt initiate PLOGI */
 368#define FC_DISC_TMO             0x4      /* Discovery timer running */
 369#define FC_PUBLIC_LOOP          0x8      /* Public loop */
 370#define FC_LBIT                 0x10     /* LOGIN bit in loopinit set */
 371#define FC_RSCN_MODE            0x20     /* RSCN cmd rcv'ed */
 372#define FC_NLP_MORE             0x40     /* More node to process in node tbl */
 373#define FC_OFFLINE_MODE         0x80     /* Interface is offline for diag */
 374#define FC_FABRIC               0x100    /* We are fabric attached */
 375#define FC_VPORT_LOGO_RCVD      0x200    /* LOGO received on vport */
 376#define FC_RSCN_DISCOVERY       0x400    /* Auth all devices after RSCN */
 377#define FC_LOGO_RCVD_DID_CHNG   0x800    /* FDISC on phys port detect DID chng*/
 378#define FC_SCSI_SCAN_TMO        0x4000   /* scsi scan timer running */
 379#define FC_ABORT_DISCOVERY      0x8000   /* we want to abort discovery */
 380#define FC_NDISC_ACTIVE         0x10000  /* NPort discovery active */
 381#define FC_BYPASSED_MODE        0x20000  /* NPort is in bypassed mode */
 382#define FC_VPORT_NEEDS_REG_VPI  0x80000  /* Needs to have its vpi registered */
 383#define FC_RSCN_DEFERRED        0x100000 /* A deferred RSCN being processed */
 384#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
 385#define FC_VPORT_CVL_RCVD       0x400000 /* VLink failed due to CVL      */
 386#define FC_VFI_REGISTERED       0x800000 /* VFI is registered */
 387#define FC_FDISC_COMPLETED      0x1000000/* FDISC completed */
 388#define FC_DISC_DELAYED         0x2000000/* Delay NPort discovery */
 389
 390        uint32_t ct_flags;
 391#define FC_CT_RFF_ID            0x1      /* RFF_ID accepted by switch */
 392#define FC_CT_RNN_ID            0x2      /* RNN_ID accepted by switch */
 393#define FC_CT_RSNN_NN           0x4      /* RSNN_NN accepted by switch */
 394#define FC_CT_RSPN_ID           0x8      /* RSPN_ID accepted by switch */
 395#define FC_CT_RFT_ID            0x10     /* RFT_ID accepted by switch */
 396
 397        struct list_head fc_nodes;
 398
 399        /* Keep counters for the number of entries in each list. */
 400        uint16_t fc_plogi_cnt;
 401        uint16_t fc_adisc_cnt;
 402        uint16_t fc_reglogin_cnt;
 403        uint16_t fc_prli_cnt;
 404        uint16_t fc_unmap_cnt;
 405        uint16_t fc_map_cnt;
 406        uint16_t fc_npr_cnt;
 407        uint16_t fc_unused_cnt;
 408        struct serv_parm fc_sparam;     /* buffer for our service parameters */
 409
 410        uint32_t fc_myDID;      /* fibre channel S_ID */
 411        uint32_t fc_prevDID;    /* previous fibre channel S_ID */
 412        struct lpfc_name fabric_portname;
 413        struct lpfc_name fabric_nodename;
 414
 415        int32_t stopped;   /* HBA has not been restarted since last ERATT */
 416        uint8_t fc_linkspeed;   /* Link speed after last READ_LA */
 417
 418        uint32_t num_disc_nodes;        /* in addition to hba_state */
 419        uint32_t gidft_inp;             /* cnt of outstanding GID_FTs */
 420
 421        uint32_t fc_nlp_cnt;    /* outstanding NODELIST requests */
 422        uint32_t fc_rscn_id_cnt;        /* count of RSCNs payloads in list */
 423        uint32_t fc_rscn_flush;         /* flag use of fc_rscn_id_list */
 424        struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
 425        struct lpfc_name fc_nodename;   /* fc nodename */
 426        struct lpfc_name fc_portname;   /* fc portname */
 427
 428        struct lpfc_work_evt disc_timeout_evt;
 429
 430        struct timer_list fc_disctmo;   /* Discovery rescue timer */
 431        uint8_t fc_ns_retry;    /* retries for fabric nameserver */
 432        uint32_t fc_prli_sent;  /* cntr for outstanding PRLIs */
 433
 434        spinlock_t work_port_lock;
 435        uint32_t work_port_events; /* Timeout to be handled  */
 436#define WORKER_DISC_TMO                0x1      /* vport: Discovery timeout */
 437#define WORKER_ELS_TMO                 0x2      /* vport: ELS timeout */
 438#define WORKER_DELAYED_DISC_TMO        0x8      /* vport: delayed discovery */
 439
 440#define WORKER_MBOX_TMO                0x100    /* hba: MBOX timeout */
 441#define WORKER_HB_TMO                  0x200    /* hba: Heart beat timeout */
 442#define WORKER_FABRIC_BLOCK_TMO        0x400    /* hba: fabric block timeout */
 443#define WORKER_RAMP_DOWN_QUEUE         0x800    /* hba: Decrease Q depth */
 444#define WORKER_RAMP_UP_QUEUE           0x1000   /* hba: Increase Q depth */
 445#define WORKER_SERVICE_TXQ             0x2000   /* hba: IOCBs on the txq */
 446
 447        struct timer_list els_tmofunc;
 448        struct timer_list delayed_disc_tmo;
 449
 450        int unreg_vpi_cmpl;
 451
 452        uint8_t load_flag;
 453#define FC_LOADING              0x1     /* HBA in process of loading drvr */
 454#define FC_UNLOADING            0x2     /* HBA in process of unloading drvr */
 455#define FC_ALLOW_FDMI           0x4     /* port is ready for FDMI requests */
 456        /* Vport Config Parameters */
 457        uint32_t cfg_scan_down;
 458        uint32_t cfg_lun_queue_depth;
 459        uint32_t cfg_nodev_tmo;
 460        uint32_t cfg_devloss_tmo;
 461        uint32_t cfg_restrict_login;
 462        uint32_t cfg_peer_port_login;
 463        uint32_t cfg_fcp_class;
 464        uint32_t cfg_use_adisc;
 465        uint32_t cfg_discovery_threads;
 466        uint32_t cfg_log_verbose;
 467        uint32_t cfg_enable_fc4_type;
 468        uint32_t cfg_max_luns;
 469        uint32_t cfg_enable_da_id;
 470        uint32_t cfg_max_scsicmpl_time;
 471        uint32_t cfg_tgt_queue_depth;
 472        uint32_t cfg_first_burst_size;
 473        uint32_t dev_loss_tmo_changed;
 474
 475        struct fc_vport *fc_vport;
 476
 477#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 478        struct dentry *debug_disc_trc;
 479        struct dentry *debug_nodelist;
 480        struct dentry *debug_nvmestat;
 481        struct dentry *debug_scsistat;
 482        struct dentry *debug_nvmektime;
 483        struct dentry *debug_cpucheck;
 484        struct dentry *vport_debugfs_root;
 485        struct lpfc_debugfs_trc *disc_trc;
 486        atomic_t disc_trc_cnt;
 487#endif
 488        uint8_t stat_data_enabled;
 489        uint8_t stat_data_blocked;
 490        struct list_head rcv_buffer_list;
 491        unsigned long rcv_buffer_time_stamp;
 492        uint32_t vport_flag;
 493#define STATIC_VPORT    1
 494#define FAWWPN_SET      2
 495#define FAWWPN_PARAM_CHG        4
 496
 497        uint16_t fdmi_num_disc;
 498        uint32_t fdmi_hba_mask;
 499        uint32_t fdmi_port_mask;
 500
 501        /* There is a single nvme instance per vport. */
 502        struct nvme_fc_local_port *localport;
 503        uint8_t  nvmei_support; /* driver supports NVME Initiator */
 504        uint32_t last_fcp_wqidx;
 505        uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
 506};
 507
 508struct hbq_s {
 509        uint16_t entry_count;     /* Current number of HBQ slots */
 510        uint16_t buffer_count;    /* Current number of buffers posted */
 511        uint32_t next_hbqPutIdx;  /* Index to next HBQ slot to use */
 512        uint32_t hbqPutIdx;       /* HBQ slot to use */
 513        uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
 514        void    *hbq_virt;        /* Virtual ptr to this hbq */
 515        struct list_head hbq_buffer_list;  /* buffers assigned to this HBQ */
 516                                  /* Callback for HBQ buffer allocation */
 517        struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
 518                                  /* Callback for HBQ buffer free */
 519        void               (*hbq_free_buffer) (struct lpfc_hba *,
 520                                               struct hbq_dmabuf *);
 521};
 522
 523/* this matches the position in the lpfc_hbq_defs array */
 524#define LPFC_ELS_HBQ    0
 525#define LPFC_MAX_HBQS   1
 526
 527enum hba_temp_state {
 528        HBA_NORMAL_TEMP,
 529        HBA_OVER_TEMP
 530};
 531
 532enum intr_type_t {
 533        NONE = 0,
 534        INTx,
 535        MSI,
 536        MSIX,
 537};
 538
 539#define LPFC_CT_CTX_MAX         64
 540struct unsol_rcv_ct_ctx {
 541        uint32_t ctxt_id;
 542        uint32_t SID;
 543        uint32_t valid;
 544#define UNSOL_INVALID           0
 545#define UNSOL_VALID             1
 546        uint16_t oxid;
 547        uint16_t rxid;
 548};
 549
 550#define LPFC_USER_LINK_SPEED_AUTO       0       /* auto select (default)*/
 551#define LPFC_USER_LINK_SPEED_1G         1       /* 1 Gigabaud */
 552#define LPFC_USER_LINK_SPEED_2G         2       /* 2 Gigabaud */
 553#define LPFC_USER_LINK_SPEED_4G         4       /* 4 Gigabaud */
 554#define LPFC_USER_LINK_SPEED_8G         8       /* 8 Gigabaud */
 555#define LPFC_USER_LINK_SPEED_10G        10      /* 10 Gigabaud */
 556#define LPFC_USER_LINK_SPEED_16G        16      /* 16 Gigabaud */
 557#define LPFC_USER_LINK_SPEED_32G        32      /* 32 Gigabaud */
 558#define LPFC_USER_LINK_SPEED_64G        64      /* 64 Gigabaud */
 559#define LPFC_USER_LINK_SPEED_MAX        LPFC_USER_LINK_SPEED_64G
 560
 561#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
 562
 563enum nemb_type {
 564        nemb_mse = 1,
 565        nemb_hbd
 566};
 567
 568enum mbox_type {
 569        mbox_rd = 1,
 570        mbox_wr
 571};
 572
 573enum dma_type {
 574        dma_mbox = 1,
 575        dma_ebuf
 576};
 577
 578enum sta_type {
 579        sta_pre_addr = 1,
 580        sta_pos_addr
 581};
 582
 583struct lpfc_mbox_ext_buf_ctx {
 584        uint32_t state;
 585#define LPFC_BSG_MBOX_IDLE              0
 586#define LPFC_BSG_MBOX_HOST              1
 587#define LPFC_BSG_MBOX_PORT              2
 588#define LPFC_BSG_MBOX_DONE              3
 589#define LPFC_BSG_MBOX_ABTS              4
 590        enum nemb_type nembType;
 591        enum mbox_type mboxType;
 592        uint32_t numBuf;
 593        uint32_t mbxTag;
 594        uint32_t seqNum;
 595        struct lpfc_dmabuf *mbx_dmabuf;
 596        struct list_head ext_dmabuf_list;
 597};
 598
 599struct lpfc_epd_pool {
 600        /* Expedite pool */
 601        struct list_head list;
 602        u32 count;
 603        spinlock_t lock;        /* lock for expedite pool */
 604};
 605
 606struct lpfc_ras_fwlog {
 607        uint8_t *fwlog_buff;
 608        uint32_t fw_buffcount; /* Buffer size posted to FW */
 609#define LPFC_RAS_BUFF_ENTERIES  16      /* Each entry can hold max of 64k */
 610#define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024)
 611#define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024)
 612#define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
 613        uint32_t fw_loglevel; /* Log level set */
 614        struct lpfc_dmabuf lwpd;
 615        struct list_head fwlog_buff_list;
 616
 617        /* RAS support status on adapter */
 618        bool ras_hwsupport; /* RAS Support available on HW or not */
 619        bool ras_enabled;   /* Ras Enabled for the function */
 620#define LPFC_RAS_DISABLE_LOGGING 0x00
 621#define LPFC_RAS_ENABLE_LOGGING 0x01
 622        bool ras_active;    /* RAS logging running state */
 623};
 624
 625struct lpfc_hba {
 626        /* SCSI interface function jump table entries */
 627        struct lpfc_io_buf * (*lpfc_get_scsi_buf)
 628                (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
 629                struct scsi_cmnd *cmnd);
 630        int (*lpfc_scsi_prep_dma_buf)
 631                (struct lpfc_hba *, struct lpfc_io_buf *);
 632        void (*lpfc_scsi_unprep_dma_buf)
 633                (struct lpfc_hba *, struct lpfc_io_buf *);
 634        void (*lpfc_release_scsi_buf)
 635                (struct lpfc_hba *, struct lpfc_io_buf *);
 636        void (*lpfc_rampdown_queue_depth)
 637                (struct lpfc_hba *);
 638        void (*lpfc_scsi_prep_cmnd)
 639                (struct lpfc_vport *, struct lpfc_io_buf *,
 640                 struct lpfc_nodelist *);
 641
 642        /* IOCB interface function jump table entries */
 643        int (*__lpfc_sli_issue_iocb)
 644                (struct lpfc_hba *, uint32_t,
 645                 struct lpfc_iocbq *, uint32_t);
 646        void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
 647                         struct lpfc_iocbq *);
 648        int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
 649        IOCB_t * (*lpfc_get_iocb_from_iocbq)
 650                (struct lpfc_iocbq *);
 651        void (*lpfc_scsi_cmd_iocb_cmpl)
 652                (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
 653
 654        /* MBOX interface function jump table entries */
 655        int (*lpfc_sli_issue_mbox)
 656                (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
 657
 658        /* Slow-path IOCB process function jump table entries */
 659        void (*lpfc_sli_handle_slow_ring_event)
 660                (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
 661                 uint32_t mask);
 662
 663        /* INIT device interface function jump table entries */
 664        int (*lpfc_sli_hbq_to_firmware)
 665                (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
 666        int (*lpfc_sli_brdrestart)
 667                (struct lpfc_hba *);
 668        int (*lpfc_sli_brdready)
 669                (struct lpfc_hba *, uint32_t);
 670        void (*lpfc_handle_eratt)
 671                (struct lpfc_hba *);
 672        void (*lpfc_stop_port)
 673                (struct lpfc_hba *);
 674        int (*lpfc_hba_init_link)
 675                (struct lpfc_hba *, uint32_t);
 676        int (*lpfc_hba_down_link)
 677                (struct lpfc_hba *, uint32_t);
 678        int (*lpfc_selective_reset)
 679                (struct lpfc_hba *);
 680
 681        int (*lpfc_bg_scsi_prep_dma_buf)
 682                (struct lpfc_hba *, struct lpfc_io_buf *);
 683        /* Add new entries here */
 684
 685        /* expedite pool */
 686        struct lpfc_epd_pool epd_pool;
 687
 688        /* SLI4 specific HBA data structure */
 689        struct lpfc_sli4_hba sli4_hba;
 690
 691        struct workqueue_struct *wq;
 692        struct delayed_work     eq_delay_work;
 693
 694        struct lpfc_sli sli;
 695        uint8_t pci_dev_grp;    /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
 696        uint32_t sli_rev;               /* SLI2, SLI3, or SLI4 */
 697        uint32_t sli3_options;          /* Mask of enabled SLI3 options */
 698#define LPFC_SLI3_HBQ_ENABLED           0x01
 699#define LPFC_SLI3_NPIV_ENABLED          0x02
 700#define LPFC_SLI3_VPORT_TEARDOWN        0x04
 701#define LPFC_SLI3_CRP_ENABLED           0x08
 702#define LPFC_SLI3_BG_ENABLED            0x20
 703#define LPFC_SLI3_DSS_ENABLED           0x40
 704#define LPFC_SLI4_PERFH_ENABLED         0x80
 705#define LPFC_SLI4_PHWQ_ENABLED          0x100
 706        uint32_t iocb_cmd_size;
 707        uint32_t iocb_rsp_size;
 708
 709        struct lpfc_trunk_link  trunk_link;
 710        enum hba_state link_state;
 711        uint32_t link_flag;     /* link state flags */
 712#define LS_LOOPBACK_MODE      0x1       /* NPort is in Loopback mode */
 713                                        /* This flag is set while issuing */
 714                                        /* INIT_LINK mailbox command */
 715#define LS_NPIV_FAB_SUPPORTED 0x2       /* Fabric supports NPIV */
 716#define LS_IGNORE_ERATT       0x4       /* intr handler should ignore ERATT */
 717#define LS_MDS_LINK_DOWN      0x8       /* MDS Diagnostics Link Down */
 718#define LS_MDS_LOOPBACK      0x10       /* MDS Diagnostics Link Up (Loopback) */
 719
 720        uint32_t hba_flag;      /* hba generic flags */
 721#define HBA_ERATT_HANDLED       0x1 /* This flag is set when eratt handled */
 722#define DEFER_ERATT             0x2 /* Deferred error attention in progress */
 723#define HBA_FCOE_MODE           0x4 /* HBA function in FCoE Mode */
 724#define HBA_SP_QUEUE_EVT        0x8 /* Slow-path qevt posted to worker thread*/
 725#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
 726#define ELS_XRI_ABORT_EVENT     0x40
 727#define ASYNC_EVENT             0x80
 728#define LINK_DISABLED           0x100 /* Link disabled by user */
 729#define FCF_TS_INPROG           0x200 /* FCF table scan in progress */
 730#define FCF_RR_INPROG           0x400 /* FCF roundrobin flogi in progress */
 731#define HBA_FIP_SUPPORT         0x800 /* FIP support in HBA */
 732#define HBA_AER_ENABLED         0x1000 /* AER enabled with HBA */
 733#define HBA_DEVLOSS_TMO         0x2000 /* HBA in devloss timeout */
 734#define HBA_RRQ_ACTIVE          0x4000 /* process the rrq active list */
 735#define HBA_FCP_IOQ_FLUSH       0x8000 /* FCP I/O queues being flushed */
 736#define HBA_FW_DUMP_OP          0x10000 /* Skips fn reset before FW dump */
 737#define HBA_RECOVERABLE_UE      0x20000 /* Firmware supports recoverable UE */
 738#define HBA_FORCED_LINK_SPEED   0x40000 /*
 739                                         * Firmware supports Forced Link Speed
 740                                         * capability
 741                                         */
 742#define HBA_NVME_IOQ_FLUSH      0x80000 /* NVME IO queues flushed. */
 743#define HBA_FLOGI_ISSUED        0x100000 /* FLOGI was issued */
 744
 745        uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
 746        struct lpfc_dmabuf slim2p;
 747
 748        MAILBOX_t *mbox;
 749        uint32_t *mbox_ext;
 750        struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
 751        uint32_t ha_copy;
 752        struct _PCB *pcb;
 753        struct _IOCB *IOCBs;
 754
 755        struct lpfc_dmabuf hbqslimp;
 756
 757        uint16_t pci_cfg_value;
 758
 759        uint8_t fc_linkspeed;   /* Link speed after last READ_LA */
 760
 761        uint32_t fc_eventTag;   /* event tag for link attention */
 762        uint32_t link_events;
 763
 764        /* These fields used to be binfo */
 765        uint32_t fc_pref_DID;   /* preferred D_ID */
 766        uint8_t  fc_pref_ALPA;  /* preferred AL_PA */
 767        uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
 768        uint32_t fc_edtov;      /* E_D_TOV timer value */
 769        uint32_t fc_arbtov;     /* ARB_TOV timer value */
 770        uint32_t fc_ratov;      /* R_A_TOV timer value */
 771        uint32_t fc_rttov;      /* R_T_TOV timer value */
 772        uint32_t fc_altov;      /* AL_TOV timer value */
 773        uint32_t fc_crtov;      /* C_R_TOV timer value */
 774
 775        struct serv_parm fc_fabparam;   /* fabric service parameters buffer */
 776        uint8_t alpa_map[128];  /* AL_PA map from READ_LA */
 777
 778        uint32_t lmt;
 779
 780        uint32_t fc_topology;   /* link topology, from LINK INIT */
 781        uint32_t fc_topology_changed;   /* link topology, from LINK INIT */
 782
 783        struct lpfc_stats fc_stat;
 784
 785        struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
 786        uint32_t nport_event_cnt;       /* timestamp for nlplist entry */
 787
 788        uint8_t  wwnn[8];
 789        uint8_t  wwpn[8];
 790        uint32_t RandomData[7];
 791        uint8_t  fcp_embed_io;
 792        uint8_t  nvme_support;  /* Firmware supports NVME */
 793        uint8_t  nvmet_support; /* driver supports NVMET */
 794#define LPFC_NVMET_MAX_PORTS    32
 795        uint8_t  mds_diags_support;
 796        uint8_t  bbcredit_support;
 797        uint8_t  enab_exp_wqcq_pages;
 798
 799        /* HBA Config Parameters */
 800        uint32_t cfg_ack0;
 801        uint32_t cfg_xri_rebalancing;
 802        uint32_t cfg_enable_npiv;
 803        uint32_t cfg_enable_rrq;
 804        uint32_t cfg_topology;
 805        uint32_t cfg_link_speed;
 806#define LPFC_FCF_FOV 1          /* Fast fcf failover */
 807#define LPFC_FCF_PRIORITY 2     /* Priority fcf failover */
 808        uint32_t cfg_fcf_failover_policy;
 809        uint32_t cfg_fcp_io_sched;
 810        uint32_t cfg_ns_query;
 811        uint32_t cfg_fcp2_no_tgt_reset;
 812        uint32_t cfg_cr_delay;
 813        uint32_t cfg_cr_count;
 814        uint32_t cfg_multi_ring_support;
 815        uint32_t cfg_multi_ring_rctl;
 816        uint32_t cfg_multi_ring_type;
 817        uint32_t cfg_poll;
 818        uint32_t cfg_poll_tmo;
 819        uint32_t cfg_task_mgmt_tmo;
 820        uint32_t cfg_use_msi;
 821        uint32_t cfg_auto_imax;
 822        uint32_t cfg_fcp_imax;
 823        uint32_t cfg_force_rscn;
 824        uint32_t cfg_cq_poll_threshold;
 825        uint32_t cfg_cq_max_proc_limit;
 826        uint32_t cfg_fcp_cpu_map;
 827        uint32_t cfg_fcp_mq_threshold;
 828        uint32_t cfg_hdw_queue;
 829        uint32_t cfg_irq_chann;
 830        uint32_t cfg_suppress_rsp;
 831        uint32_t cfg_nvme_oas;
 832        uint32_t cfg_nvme_embed_cmd;
 833        uint32_t cfg_nvmet_mrq_post;
 834        uint32_t cfg_nvmet_mrq;
 835        uint32_t cfg_enable_nvmet;
 836        uint32_t cfg_nvme_enable_fb;
 837        uint32_t cfg_nvmet_fb_size;
 838        uint32_t cfg_total_seg_cnt;
 839        uint32_t cfg_sg_seg_cnt;
 840        uint32_t cfg_nvme_seg_cnt;
 841        uint32_t cfg_scsi_seg_cnt;
 842        uint32_t cfg_sg_dma_buf_size;
 843        uint64_t cfg_soft_wwnn;
 844        uint64_t cfg_soft_wwpn;
 845        uint32_t cfg_hba_queue_depth;
 846        uint32_t cfg_enable_hba_reset;
 847        uint32_t cfg_enable_hba_heartbeat;
 848        uint32_t cfg_fof;
 849        uint32_t cfg_EnableXLane;
 850        uint8_t cfg_oas_tgt_wwpn[8];
 851        uint8_t cfg_oas_vpt_wwpn[8];
 852        uint32_t cfg_oas_lun_state;
 853#define OAS_LUN_ENABLE  1
 854#define OAS_LUN_DISABLE 0
 855        uint32_t cfg_oas_lun_status;
 856#define OAS_LUN_STATUS_EXISTS   0x01
 857        uint32_t cfg_oas_flags;
 858#define OAS_FIND_ANY_VPORT      0x01
 859#define OAS_FIND_ANY_TARGET     0x02
 860#define OAS_LUN_VALID   0x04
 861        uint32_t cfg_oas_priority;
 862        uint32_t cfg_XLanePriority;
 863        uint32_t cfg_enable_bg;
 864        uint32_t cfg_prot_mask;
 865        uint32_t cfg_prot_guard;
 866        uint32_t cfg_hostmem_hgp;
 867        uint32_t cfg_log_verbose;
 868        uint32_t cfg_enable_fc4_type;
 869        uint32_t cfg_aer_support;
 870        uint32_t cfg_sriov_nr_virtfn;
 871        uint32_t cfg_request_firmware_upgrade;
 872        uint32_t cfg_iocb_cnt;
 873        uint32_t cfg_suppress_link_up;
 874        uint32_t cfg_rrq_xri_bitmap_sz;
 875        uint32_t cfg_delay_discovery;
 876        uint32_t cfg_sli_mode;
 877#define LPFC_INITIALIZE_LINK              0     /* do normal init_link mbox */
 878#define LPFC_DELAY_INIT_LINK              1     /* layered driver hold off */
 879#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2     /* wait, manual intervention */
 880        uint32_t cfg_enable_dss;
 881        uint32_t cfg_fdmi_on;
 882#define LPFC_FDMI_NO_SUPPORT    0       /* FDMI not supported */
 883#define LPFC_FDMI_SUPPORT       1       /* FDMI supported? */
 884        uint32_t cfg_enable_SmartSAN;
 885        uint32_t cfg_enable_mds_diags;
 886        uint32_t cfg_ras_fwlog_level;
 887        uint32_t cfg_ras_fwlog_buffsize;
 888        uint32_t cfg_ras_fwlog_func;
 889        uint32_t cfg_enable_bbcr;       /* Enable BB Credit Recovery */
 890        uint32_t cfg_enable_dpp;        /* Enable Direct Packet Push */
 891#define LPFC_ENABLE_FCP  1
 892#define LPFC_ENABLE_NVME 2
 893#define LPFC_ENABLE_BOTH 3
 894        uint32_t cfg_enable_pbde;
 895        struct nvmet_fc_target_port *targetport;
 896        lpfc_vpd_t vpd;         /* vital product data */
 897
 898        struct pci_dev *pcidev;
 899        struct list_head      work_list;
 900        uint32_t              work_ha;      /* Host Attention Bits for WT */
 901        uint32_t              work_ha_mask; /* HA Bits owned by WT        */
 902        uint32_t              work_hs;      /* HS stored in case of ERRAT */
 903        uint32_t              work_status[2]; /* Extra status from SLIM */
 904
 905        wait_queue_head_t    work_waitq;
 906        struct task_struct   *worker_thread;
 907        unsigned long data_flags;
 908
 909        uint32_t hbq_in_use;            /* HBQs in use flag */
 910        uint32_t hbq_count;             /* Count of configured HBQs */
 911        struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies  */
 912
 913        atomic_t fcp_qidx;         /* next FCP WQ (RR Policy) */
 914        atomic_t nvme_qidx;        /* next NVME WQ (RR Policy) */
 915
 916        phys_addr_t pci_bar0_map;     /* Physical address for PCI BAR0 */
 917        phys_addr_t pci_bar1_map;     /* Physical address for PCI BAR1 */
 918        phys_addr_t pci_bar2_map;     /* Physical address for PCI BAR2 */
 919        void __iomem *slim_memmap_p;    /* Kernel memory mapped address for
 920                                           PCI BAR0 */
 921        void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
 922                                            PCI BAR2 */
 923
 924        void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
 925                                            PCI BAR0 with dual-ULP support */
 926        void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
 927                                            PCI BAR2 with dual-ULP support */
 928        void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
 929                                            PCI BAR4 with dual-ULP support */
 930#define PCI_64BIT_BAR0  0
 931#define PCI_64BIT_BAR2  2
 932#define PCI_64BIT_BAR4  4
 933        void __iomem *MBslimaddr;       /* virtual address for mbox cmds */
 934        void __iomem *HAregaddr;        /* virtual address for host attn reg */
 935        void __iomem *CAregaddr;        /* virtual address for chip attn reg */
 936        void __iomem *HSregaddr;        /* virtual address for host status
 937                                           reg */
 938        void __iomem *HCregaddr;        /* virtual address for host ctl reg */
 939
 940        struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
 941        struct lpfc_pgp   *port_gp;
 942        uint32_t __iomem  *hbq_put;     /* Address in SLIM to HBQ put ptrs */
 943        uint32_t          *hbq_get;     /* Host mem address of HBQ get ptrs */
 944
 945        int brd_no;                     /* FC board number */
 946        char SerialNumber[32];          /* adapter Serial Number */
 947        char OptionROMVersion[32];      /* adapter BIOS / Fcode version */
 948        char BIOSVersion[16];           /* Boot BIOS version */
 949        char ModelDesc[256];            /* Model Description */
 950        char ModelName[80];             /* Model Name */
 951        char ProgramType[256];          /* Program Type */
 952        char Port[20];                  /* Port No */
 953        uint8_t vpd_flag;               /* VPD data flag */
 954
 955#define VPD_MODEL_DESC      0x1         /* valid vpd model description */
 956#define VPD_MODEL_NAME      0x2         /* valid vpd model name */
 957#define VPD_PROGRAM_TYPE    0x4         /* valid vpd program type */
 958#define VPD_PORT            0x8         /* valid vpd port data */
 959#define VPD_MASK            0xf         /* mask for any vpd data */
 960
 961        uint8_t soft_wwn_enable;
 962
 963        struct timer_list fcp_poll_timer;
 964        struct timer_list eratt_poll;
 965        uint32_t eratt_poll_interval;
 966
 967        uint64_t bg_guard_err_cnt;
 968        uint64_t bg_apptag_err_cnt;
 969        uint64_t bg_reftag_err_cnt;
 970
 971        /* fastpath list. */
 972        spinlock_t scsi_buf_list_get_lock;  /* SCSI buf alloc list lock */
 973        spinlock_t scsi_buf_list_put_lock;  /* SCSI buf free list lock */
 974        struct list_head lpfc_scsi_buf_list_get;
 975        struct list_head lpfc_scsi_buf_list_put;
 976        uint32_t total_scsi_bufs;
 977        struct list_head lpfc_iocb_list;
 978        uint32_t total_iocbq_bufs;
 979        struct list_head active_rrq_list;
 980        spinlock_t hbalock;
 981
 982        /* dma_mem_pools */
 983        struct dma_pool *lpfc_sg_dma_buf_pool;
 984        struct dma_pool *lpfc_mbuf_pool;
 985        struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
 986        struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
 987        struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
 988        struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
 989        struct dma_pool *txrdy_payload_pool;
 990        struct lpfc_dma_pool lpfc_mbuf_safety_pool;
 991
 992        mempool_t *mbox_mem_pool;
 993        mempool_t *nlp_mem_pool;
 994        mempool_t *rrq_pool;
 995        mempool_t *active_rrq_pool;
 996
 997        struct fc_host_statistics link_stats;
 998        enum intr_type_t intr_type;
 999        uint32_t intr_mode;
1000#define LPFC_INTR_ERROR 0xFFFFFFFF

1001        struct list_head port_list;
1002        spinlock_t port_list_lock;      /* lock for port_list mutations */
1003        struct lpfc_vport *pport;       /* physical lpfc_vport pointer */
1004        uint16_t max_vpi;               /* Maximum virtual nports */
1005#define LPFC_MAX_VPI    0xFF            /* Max number VPI supported 0 - 0xff */
1006#define LPFC_MAX_VPORTS 0x100           /* Max vports per port, with pport */
1007        uint16_t max_vports;            /*
1008                                         * For IOV HBAs max_vpi can change
1009                                         * after a reset. max_vports is max
1010                                         * number of vports present. This can
1011                                         * be greater than max_vpi.
1012                                         */
1013        uint16_t vpi_base;
1014        uint16_t vfi_base;
1015        unsigned long *vpi_bmask;       /* vpi allocation table */
1016        uint16_t *vpi_ids;
1017        uint16_t vpi_count;
1018        struct list_head lpfc_vpi_blk_list;
1019
1020        /* Data structure used by fabric iocb scheduler */
1021        struct list_head fabric_iocb_list;
1022        atomic_t fabric_iocb_count;
1023        struct timer_list fabric_block_timer;
1024        unsigned long bit_flags;
1025#define FABRIC_COMANDS_BLOCKED  0
1026        atomic_t num_rsrc_err;
1027        atomic_t num_cmd_success;
1028        unsigned long last_rsrc_error_time;
1029        unsigned long last_ramp_down_time;
1030#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1031        struct dentry *hba_debugfs_root;
1032        atomic_t debugfs_vport_count;
1033        struct dentry *debug_multixri_pools;
1034        struct dentry *debug_hbqinfo;
1035        struct dentry *debug_dumpHostSlim;
1036        struct dentry *debug_dumpHBASlim;
1037        struct dentry *debug_dumpData;   /* BlockGuard BPL */
1038        struct dentry *debug_dumpDif;    /* BlockGuard BPL */
1039        struct dentry *debug_InjErrLBA;  /* LBA to inject errors at */
1040        struct dentry *debug_InjErrNPortID;  /* NPortID to inject errors at */
1041        struct dentry *debug_InjErrWWPN;  /* WWPN to inject errors at */
1042        struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1043        struct dentry *debug_writeApp;   /* inject write app_tag errors */
1044        struct dentry *debug_writeRef;   /* inject write ref_tag errors */
1045        struct dentry *debug_readGuard;  /* inject read guard_tag errors */
1046        struct dentry *debug_readApp;    /* inject read app_tag errors */
1047        struct dentry *debug_readRef;    /* inject read ref_tag errors */
1048
1049        struct dentry *debug_nvmeio_trc;
1050        struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1051        struct dentry *debug_hdwqinfo;
1052#ifdef LPFC_HDWQ_LOCK_STAT
1053        struct dentry *debug_lockstat;
1054#endif
1055        atomic_t nvmeio_trc_cnt;
1056        uint32_t nvmeio_trc_size;
1057        uint32_t nvmeio_trc_output_idx;
1058
1059        /* T10 DIF error injection */
1060        uint32_t lpfc_injerr_wgrd_cnt;
1061        uint32_t lpfc_injerr_wapp_cnt;
1062        uint32_t lpfc_injerr_wref_cnt;
1063        uint32_t lpfc_injerr_rgrd_cnt;
1064        uint32_t lpfc_injerr_rapp_cnt;
1065        uint32_t lpfc_injerr_rref_cnt;
1066        uint32_t lpfc_injerr_nportid;
1067        struct lpfc_name lpfc_injerr_wwpn;
1068        sector_t lpfc_injerr_lba;
1069#define LPFC_INJERR_LBA_OFF     (sector_t)(-1)
1070
1071        struct dentry *debug_slow_ring_trc;
1072        struct lpfc_debugfs_trc *slow_ring_trc;
1073        atomic_t slow_ring_trc_cnt;
1074        /* iDiag debugfs sub-directory */
1075        struct dentry *idiag_root;
1076        struct dentry *idiag_pci_cfg;
1077        struct dentry *idiag_bar_acc;
1078        struct dentry *idiag_que_info;
1079        struct dentry *idiag_que_acc;
1080        struct dentry *idiag_drb_acc;
1081        struct dentry *idiag_ctl_acc;
1082        struct dentry *idiag_mbx_acc;
1083        struct dentry *idiag_ext_acc;
1084        uint8_t lpfc_idiag_last_eq;
1085#endif
1086        uint16_t nvmeio_trc_on;
1087
1088        /* Used for deferred freeing of ELS data buffers */
1089        struct list_head elsbuf;
1090        int elsbuf_cnt;
1091        int elsbuf_prev_cnt;
1092
1093        uint8_t temp_sensor_support;
1094        /* Fields used for heart beat. */
1095        unsigned long last_completion_time;
1096        unsigned long skipped_hb;
1097        struct timer_list hb_tmofunc;
1098        uint8_t hb_outstanding;
1099        struct timer_list rrq_tmr;
1100        enum hba_temp_state over_temp_state;
1101        /* ndlp reference management */
1102        spinlock_t ndlp_lock;
1103        /*
1104         * Following bit will be set for all buffer tags which are not
1105         * associated with any HBQ.
1106         */
1107#define QUE_BUFTAG_BIT  (1<<31)
1108        uint32_t buffer_tag_count;
1109        int wait_4_mlo_maint_flg;
1110        wait_queue_head_t wait_4_mlo_m_q;
1111        /* data structure used for latency data collection */
1112#define LPFC_NO_BUCKET     0
1113#define LPFC_LINEAR_BUCKET 1
1114#define LPFC_POWER2_BUCKET 2
1115        uint8_t  bucket_type;
1116        uint32_t bucket_base;
1117        uint32_t bucket_step;
1118
1119/* Maximum number of events that can be outstanding at any time*/
1120#define LPFC_MAX_EVT_COUNT 512
1121        atomic_t fast_event_count;
1122        uint32_t fcoe_eventtag;
1123        uint32_t fcoe_eventtag_at_fcf_scan;
1124        uint32_t fcoe_cvl_eventtag;
1125        uint32_t fcoe_cvl_eventtag_attn;
1126        struct lpfc_fcf fcf;
1127        uint8_t fc_map[3];
1128        uint8_t valid_vlan;
1129        uint16_t vlan_id;
1130        struct list_head fcf_conn_rec_list;
1131
1132        bool defer_flogi_acc_flag;
1133        uint16_t defer_flogi_acc_rx_id;
1134        uint16_t defer_flogi_acc_ox_id;
1135
1136        spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1137        struct list_head ct_ev_waiters;
1138        struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1139        uint32_t ctx_idx;
1140
1141        /* RAS Support */
1142        struct lpfc_ras_fwlog ras_fwlog;
1143
1144        uint8_t menlo_flag;     /* menlo generic flags */
1145#define HBA_MENLO_SUPPORT       0x1 /* HBA supports menlo commands */
1146        uint32_t iocb_cnt;
1147        uint32_t iocb_max;
1148        atomic_t sdev_cnt;
1149        uint8_t fips_spec_rev;
1150        uint8_t fips_level;
1151        spinlock_t devicelock;  /* lock for luns list */
1152        mempool_t *device_data_mem_pool;
1153        struct list_head luns;
1154#define LPFC_TRANSGRESSION_HIGH_TEMPERATURE     0x0080
1155#define LPFC_TRANSGRESSION_LOW_TEMPERATURE      0x0040
1156#define LPFC_TRANSGRESSION_HIGH_VOLTAGE         0x0020
1157#define LPFC_TRANSGRESSION_LOW_VOLTAGE          0x0010
1158#define LPFC_TRANSGRESSION_HIGH_TXBIAS          0x0008
1159#define LPFC_TRANSGRESSION_LOW_TXBIAS           0x0004
1160#define LPFC_TRANSGRESSION_HIGH_TXPOWER         0x0002
1161#define LPFC_TRANSGRESSION_LOW_TXPOWER          0x0001
1162#define LPFC_TRANSGRESSION_HIGH_RXPOWER         0x8000
1163#define LPFC_TRANSGRESSION_LOW_RXPOWER          0x4000
1164        uint16_t sfp_alarm;
1165        uint16_t sfp_warning;
1166
1167#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1168        uint16_t cpucheck_on;
1169#define LPFC_CHECK_OFF          0
1170#define LPFC_CHECK_NVME_IO      1
1171#define LPFC_CHECK_NVMET_RCV    2
1172#define LPFC_CHECK_NVMET_IO     4
1173#define LPFC_CHECK_SCSI_IO      8
1174        uint16_t ktime_on;
1175        uint64_t ktime_data_samples;
1176        uint64_t ktime_status_samples;
1177        uint64_t ktime_last_cmd;
1178        uint64_t ktime_seg1_total;
1179        uint64_t ktime_seg1_min;
1180        uint64_t ktime_seg1_max;
1181        uint64_t ktime_seg2_total;
1182        uint64_t ktime_seg2_min;
1183        uint64_t ktime_seg2_max;
1184        uint64_t ktime_seg3_total;
1185        uint64_t ktime_seg3_min;
1186        uint64_t ktime_seg3_max;
1187        uint64_t ktime_seg4_total;
1188        uint64_t ktime_seg4_min;
1189        uint64_t ktime_seg4_max;
1190        uint64_t ktime_seg5_total;
1191        uint64_t ktime_seg5_min;
1192        uint64_t ktime_seg5_max;
1193        uint64_t ktime_seg6_total;
1194        uint64_t ktime_seg6_min;
1195        uint64_t ktime_seg6_max;
1196        uint64_t ktime_seg7_total;
1197        uint64_t ktime_seg7_min;
1198        uint64_t ktime_seg7_max;
1199        uint64_t ktime_seg8_total;
1200        uint64_t ktime_seg8_min;
1201        uint64_t ktime_seg8_max;
1202        uint64_t ktime_seg9_total;
1203        uint64_t ktime_seg9_min;
1204        uint64_t ktime_seg9_max;
1205        uint64_t ktime_seg10_total;
1206        uint64_t ktime_seg10_min;
1207        uint64_t ktime_seg10_max;
1208#endif
1209};
1210
1211static inline struct Scsi_Host *
1212lpfc_shost_from_vport(struct lpfc_vport *vport)
1213{
1214        return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1215}
1216
1217static inline void
1218lpfc_set_loopback_flag(struct lpfc_hba *phba)
1219{
1220        if (phba->cfg_topology == FLAGS_LOCAL_LB)
1221                phba->link_flag |= LS_LOOPBACK_MODE;
1222        else
1223                phba->link_flag &= ~LS_LOOPBACK_MODE;
1224}
1225
1226static inline int
1227lpfc_is_link_up(struct lpfc_hba *phba)
1228{
1229        return  phba->link_state == LPFC_LINK_UP ||
1230                phba->link_state == LPFC_CLEAR_LA ||
1231                phba->link_state == LPFC_HBA_READY;
1232}
1233
1234static inline void
1235lpfc_worker_wake_up(struct lpfc_hba *phba)
1236{
1237        /* Set the lpfc data pending flag */
1238        set_bit(LPFC_DATA_READY, &phba->data_flags);
1239
1240        /* Wake up worker thread */
1241        wake_up(&phba->work_waitq);
1242        return;
1243}
1244
1245static inline int
1246lpfc_readl(void __iomem *addr, uint32_t *data)
1247{
1248        uint32_t temp;
1249        temp = readl(addr);
1250        if (temp == 0xffffffff)
1251                return -EIO;
1252        *data = temp;
1253        return 0;
1254}
1255
1256static inline int
1257lpfc_sli_read_hs(struct lpfc_hba *phba)
1258{
1259        /*
1260         * There was a link/board error. Read the status register to retrieve
1261         * the error event and process it.
1262         */
1263        phba->sli.slistat.err_attn_event++;
1264
1265        /* Save status info and check for unplug error */
1266        if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1267                lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1268                lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1269                return -EIO;
1270        }
1271
1272        /* Clear chip Host Attention error bit */
1273        writel(HA_ERATT, phba->HAregaddr);
1274        readl(phba->HAregaddr); /* flush */
1275        phba->pport->stopped = 1;
1276
1277        return 0;
1278}
1279
1280static inline struct lpfc_sli_ring *
1281lpfc_phba_elsring(struct lpfc_hba *phba)
1282{
1283        /* Return NULL if sli_rev has become invalid due to bad fw */
1284        if (phba->sli_rev != LPFC_SLI_REV4  &&
1285            phba->sli_rev != LPFC_SLI_REV3  &&
1286            phba->sli_rev != LPFC_SLI_REV2)
1287                return NULL;
1288
1289        if (phba->sli_rev == LPFC_SLI_REV4) {
1290                if (phba->sli4_hba.els_wq)
1291                        return phba->sli4_hba.els_wq->pring;
1292                else
1293                        return NULL;
1294        }
1295        return &phba->sli.sli3_ring[LPFC_ELS_RING];
1296}
1297
1298/**
1299 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1300 * @phba: Pointer to HBA context object.
1301 * @q: The Event Queue to update.
1302 * @delay: The delay value (in us) to be written.
1303 *
1304 **/
1305static inline void
1306lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1307                           u32 delay)
1308{
1309        struct lpfc_register reg_data;
1310
1311        reg_data.word0 = 0;
1312        bf_set(lpfc_sliport_eqdelay_id, &reg_data, eq->queue_id);
1313        bf_set(lpfc_sliport_eqdelay_delay, &reg_data, delay);
1314        writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1315        eq->q_mode = delay;
1316}
1317