linux/drivers/spi/spi-gpio.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * SPI master driver using generic bitbanged GPIO
   4 *
   5 * Copyright (C) 2006,2008 David Brownell
   6 * Copyright (C) 2017 Linus Walleij
   7 */
   8#include <linux/kernel.h>
   9#include <linux/module.h>
  10#include <linux/platform_device.h>
  11#include <linux/gpio/consumer.h>
  12#include <linux/of.h>
  13#include <linux/of_device.h>
  14
  15#include <linux/spi/spi.h>
  16#include <linux/spi/spi_bitbang.h>
  17#include <linux/spi/spi_gpio.h>
  18
  19
  20/*
  21 * This bitbanging SPI master driver should help make systems usable
  22 * when a native hardware SPI engine is not available, perhaps because
  23 * its driver isn't yet working or because the I/O pins it requires
  24 * are used for other purposes.
  25 *
  26 * platform_device->driver_data ... points to spi_gpio
  27 *
  28 * spi->controller_state ... reserved for bitbang framework code
  29 *
  30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
  31 */
  32
  33struct spi_gpio {
  34        struct spi_bitbang              bitbang;
  35        struct gpio_desc                *sck;
  36        struct gpio_desc                *miso;
  37        struct gpio_desc                *mosi;
  38        struct gpio_desc                **cs_gpios;
  39};
  40
  41/*----------------------------------------------------------------------*/
  42
  43/*
  44 * Because the overhead of going through four GPIO procedure calls
  45 * per transferred bit can make performance a problem, this code
  46 * is set up so that you can use it in either of two ways:
  47 *
  48 *   - The slow generic way:  set up platform_data to hold the GPIO
  49 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
  50 *     each of them.  This driver can handle several such busses.
  51 *
  52 *   - The quicker inlined way:  only helps with platform GPIO code
  53 *     that inlines operations for constant GPIOs.  This can give
  54 *     you tight (fast!) inner loops, but each such bus needs a
  55 *     new driver.  You'll define a new C file, with Makefile and
  56 *     Kconfig support; the C code can be a total of six lines:
  57 *
  58 *              #define DRIVER_NAME     "myboard_spi2"
  59 *              #define SPI_MISO_GPIO   119
  60 *              #define SPI_MOSI_GPIO   120
  61 *              #define SPI_SCK_GPIO    121
  62 *              #define SPI_N_CHIPSEL   4
  63 *              #include "spi-gpio.c"
  64 */
  65
  66#ifndef DRIVER_NAME
  67#define DRIVER_NAME     "spi_gpio"
  68
  69#define GENERIC_BITBANG /* vs tight inlines */
  70
  71#endif
  72
  73/*----------------------------------------------------------------------*/
  74
  75static inline struct spi_gpio *__pure
  76spi_to_spi_gpio(const struct spi_device *spi)
  77{
  78        const struct spi_bitbang        *bang;
  79        struct spi_gpio                 *spi_gpio;
  80
  81        bang = spi_master_get_devdata(spi->master);
  82        spi_gpio = container_of(bang, struct spi_gpio, bitbang);
  83        return spi_gpio;
  84}
  85
  86/* These helpers are in turn called by the bitbang inlines */
  87static inline void setsck(const struct spi_device *spi, int is_on)
  88{
  89        struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  90
  91        gpiod_set_value_cansleep(spi_gpio->sck, is_on);
  92}
  93
  94static inline void setmosi(const struct spi_device *spi, int is_on)
  95{
  96        struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
  97
  98        gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
  99}
 100
 101static inline int getmiso(const struct spi_device *spi)
 102{
 103        struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 104
 105        if (spi->mode & SPI_3WIRE)
 106                return !!gpiod_get_value_cansleep(spi_gpio->mosi);
 107        else
 108                return !!gpiod_get_value_cansleep(spi_gpio->miso);
 109}
 110
 111/*
 112 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
 113 * requested device clock.  Software overhead means we usually have trouble
 114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
 115 * we'll just assume we never need additional per-bit slowdowns.
 116 */
 117#define spidelay(nsecs) do {} while (0)
 118
 119#include "spi-bitbang-txrx.h"
 120
 121/*
 122 * These functions can leverage inline expansion of GPIO calls to shrink
 123 * costs for a txrx bit, often by factors of around ten (by instruction
 124 * count).  That is particularly visible for larger word sizes, but helps
 125 * even with default 8-bit words.
 126 *
 127 * REVISIT overheads calling these functions for each word also have
 128 * significant performance costs.  Having txrx_bufs() calls that inline
 129 * the txrx_word() logic would help performance, e.g. on larger blocks
 130 * used with flash storage or MMC/SD.  There should also be ways to make
 131 * GCC be less stupid about reloading registers inside the I/O loops,
 132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
 133 */
 134
 135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
 136                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 137{
 138        return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
 139}
 140
 141static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
 142                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 143{
 144        return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
 145}
 146
 147static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
 148                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 149{
 150        return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
 151}
 152
 153static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
 154                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 155{
 156        return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
 157}
 158
 159/*
 160 * These functions do not call setmosi or getmiso if respective flag
 161 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
 162 * call when such pin is not present or defined in the controller.
 163 * A separate set of callbacks is defined to get highest possible
 164 * speed in the generic case (when both MISO and MOSI lines are
 165 * available), as optimiser will remove the checks when argument is
 166 * constant.
 167 */
 168
 169static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
 170                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 171{
 172        flags = spi->master->flags;
 173        return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
 174}
 175
 176static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
 177                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 178{
 179        flags = spi->master->flags;
 180        return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
 181}
 182
 183static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
 184                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 185{
 186        flags = spi->master->flags;
 187        return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
 188}
 189
 190static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
 191                unsigned nsecs, u32 word, u8 bits, unsigned flags)
 192{
 193        flags = spi->master->flags;
 194        return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
 195}
 196
 197/*----------------------------------------------------------------------*/
 198
 199static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
 200{
 201        struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 202
 203        /* set initial clock line level */
 204        if (is_active)
 205                gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
 206
 207        /* Drive chip select line, if we have one */
 208        if (spi_gpio->cs_gpios) {
 209                struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
 210
 211                /* SPI chip selects are normally active-low */
 212                gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
 213        }
 214}
 215
 216static int spi_gpio_setup(struct spi_device *spi)
 217{
 218        struct gpio_desc        *cs;
 219        int                     status = 0;
 220        struct spi_gpio         *spi_gpio = spi_to_spi_gpio(spi);
 221
 222        /*
 223         * The CS GPIOs have already been
 224         * initialized from the descriptor lookup.
 225         */
 226        if (spi_gpio->cs_gpios) {
 227                cs = spi_gpio->cs_gpios[spi->chip_select];
 228                if (!spi->controller_state && cs)
 229                        status = gpiod_direction_output(cs,
 230                                                  !(spi->mode & SPI_CS_HIGH));
 231        }
 232
 233        if (!status)
 234                status = spi_bitbang_setup(spi);
 235
 236        return status;
 237}
 238
 239static int spi_gpio_set_direction(struct spi_device *spi, bool output)
 240{
 241        struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 242        int ret;
 243
 244        if (output)
 245                return gpiod_direction_output(spi_gpio->mosi, 1);
 246
 247        ret = gpiod_direction_input(spi_gpio->mosi);
 248        if (ret)
 249                return ret;
 250        /*
 251         * Send a turnaround high impedance cycle when switching
 252         * from output to input. Theoretically there should be
 253         * a clock delay here, but as has been noted above, the
 254         * nsec delay function for bit-banged GPIO is simply
 255         * {} because bit-banging just doesn't get fast enough
 256         * anyway.
 257         */
 258        if (spi->mode & SPI_3WIRE_HIZ) {
 259                gpiod_set_value_cansleep(spi_gpio->sck,
 260                                         !(spi->mode & SPI_CPOL));
 261                gpiod_set_value_cansleep(spi_gpio->sck,
 262                                         !!(spi->mode & SPI_CPOL));
 263        }
 264        return 0;
 265}
 266
 267static void spi_gpio_cleanup(struct spi_device *spi)
 268{
 269        spi_bitbang_cleanup(spi);
 270}
 271
 272/*
 273 * It can be convenient to use this driver with pins that have alternate
 274 * functions associated with a "native" SPI controller if a driver for that
 275 * controller is not available, or is missing important functionality.
 276 *
 277 * On platforms which can do so, configure MISO with a weak pullup unless
 278 * there's an external pullup on that signal.  That saves power by avoiding
 279 * floating signals.  (A weak pulldown would save power too, but many
 280 * drivers expect to see all-ones data as the no slave "response".)
 281 */
 282static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
 283{
 284        spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
 285        if (IS_ERR(spi_gpio->mosi))
 286                return PTR_ERR(spi_gpio->mosi);
 287
 288        spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
 289        if (IS_ERR(spi_gpio->miso))
 290                return PTR_ERR(spi_gpio->miso);
 291
 292        spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
 293        if (IS_ERR(spi_gpio->sck))
 294                return PTR_ERR(spi_gpio->sck);
 295
 296        return 0;
 297}
 298
 299#ifdef CONFIG_OF
 300static const struct of_device_id spi_gpio_dt_ids[] = {
 301        { .compatible = "spi-gpio" },
 302        {}
 303};
 304MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
 305
 306static int spi_gpio_probe_dt(struct platform_device *pdev,
 307                             struct spi_master *master)
 308{
 309        master->dev.of_node = pdev->dev.of_node;
 310        master->use_gpio_descriptors = true;
 311
 312        return 0;
 313}
 314#else
 315static inline int spi_gpio_probe_dt(struct platform_device *pdev,
 316                                    struct spi_master *master)
 317{
 318        return 0;
 319}
 320#endif
 321
 322static int spi_gpio_probe_pdata(struct platform_device *pdev,
 323                                struct spi_master *master)
 324{
 325        struct device *dev = &pdev->dev;
 326        struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
 327        struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
 328        int i;
 329
 330#ifdef GENERIC_BITBANG
 331        if (!pdata || !pdata->num_chipselect)
 332                return -ENODEV;
 333#endif
 334        /*
 335         * The master needs to think there is a chipselect even if not
 336         * connected
 337         */
 338        master->num_chipselect = pdata->num_chipselect ?: 1;
 339
 340        spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
 341                                          sizeof(*spi_gpio->cs_gpios),
 342                                          GFP_KERNEL);
 343        if (!spi_gpio->cs_gpios)
 344                return -ENOMEM;
 345
 346        for (i = 0; i < master->num_chipselect; i++) {
 347                spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
 348                                                             GPIOD_OUT_HIGH);
 349                if (IS_ERR(spi_gpio->cs_gpios[i]))
 350                        return PTR_ERR(spi_gpio->cs_gpios[i]);
 351        }
 352
 353        return 0;
 354}
 355
 356static void spi_gpio_put(void *data)
 357{
 358        spi_master_put(data);
 359}
 360
 361static int spi_gpio_probe(struct platform_device *pdev)
 362{
 363        int                             status;
 364        struct spi_master               *master;
 365        struct spi_gpio                 *spi_gpio;
 366        struct device                   *dev = &pdev->dev;
 367        struct spi_bitbang              *bb;
 368        const struct of_device_id       *of_id;
 369
 370        of_id = of_match_device(spi_gpio_dt_ids, &pdev->dev);
 371
 372        master = spi_alloc_master(dev, sizeof(*spi_gpio));
 373        if (!master)
 374                return -ENOMEM;
 375
 376        status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master);
 377        if (status)
 378                return status;
 379
 380        if (of_id)
 381                status = spi_gpio_probe_dt(pdev, master);
 382        else
 383                status = spi_gpio_probe_pdata(pdev, master);
 384
 385        if (status)
 386                return status;
 387
 388        spi_gpio = spi_master_get_devdata(master);
 389
 390        status = spi_gpio_request(dev, spi_gpio);
 391        if (status)
 392                return status;
 393
 394        master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
 395        master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
 396                            SPI_CS_HIGH;
 397        if (!spi_gpio->mosi) {
 398                /* HW configuration without MOSI pin
 399                 *
 400                 * No setting SPI_MASTER_NO_RX here - if there is only
 401                 * a MOSI pin connected the host can still do RX by
 402                 * changing the direction of the line.
 403                 */
 404                master->flags = SPI_MASTER_NO_TX;
 405        }
 406
 407        master->bus_num = pdev->id;
 408        master->setup = spi_gpio_setup;
 409        master->cleanup = spi_gpio_cleanup;
 410
 411        bb = &spi_gpio->bitbang;
 412        bb->master = master;
 413        /*
 414         * There is some additional business, apart from driving the CS GPIO
 415         * line, that we need to do on selection. This makes the local
 416         * callback for chipselect always get called.
 417         */
 418        master->flags |= SPI_MASTER_GPIO_SS;
 419        bb->chipselect = spi_gpio_chipselect;
 420        bb->set_line_direction = spi_gpio_set_direction;
 421
 422        if (master->flags & SPI_MASTER_NO_TX) {
 423                bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
 424                bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
 425                bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
 426                bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
 427        } else {
 428                bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
 429                bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
 430                bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
 431                bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
 432        }
 433        bb->setup_transfer = spi_bitbang_setup_transfer;
 434
 435        status = spi_bitbang_init(&spi_gpio->bitbang);
 436        if (status)
 437                return status;
 438
 439        return devm_spi_register_master(&pdev->dev, spi_master_get(master));
 440}
 441
 442MODULE_ALIAS("platform:" DRIVER_NAME);
 443
 444static struct platform_driver spi_gpio_driver = {
 445        .driver = {
 446                .name   = DRIVER_NAME,
 447                .of_match_table = of_match_ptr(spi_gpio_dt_ids),
 448        },
 449        .probe          = spi_gpio_probe,
 450};
 451module_platform_driver(spi_gpio_driver);
 452
 453MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
 454MODULE_AUTHOR("David Brownell");
 455MODULE_LICENSE("GPL");
 456