1/* SPDX-License-Identifier: GPL-2.0 */ 2/****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7#ifndef __HAL_COMMON_H__ 8#define __HAL_COMMON_H__ 9 10/* */ 11/* Rate Definition */ 12/* */ 13/* CCK */ 14#define RATR_1M 0x00000001 15#define RATR_2M 0x00000002 16#define RATR_55M 0x00000004 17#define RATR_11M 0x00000008 18/* OFDM */ 19#define RATR_6M 0x00000010 20#define RATR_9M 0x00000020 21#define RATR_12M 0x00000040 22#define RATR_18M 0x00000080 23#define RATR_24M 0x00000100 24#define RATR_36M 0x00000200 25#define RATR_48M 0x00000400 26#define RATR_54M 0x00000800 27/* MCS 1 Spatial Stream */ 28#define RATR_MCS0 0x00001000 29#define RATR_MCS1 0x00002000 30#define RATR_MCS2 0x00004000 31#define RATR_MCS3 0x00008000 32#define RATR_MCS4 0x00010000 33#define RATR_MCS5 0x00020000 34#define RATR_MCS6 0x00040000 35#define RATR_MCS7 0x00080000 36/* MCS 2 Spatial Stream */ 37#define RATR_MCS8 0x00100000 38#define RATR_MCS9 0x00200000 39#define RATR_MCS10 0x00400000 40#define RATR_MCS11 0x00800000 41#define RATR_MCS12 0x01000000 42#define RATR_MCS13 0x02000000 43#define RATR_MCS14 0x04000000 44#define RATR_MCS15 0x08000000 45 46/* CCK */ 47#define RATE_1M BIT(0) 48#define RATE_2M BIT(1) 49#define RATE_5_5M BIT(2) 50#define RATE_11M BIT(3) 51/* OFDM */ 52#define RATE_6M BIT(4) 53#define RATE_9M BIT(5) 54#define RATE_12M BIT(6) 55#define RATE_18M BIT(7) 56#define RATE_24M BIT(8) 57#define RATE_36M BIT(9) 58#define RATE_48M BIT(10) 59#define RATE_54M BIT(11) 60/* MCS 1 Spatial Stream */ 61#define RATE_MCS0 BIT(12) 62#define RATE_MCS1 BIT(13) 63#define RATE_MCS2 BIT(14) 64#define RATE_MCS3 BIT(15) 65#define RATE_MCS4 BIT(16) 66#define RATE_MCS5 BIT(17) 67#define RATE_MCS6 BIT(18) 68#define RATE_MCS7 BIT(19) 69/* MCS 2 Spatial Stream */ 70#define RATE_MCS8 BIT(20) 71#define RATE_MCS9 BIT(21) 72#define RATE_MCS10 BIT(22) 73#define RATE_MCS11 BIT(23) 74#define RATE_MCS12 BIT(24) 75#define RATE_MCS13 BIT(25) 76#define RATE_MCS14 BIT(26) 77#define RATE_MCS15 BIT(27) 78 79/* ALL CCK Rate */ 80#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M) 81#define RATE_ALL_OFDM_AG (RATR_6M | RATR_9M | RATR_12M | RATR_18M | \ 82 RATR_24M | RATR_36M | RATR_48M | RATR_54M) 83#define RATE_ALL_OFDM_1SS (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | \ 84 RATR_MCS3 | RATR_MCS4 | RATR_MCS5|RATR_MCS6 | \ 85 RATR_MCS7) 86#define RATE_ALL_OFDM_2SS (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | \ 87 RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \ 88 RATR_MCS14 | RATR_MCS15) 89 90/*------------------------------ Tx Desc definition Macro --------------------*/ 91/* pragma mark -- Tx Desc related definition. -- */ 92/* Rate */ 93/* CCK Rates, TxHT = 0 */ 94#define DESC_RATE1M 0x00 95#define DESC_RATE2M 0x01 96#define DESC_RATE5_5M 0x02 97#define DESC_RATE11M 0x03 98 99/* OFDM Rates, TxHT = 0 */ 100#define DESC_RATE6M 0x04 101#define DESC_RATE9M 0x05 102#define DESC_RATE12M 0x06 103#define DESC_RATE18M 0x07 104#define DESC_RATE24M 0x08 105#define DESC_RATE36M 0x09 106#define DESC_RATE48M 0x0a 107#define DESC_RATE54M 0x0b 108 109/* MCS Rates, TxHT = 1 */ 110#define DESC_RATEMCS0 0x0c 111#define DESC_RATEMCS1 0x0d 112#define DESC_RATEMCS2 0x0e 113#define DESC_RATEMCS3 0x0f 114#define DESC_RATEMCS4 0x10 115#define DESC_RATEMCS5 0x11 116#define DESC_RATEMCS6 0x12 117#define DESC_RATEMCS7 0x13 118#define DESC_RATEMCS8 0x14 119#define DESC_RATEMCS9 0x15 120#define DESC_RATEMCS10 0x16 121#define DESC_RATEMCS11 0x17 122#define DESC_RATEMCS12 0x18 123#define DESC_RATEMCS13 0x19 124#define DESC_RATEMCS14 0x1a 125#define DESC_RATEMCS15 0x1b 126#define DESC_RATEMCS15_SG 0x1c 127#define DESC_RATEMCS32 0x20 128 129/* 1 Byte long (in unit of TU) */ 130#define REG_P2P_CTWIN 0x0572 131#define REG_NOA_DESC_SEL 0x05CF 132#define REG_NOA_DESC_DURATION 0x05E0 133#define REG_NOA_DESC_INTERVAL 0x05E4 134#define REG_NOA_DESC_START 0x05E8 135#define REG_NOA_DESC_COUNT 0x05EC 136 137#include "HalVerDef.h" 138void dump_chip_info(struct HAL_VERSION ChipVersion); 139 140 141/* return the final channel plan decision */ 142u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan, 143 u8 def_channel_plan, bool load_fail); 144 145u8 MRateToHwRate(u8 rate); 146 147void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg); 148 149bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe); 150 151#endif /* __HAL_COMMON_H__ */ 152