// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
 *
 * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
 *
 ******************************************************************************/
#define _HAL_INIT_C_

#include <linux/firmware.h>
#include <linux/slab.h>
#include <drv_types.h>
#include <rtw_debug.h>
#include <rtl8723b_hal.h>
#include "hal_com_h2c.h"

static void _FWDownloadEnable(struct adapter *padapter, bool enable)
{
        u8 tmp, count = 0;

        if (enable) {
                /*  8051 enable */
                tmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
                rtw_write8(padapter, REG_SYS_FUNC_EN+1, tmp|0x04);

                tmp = rtw_read8(padapter, REG_MCUFWDL);
                rtw_write8(padapter, REG_MCUFWDL, tmp|0x01);

                do {
                        tmp = rtw_read8(padapter, REG_MCUFWDL);
                        if (tmp & 0x01)
                                break;
                        rtw_write8(padapter, REG_MCUFWDL, tmp|0x01);
                        msleep(1);
                } while (count++ < 100);

                if (count > 0)
                        DBG_871X("%s: !!!!!!!!Write 0x80 Fail!: count = %d\n", __func__, count);

                /*  8051 reset */
                tmp = rtw_read8(padapter, REG_MCUFWDL+2);
                rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7);
        } else {
                /*  MCU firmware download disable. */
                tmp = rtw_read8(padapter, REG_MCUFWDL);
                rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe);
        }
}

static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize)
{
        int ret = _SUCCESS;

        u32 blockSize_p1 = 4; /*  (Default) Phase #1 : PCI muse use 4-byte write to download FW */
        u32 blockSize_p2 = 8; /*  Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
        u32 blockSize_p3 = 1; /*  Phase #3 : Use 1-byte, the remnant of FW image. */
        u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
        u32 remainSize_p1 = 0, remainSize_p2 = 0;
        u8 *bufferPtr = buffer;
        u32 i = 0, offset = 0;

/*      printk("====>%s %d\n", __func__, __LINE__); */

        /* 3 Phase #1 */
        blockCount_p1 = buffSize / blockSize_p1;
        remainSize_p1 = buffSize % blockSize_p1;

        if (blockCount_p1) {
                RT_TRACE(
                        _module_hal_init_c_,
                        _drv_notice_,
                        (
                                "_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n",
                                buffSize,
                                blockSize_p1,
                                blockCount_p1,
                                remainSize_p1
                        )
                );
        }

        for (i = 0; i < blockCount_p1; i++) {
                ret = rtw_write32(padapter, (FW_8723B_START_ADDRESS + i * blockSize_p1), *((u32 *)(bufferPtr + i * blockSize_p1)));
                if (ret == _FAIL) {
                        printk("====>%s %d i:%d\n", __func__, __LINE__, i);
                        goto exit;
                }
        }

        /* 3 Phase #2 */
        if (remainSize_p1) {
                offset = blockCount_p1 * blockSize_p1;

                blockCount_p2 = remainSize_p1/blockSize_p2;
                remainSize_p2 = remainSize_p1%blockSize_p2;

                if (blockCount_p2) {
                                RT_TRACE(
                                        _module_hal_init_c_,
                                        _drv_notice_,
                                        (
                                                "_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n",
                                                (buffSize-offset),
                                                blockSize_p2,
                                                blockCount_p2,
                                                remainSize_p2
                                        )
                                );
                }

        }

        /* 3 Phase #3 */
        if (remainSize_p2) {
                offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);

                blockCount_p3 = remainSize_p2 / blockSize_p3;

                RT_TRACE(_module_hal_init_c_, _drv_notice_,
                                ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n",
                                (buffSize-offset), blockSize_p3, blockCount_p3));

                for (i = 0; i < blockCount_p3; i++) {
                        ret = rtw_write8(padapter, (FW_8723B_START_ADDRESS + offset + i), *(bufferPtr + offset + i));

                        if (ret == _FAIL) {
                                printk("====>%s %d i:%d\n", __func__, __LINE__, i);
                                goto exit;
                        }
                }
        }
exit:
        return ret;
}

static int _PageWrite(
        struct adapter *padapter,
        u32 page,
        void *buffer,
        u32 size
)
{
        u8 value8;
        u8 u8Page = (u8) (page & 0x07);

        value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page;
        rtw_write8(padapter, REG_MCUFWDL+2, value8);

        return _BlockWrite(padapter, buffer, size);
}

static int _WriteFW(struct adapter *padapter, void *buffer, u32 size)
{
        /*  Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
        /*  We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
        int ret = _SUCCESS;
        u32 pageNums, remainSize;
        u32 page, offset;
        u8 *bufferPtr = buffer;

        pageNums = size / MAX_DLFW_PAGE_SIZE;
        /* RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4\n")); */
        remainSize = size % MAX_DLFW_PAGE_SIZE;

        for (page = 0; page < pageNums; page++) {
                offset = page * MAX_DLFW_PAGE_SIZE;
                ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_DLFW_PAGE_SIZE);

                if (ret == _FAIL) {
                        printk("====>%s %d\n", __func__, __LINE__);
                        goto exit;
                }
        }

        if (remainSize) {
                offset = pageNums * MAX_DLFW_PAGE_SIZE;
                page = pageNums;
                ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize);

                if (ret == _FAIL) {
                        printk("====>%s %d\n", __func__, __LINE__);
                        goto exit;
                }
        }
        RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n"));

exit:
        return ret;
}

void _8051Reset8723(struct adapter *padapter)
{
        u8 cpu_rst;
        u8 io_rst;


        /*  Reset 8051(WLMCU) IO wrapper */
        /*  0x1c[8] = 0 */
        /*  Suggested by Isaac@SD1 and Gimmy@SD1, coding by Lucas@20130624 */
        io_rst = rtw_read8(padapter, REG_RSV_CTRL+1);
        io_rst &= ~BIT(0);
        rtw_write8(padapter, REG_RSV_CTRL+1, io_rst);

        cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
        cpu_rst &= ~BIT(2);
        rtw_write8(padapter, REG_SYS_FUNC_EN+1, cpu_rst);

        /*  Enable 8051 IO wrapper */
        /*  0x1c[8] = 1 */
        io_rst = rtw_read8(padapter, REG_RSV_CTRL+1);
        io_rst |= BIT(0);
        rtw_write8(padapter, REG_RSV_CTRL+1, io_rst);

        cpu_rst = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
        cpu_rst |= BIT(2);
        rtw_write8(padapter, REG_SYS_FUNC_EN+1, cpu_rst);

        DBG_8192C("%s: Finish\n", __func__);
}

u8 g_fwdl_chksum_fail;

static s32 polling_fwdl_chksum(
        struct adapter *adapter, u32 min_cnt, u32 timeout_ms
)
{
        s32 ret = _FAIL;
        u32 value32;
        unsigned long start = jiffies;
        u32 cnt = 0;

        /* polling CheckSum report */
        do {
                cnt++;
                value32 = rtw_read32(adapter, REG_MCUFWDL);
                if (value32 & FWDL_ChkSum_rpt || adapter->bSurpriseRemoved || adapter->bDriverStopped)
                        break;
                yield();
        } while (jiffies_to_msecs(jiffies-start) < timeout_ms || cnt < min_cnt);

        if (!(value32 & FWDL_ChkSum_rpt)) {
                goto exit;
        }

        if (g_fwdl_chksum_fail) {
                DBG_871X("%s: fwdl test case: fwdl_chksum_fail\n", __func__);
                g_fwdl_chksum_fail--;
                goto exit;
        }

        ret = _SUCCESS;

exit:
        DBG_871X(
                "%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n",
                __func__,
                (ret == _SUCCESS) ? "OK" : "Fail",
                cnt,
                jiffies_to_msecs(jiffies-start),
                value32
        );

        return ret;
}

u8 g_fwdl_wintint_rdy_fail;

static s32 _FWFreeToGo(struct adapter *adapter, u32 min_cnt, u32 timeout_ms)
{
        s32 ret = _FAIL;
        u32 value32;
        unsigned long start = jiffies;
        u32 cnt = 0;

        value32 = rtw_read32(adapter, REG_MCUFWDL);
        value32 |= MCUFWDL_RDY;
        value32 &= ~WINTINI_RDY;
        rtw_write32(adapter, REG_MCUFWDL, value32);

        _8051Reset8723(adapter);

        /*  polling for FW ready */
        do {
                cnt++;
                value32 = rtw_read32(adapter, REG_MCUFWDL);
                if (value32 & WINTINI_RDY || adapter->bSurpriseRemoved || adapter->bDriverStopped)
                        break;
                yield();
        } while (jiffies_to_msecs(jiffies - start) < timeout_ms || cnt < min_cnt);

        if (!(value32 & WINTINI_RDY)) {
                goto exit;
        }

        if (g_fwdl_wintint_rdy_fail) {
                DBG_871X("%s: fwdl test case: wintint_rdy_fail\n", __func__);
                g_fwdl_wintint_rdy_fail--;
                goto exit;
        }

        ret = _SUCCESS;

exit:
        DBG_871X(
                "%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n",
                __func__,
                (ret == _SUCCESS) ? "OK" : "Fail",
                cnt,
                jiffies_to_msecs(jiffies-start),
                value32
        );

        return ret;
}

#define IS_FW_81xxC(padapter)   (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0)

void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        u8 u1bTmp;
        u8 Delay = 100;

        if (
                !(IS_FW_81xxC(padapter) && ((pHalData->FirmwareVersion < 0x21) || (pHalData->FirmwareVersion == 0x21 && pHalData->FirmwareSubVersion < 0x01)))
        ) { /*  after 88C Fw v33.1 */
                /* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
                rtw_write8(padapter, REG_HMETFR+3, 0x20);

                u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
                while (u1bTmp & BIT2) {
                        Delay--;
                        if (Delay == 0)
                                break;
                        udelay(50);
                        u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
                }
                RT_TRACE(_module_hal_init_c_, _drv_notice_, ("-%s: 8051 reset success (%d)\n", __func__, Delay));

                if (Delay == 0) {
                        RT_TRACE(_module_hal_init_c_, _drv_notice_, ("%s: Force 8051 reset!!!\n", __func__));
                        /* force firmware reset */
                        u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
                        rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
                }
        }
}

/*  */
/*      Description: */
/*              Download 8192C firmware code. */
/*  */
/*  */
s32 rtl8723b_FirmwareDownload(struct adapter *padapter, bool  bUsedWoWLANFw)
{
        s32 rtStatus = _SUCCESS;
        u8 write_fw = 0;
        unsigned long fwdl_start_time;
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        struct rt_firmware *pFirmware;
        struct rt_firmware *pBTFirmware;
        struct rt_firmware_hdr *pFwHdr = NULL;
        u8 *pFirmwareBuf;
        u32 FirmwareLen;
        const struct firmware *fw;
        struct device *device = dvobj_to_dev(padapter->dvobj);
        u8 *fwfilepath;
        struct dvobj_priv *psdpriv = padapter->dvobj;
        struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
        u8 tmp_ps;

        RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__));
#ifdef CONFIG_WOWLAN
        RT_TRACE(_module_hal_init_c_, _drv_notice_, ("+%s, bUsedWoWLANFw:%d\n", __func__, bUsedWoWLANFw));
#endif
        pFirmware = kzalloc(sizeof(struct rt_firmware), GFP_KERNEL);
        if (!pFirmware)
                return _FAIL;
        pBTFirmware = kzalloc(sizeof(struct rt_firmware), GFP_KERNEL);
        if (!pBTFirmware) {
                kfree(pFirmware);
                return _FAIL;
        }
        tmp_ps = rtw_read8(padapter, 0xa3);
        tmp_ps &= 0xf8;
        tmp_ps |= 0x02;
        /* 1. write 0xA3[:2:0] = 3b'010 */
        rtw_write8(padapter, 0xa3, tmp_ps);
        /* 2. read power_state = 0xA0[1:0] */
        tmp_ps = rtw_read8(padapter, 0xa0);
        tmp_ps &= 0x03;
        if (tmp_ps != 0x01) {
                DBG_871X(FUNC_ADPT_FMT" tmp_ps =%x\n", FUNC_ADPT_ARG(padapter), tmp_ps);
                pdbgpriv->dbg_downloadfw_pwr_state_cnt++;
        }

#ifdef CONFIG_WOWLAN
        if (bUsedWoWLANFw)
                fwfilepath = "rtlwifi/rtl8723bs_wowlan.bin";
        else
#endif /*  CONFIG_WOWLAN */
                fwfilepath = "rtlwifi/rtl8723bs_nic.bin";

        pr_info("rtl8723bs: acquire FW from file:%s\n", fwfilepath);

        rtStatus = request_firmware(&fw, fwfilepath, device);
        if (rtStatus) {
                pr_err("Request firmware failed with error 0x%x\n", rtStatus);
                rtStatus = _FAIL;
                goto exit;
        }

        if (!fw) {
                pr_err("Firmware %s not available\n", fwfilepath);
                rtStatus = _FAIL;
                goto exit;
        }

        if (fw->size > FW_8723B_SIZE) {
                rtStatus = _FAIL;
                RT_TRACE(
                        _module_hal_init_c_,
                        _drv_err_,
                        ("Firmware size exceed 0x%X. Check it.\n", FW_8188E_SIZE)
                );
                goto exit;
        }

        pFirmware->fw_buffer_sz = kmemdup(fw->data, fw->size, GFP_KERNEL);
        if (!pFirmware->fw_buffer_sz) {
                rtStatus = _FAIL;
                goto exit;
        }

        pFirmware->fw_length = fw->size;
        release_firmware(fw);
        if (pFirmware->fw_length > FW_8723B_SIZE) {
                rtStatus = _FAIL;
                DBG_871X_LEVEL(_drv_emerg_, "Firmware size:%u exceed %u\n", pFirmware->fw_length, FW_8723B_SIZE);
                goto release_fw1;
        }

        pFirmwareBuf = pFirmware->fw_buffer_sz;
        FirmwareLen = pFirmware->fw_length;

        /*  To Check Fw header. Added by tynli. 2009.12.04. */
        pFwHdr = (struct rt_firmware_hdr *)pFirmwareBuf;

        pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->version);
        pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->subversion);
        pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->signature);

        DBG_871X(
                "%s: fw_ver =%x fw_subver =%04x sig = 0x%x, Month =%02x, Date =%02x, Hour =%02x, Minute =%02x\n",
                __func__,
                pHalData->FirmwareVersion,
                pHalData->FirmwareSubVersion,
                pHalData->FirmwareSignature,
                pFwHdr->month,
                pFwHdr->date,
                pFwHdr->hour,
                pFwHdr->minute
        );

        if (IS_FW_HEADER_EXIST_8723B(pFwHdr)) {
                DBG_871X("%s(): Shift for fw header!\n", __func__);
                /*  Shift 32 bytes for FW header */
                pFirmwareBuf = pFirmwareBuf + 32;
                FirmwareLen = FirmwareLen - 32;
        }

        /*  Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
        /*  or it will cause download Fw fail. 2010.02.01. by tynli. */
        if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
                rtw_write8(padapter, REG_MCUFWDL, 0x00);
                rtl8723b_FirmwareSelfReset(padapter);
        }

        _FWDownloadEnable(padapter, true);
        fwdl_start_time = jiffies;
        while (
                !padapter->bDriverStopped &&
                !padapter->bSurpriseRemoved &&
                (write_fw++ < 3 || jiffies_to_msecs(jiffies - fwdl_start_time) < 500)
        ) {
                /* reset FWDL chksum */
                rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt);

                rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
                if (rtStatus != _SUCCESS)
                        continue;

                rtStatus = polling_fwdl_chksum(padapter, 5, 50);
                if (rtStatus == _SUCCESS)
                        break;
        }
        _FWDownloadEnable(padapter, false);
        if (_SUCCESS != rtStatus)
                goto fwdl_stat;

        rtStatus = _FWFreeToGo(padapter, 10, 200);
        if (_SUCCESS != rtStatus)
                goto fwdl_stat;

fwdl_stat:
        DBG_871X(
                "FWDL %s. write_fw:%u, %dms\n",
                (rtStatus == _SUCCESS)?"success":"fail",
                write_fw,
                jiffies_to_msecs(jiffies - fwdl_start_time)
        );

exit:
        kfree(pFirmware->fw_buffer_sz);
        kfree(pFirmware);
release_fw1:
        kfree(pBTFirmware);
        DBG_871X(" <=== rtl8723b_FirmwareDownload()\n");
        return rtStatus;
}

void rtl8723b_InitializeFirmwareVars(struct adapter *padapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);

        /*  Init Fw LPS related. */
        adapter_to_pwrctl(padapter)->bFwCurrentInPSMode = false;

        /* Init H2C cmd. */
        rtw_write8(padapter, REG_HMETFR, 0x0f);

        /*  Init H2C counter. by tynli. 2009.12.09. */
        pHalData->LastHMEBoxNum = 0;
/* pHalData->H2CQueueHead = 0; */
/* pHalData->H2CQueueTail = 0; */
/* pHalData->H2CStopInsertQueue = false; */
}

#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
/*  */

/*  */
/*  Description: Prepare some information to Fw for WoWLAN. */
/* (1) Download wowlan Fw. */
/* (2) Download RSVD page packets. */
/* (3) Enable AP offload if needed. */
/*  */
/*  2011.04.12 by tynli. */
/*  */
void SetFwRelatedForWoWLAN8723b(
        struct adapter *padapter, u8 bHostIsGoingtoSleep
)
{
        int     status = _FAIL;
        /*  */
        /*  1. Before WoWLAN we need to re-download WoWLAN Fw. */
        /*  */
        status = rtl8723b_FirmwareDownload(padapter, bHostIsGoingtoSleep);
        if (status != _SUCCESS) {
                DBG_871X("SetFwRelatedForWoWLAN8723b(): Re-Download Firmware failed!!\n");
                return;
        } else {
                DBG_871X("SetFwRelatedForWoWLAN8723b(): Re-Download Firmware Success !!\n");
        }
        /*  */
        /*  2. Re-Init the variables about Fw related setting. */
        /*  */
        rtl8723b_InitializeFirmwareVars(padapter);
}
#endif /* CONFIG_WOWLAN */

static void rtl8723b_free_hal_data(struct adapter *padapter)
{
}

/*  */
/*                              Efuse related code */
/*  */
static u8 hal_EfuseSwitchToBank(
        struct adapter *padapter, u8 bank, bool bPseudoTest
)
{
        u8 bRet = false;
        u32 value32 = 0;
#ifdef HAL_EFUSE_MEMORY
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
#endif


        DBG_8192C("%s: Efuse switch bank to %d\n", __func__, bank);
        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                pEfuseHal->fakeEfuseBank = bank;
#else
                fakeEfuseBank = bank;
#endif
                bRet = true;
        } else {
                value32 = rtw_read32(padapter, EFUSE_TEST);
                bRet = true;
                switch (bank) {
                case 0:
                        value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
                        break;
                case 1:
                        value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
                        break;
                case 2:
                        value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
                        break;
                case 3:
                        value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
                        break;
                default:
                        value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
                        bRet = false;
                        break;
                }
                rtw_write32(padapter, EFUSE_TEST, value32);
        }

        return bRet;
}

static void Hal_GetEfuseDefinition(
        struct adapter *padapter,
        u8 efuseType,
        u8 type,
        void *pOut,
        bool bPseudoTest
)
{
        switch (type) {
        case TYPE_EFUSE_MAX_SECTION:
                {
                        u8 *pMax_section;
                        pMax_section = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pMax_section = EFUSE_MAX_SECTION_8723B;
                        else
                                *pMax_section = EFUSE_BT_MAX_SECTION;
                }
                break;

        case TYPE_EFUSE_REAL_CONTENT_LEN:
                {
                        u16 *pu2Tmp;
                        pu2Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8723B;
                        else
                                *pu2Tmp = EFUSE_BT_REAL_CONTENT_LEN;
                }
                break;

        case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
                {
                        u16 *pu2Tmp;
                        pu2Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8723B-EFUSE_OOB_PROTECT_BYTES);
                        else
                                *pu2Tmp = (EFUSE_BT_REAL_BANK_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK);
                }
                break;

        case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
                {
                        u16 *pu2Tmp;
                        pu2Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu2Tmp = (EFUSE_REAL_CONTENT_LEN_8723B-EFUSE_OOB_PROTECT_BYTES);
                        else
                                *pu2Tmp = (EFUSE_BT_REAL_CONTENT_LEN-(EFUSE_PROTECT_BYTES_BANK*3));
                }
                break;

        case TYPE_EFUSE_MAP_LEN:
                {
                        u16 *pu2Tmp;
                        pu2Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu2Tmp = EFUSE_MAX_MAP_LEN;
                        else
                                *pu2Tmp = EFUSE_BT_MAP_LEN;
                }
                break;

        case TYPE_EFUSE_PROTECT_BYTES_BANK:
                {
                        u8 *pu1Tmp;
                        pu1Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu1Tmp = EFUSE_OOB_PROTECT_BYTES;
                        else
                                *pu1Tmp = EFUSE_PROTECT_BYTES_BANK;
                }
                break;

        case TYPE_EFUSE_CONTENT_LEN_BANK:
                {
                        u16 *pu2Tmp;
                        pu2Tmp = pOut;

                        if (efuseType == EFUSE_WIFI)
                                *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8723B;
                        else
                                *pu2Tmp = EFUSE_BT_REAL_BANK_CONTENT_LEN;
                }
                break;

        default:
                {
                        u8 *pu1Tmp;
                        pu1Tmp = pOut;
                        *pu1Tmp = 0;
                }
                break;
        }
}

#define VOLTAGE_V25             0x03
#define LDOE25_SHIFT    28

/*  */
/*      The following is for compile ok */
/*      That should be merged with the original in the future */
/*  */
#define EFUSE_ACCESS_ON_8723                    0x69    /*  For RTL8723 only. */
#define EFUSE_ACCESS_OFF_8723                   0x00    /*  For RTL8723 only. */
#define REG_EFUSE_ACCESS_8723                   0x00CF  /*  Efuse access protection for RTL8723 */

/*  */
static void Hal_BT_EfusePowerSwitch(
        struct adapter *padapter, u8 bWrite, u8 PwrState
)
{
        u8 tempval;
        if (PwrState) {
                /*  enable BT power cut */
                /*  0x6A[14] = 1 */
                tempval = rtw_read8(padapter, 0x6B);
                tempval |= BIT(6);
                rtw_write8(padapter, 0x6B, tempval);

                /*  Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */
                /*  So don't wirte 0x6A[14]= 1 and 0x6A[15]= 0 together! */
                msleep(1);
                /*  disable BT output isolation */
                /*  0x6A[15] = 0 */
                tempval = rtw_read8(padapter, 0x6B);
                tempval &= ~BIT(7);
                rtw_write8(padapter, 0x6B, tempval);
        } else {
                /*  enable BT output isolation */
                /*  0x6A[15] = 1 */
                tempval = rtw_read8(padapter, 0x6B);
                tempval |= BIT(7);
                rtw_write8(padapter, 0x6B, tempval);

                /*  Attention!! Between 0x6A[14] and 0x6A[15] setting need 100us delay */
                /*  So don't wirte 0x6A[14]= 1 and 0x6A[15]= 0 together! */

                /*  disable BT power cut */
                /*  0x6A[14] = 1 */
                tempval = rtw_read8(padapter, 0x6B);
                tempval &= ~BIT(6);
                rtw_write8(padapter, 0x6B, tempval);
        }

}
static void Hal_EfusePowerSwitch(
        struct adapter *padapter, u8 bWrite, u8 PwrState
)
{
        u8 tempval;
        u16 tmpV16;


        if (PwrState) {
                /*  To avoid cannot access efuse regsiters after disable/enable several times during DTM test. */
                /*  Suggested by SD1 IsaacHsu. 2013.07.08, added by tynli. */
                tempval = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL);
                if (tempval & BIT(0)) { /*  SDIO local register is suspend */
                        u8 count = 0;


                        tempval &= ~BIT(0);
                        rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL, tempval);

                        /*  check 0x86[1:0]= 10'2h, wait power state to leave suspend */
                        do {
                                tempval = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HSUS_CTRL);
                                tempval &= 0x3;
                                if (tempval == 0x02)
                                        break;

                                count++;
                                if (count >= 100)
                                        break;

                                mdelay(10);
                        } while (1);

                        if (count >= 100) {
                                DBG_8192C(FUNC_ADPT_FMT ": Leave SDIO local register suspend fail! Local 0x86 =%#X\n",
                                        FUNC_ADPT_ARG(padapter), tempval);
                        } else {
                                DBG_8192C(FUNC_ADPT_FMT ": Leave SDIO local register suspend OK! Local 0x86 =%#X\n",
                                        FUNC_ADPT_ARG(padapter), tempval);
                        }
                }

                rtw_write8(padapter, REG_EFUSE_ACCESS_8723, EFUSE_ACCESS_ON_8723);

                /*  Reset: 0x0000h[28], default valid */
                tmpV16 =  rtw_read16(padapter, REG_SYS_FUNC_EN);
                if (!(tmpV16 & FEN_ELDR)) {
                        tmpV16 |= FEN_ELDR;
                        rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16);
                }

                /*  Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
                tmpV16 = rtw_read16(padapter, REG_SYS_CLKR);
                if ((!(tmpV16 & LOADER_CLK_EN))  || (!(tmpV16 & ANA8M))) {
                        tmpV16 |= (LOADER_CLK_EN | ANA8M);
                        rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
                }

                if (bWrite) {
                        /*  Enable LDO 2.5V before read/write action */
                        tempval = rtw_read8(padapter, EFUSE_TEST+3);
                        tempval &= 0x0F;
                        tempval |= (VOLTAGE_V25 << 4);
                        rtw_write8(padapter, EFUSE_TEST+3, (tempval | 0x80));

                        /* rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); */
                }
        } else {
                rtw_write8(padapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);

                if (bWrite) {
                        /*  Disable LDO 2.5V after read/write action */
                        tempval = rtw_read8(padapter, EFUSE_TEST+3);
                        rtw_write8(padapter, EFUSE_TEST+3, (tempval & 0x7F));
                }

        }
}

static void hal_ReadEFuse_WiFi(
        struct adapter *padapter,
        u16 _offset,
        u16 _size_byte,
        u8 *pbuf,
        bool bPseudoTest
)
{
#ifdef HAL_EFUSE_MEMORY
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
#endif
        u8 *efuseTbl = NULL;
        u16 eFuse_Addr = 0;
        u8 offset, wden;
        u8 efuseHeader, efuseExtHdr, efuseData;
        u16 i, total, used;
        u8 efuse_usage = 0;

        /* DBG_871X("YJ: ====>%s():_offset =%d _size_byte =%d bPseudoTest =%d\n", __func__, _offset, _size_byte, bPseudoTest); */
        /*  */
        /*  Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
        /*  */
        if ((_offset+_size_byte) > EFUSE_MAX_MAP_LEN) {
                DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __func__, _offset, _size_byte);
                return;
        }

        efuseTbl = rtw_malloc(EFUSE_MAX_MAP_LEN);
        if (!efuseTbl) {
                DBG_8192C("%s: alloc efuseTbl fail!\n", __func__);
                return;
        }
        /*  0xff will be efuse default value instead of 0x00. */
        memset(efuseTbl, 0xFF, EFUSE_MAX_MAP_LEN);


#ifdef DEBUG
if (0) {
        for (i = 0; i < 256; i++)
                efuse_OneByteRead(padapter, i, &efuseTbl[i], false);
        DBG_871X("Efuse Content:\n");
        for (i = 0; i < 256; i++) {
                if (i % 16 == 0)
                        printk("\n");
                printk("%02X ", efuseTbl[i]);
        }
        printk("\n");
}
#endif


        /*  switch bank back to bank 0 for later BT and wifi use. */
        hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);

        while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) {
                efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
                if (efuseHeader == 0xFF) {
                        DBG_8192C("%s: data end at address =%#x\n", __func__, eFuse_Addr-1);
                        break;
                }
                /* DBG_8192C("%s: efuse[0x%X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseHeader); */

                /*  Check PG header for section num. */
                if (EXT_HEADER(efuseHeader)) { /* extended header */
                        offset = GET_HDR_OFFSET_2_0(efuseHeader);
                        /* DBG_8192C("%s: extended header offset = 0x%X\n", __func__, offset); */

                        efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
                        /* DBG_8192C("%s: efuse[0x%X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseExtHdr); */
                        if (ALL_WORDS_DISABLED(efuseExtHdr))
                                continue;

                        offset |= ((efuseExtHdr & 0xF0) >> 1);
                        wden = (efuseExtHdr & 0x0F);
                } else {
                        offset = ((efuseHeader >> 4) & 0x0f);
                        wden = (efuseHeader & 0x0f);
                }
                /* DBG_8192C("%s: Offset =%d Worden = 0x%X\n", __func__, offset, wden); */

                if (offset < EFUSE_MAX_SECTION_8723B) {
                        u16 addr;
                        /*  Get word enable value from PG header */
/*                      DBG_8192C("%s: Offset =%d Worden = 0x%X\n", __func__, offset, wden); */

                        addr = offset * PGPKT_DATA_SIZE;
                        for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
                                /*  Check word enable condition in the section */
                                if (!(wden & (0x01<<i))) {
                                        efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
/*                                      DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseData); */
                                        efuseTbl[addr] = efuseData;

                                        efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
/*                                      DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseData); */
                                        efuseTbl[addr+1] = efuseData;
                                }
                                addr += 2;
                        }
                } else {
                        DBG_8192C(KERN_ERR "%s: offset(%d) is illegal!!\n", __func__, offset);
                        eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
                }
        }

        /*  Copy from Efuse map to output pointer memory!!! */
        for (i = 0; i < _size_byte; i++)
                pbuf[i] = efuseTbl[_offset+i];

#ifdef DEBUG
if (1) {
        DBG_871X("Efuse Realmap:\n");
        for (i = 0; i < _size_byte; i++) {
                if (i % 16 == 0)
                        printk("\n");
                printk("%02X ", pbuf[i]);
        }
        printk("\n");
}
#endif
        /*  Calculate Efuse utilization */
        EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest);
        used = eFuse_Addr - 1;
        efuse_usage = (u8)((used*100)/total);
        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                pEfuseHal->fakeEfuseUsedBytes = used;
#else
                fakeEfuseUsedBytes = used;
#endif
        } else {
                rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&used);
                rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_USAGE, (u8 *)&efuse_usage);
        }

        kfree(efuseTbl);
}

static void hal_ReadEFuse_BT(
        struct adapter *padapter,
        u16 _offset,
        u16 _size_byte,
        u8 *pbuf,

        bool bPseudoTest
)
{
#ifdef HAL_EFUSE_MEMORY
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
#endif
        u8 *efuseTbl;
        u8 bank;
        u16 eFuse_Addr;
        u8 efuseHeader, efuseExtHdr, efuseData;
        u8 offset, wden;
        u16 i, total, used;
        u8 efuse_usage;


        /*  */
        /*  Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
        /*  */
        if ((_offset+_size_byte) > EFUSE_BT_MAP_LEN) {
                DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __func__, _offset, _size_byte);
                return;
        }

        efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN);
        if (!efuseTbl) {
                DBG_8192C("%s: efuseTbl malloc fail!\n", __func__);
                return;
        }
        /*  0xff will be efuse default value instead of 0x00. */
        memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN);

        EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &total, bPseudoTest);

        for (bank = 1; bank < 3; bank++) { /*  8723b Max bake 0~2 */
                if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == false) {
                        DBG_8192C("%s: hal_EfuseSwitchToBank Fail!!\n", __func__);
                        goto exit;
                }

                eFuse_Addr = 0;

                while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) {
                        efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
                        if (efuseHeader == 0xFF)
                                break;
                        DBG_8192C("%s: efuse[%#X]= 0x%02x (header)\n", __func__, (((bank-1)*EFUSE_REAL_CONTENT_LEN_8723B)+eFuse_Addr-1), efuseHeader);

                        /*  Check PG header for section num. */
                        if (EXT_HEADER(efuseHeader)) { /* extended header */
                                offset = GET_HDR_OFFSET_2_0(efuseHeader);
                                DBG_8192C("%s: extended header offset_2_0 = 0x%X\n", __func__, offset);

                                efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
                                DBG_8192C("%s: efuse[%#X]= 0x%02x (ext header)\n", __func__, (((bank-1)*EFUSE_REAL_CONTENT_LEN_8723B)+eFuse_Addr-1), efuseExtHdr);
                                if (ALL_WORDS_DISABLED(efuseExtHdr))
                                        continue;


                                offset |= ((efuseExtHdr & 0xF0) >> 1);
                                wden = (efuseExtHdr & 0x0F);
                        } else {
                                offset = ((efuseHeader >> 4) & 0x0f);
                                wden = (efuseHeader & 0x0f);
                        }

                        if (offset < EFUSE_BT_MAX_SECTION) {
                                u16 addr;

                                /*  Get word enable value from PG header */
                                DBG_8192C("%s: Offset =%d Worden =%#X\n", __func__, offset, wden);

                                addr = offset * PGPKT_DATA_SIZE;
                                for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
                                        /*  Check word enable condition in the section */
                                        if (!(wden & (0x01<<i))) {
                                                efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
                                                DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseData);
                                                efuseTbl[addr] = efuseData;

                                                efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData, bPseudoTest);
                                                DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, eFuse_Addr-1, efuseData);
                                                efuseTbl[addr+1] = efuseData;
                                        }
                                        addr += 2;
                                }
                        } else {
                                DBG_8192C("%s: offset(%d) is illegal!!\n", __func__, offset);
                                eFuse_Addr += Efuse_CalculateWordCnts(wden)*2;
                        }
                }

                if ((eFuse_Addr-1) < total) {
                        DBG_8192C("%s: bank(%d) data end at %#x\n", __func__, bank, eFuse_Addr-1);
                        break;
                }
        }

        /*  switch bank back to bank 0 for later BT and wifi use. */
        hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);

        /*  Copy from Efuse map to output pointer memory!!! */
        for (i = 0; i < _size_byte; i++)
                pbuf[i] = efuseTbl[_offset+i];

        /*  */
        /*  Calculate Efuse utilization. */
        /*  */
        EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &total, bPseudoTest);
        used = (EFUSE_BT_REAL_BANK_CONTENT_LEN*(bank-1)) + eFuse_Addr - 1;
        DBG_8192C("%s: bank(%d) data end at %#x , used =%d\n", __func__, bank, eFuse_Addr-1, used);
        efuse_usage = (u8)((used*100)/total);
        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                pEfuseHal->fakeBTEfuseUsedBytes = used;
#else
                fakeBTEfuseUsedBytes = used;
#endif
        } else {
                rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&used);
                rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BT_USAGE, (u8 *)&efuse_usage);
        }

exit:
        kfree(efuseTbl);
}

static void Hal_ReadEFuse(
        struct adapter *padapter,
        u8 efuseType,
        u16 _offset,
        u16 _size_byte,
        u8 *pbuf,
        bool bPseudoTest
)
{
        if (efuseType == EFUSE_WIFI)
                hal_ReadEFuse_WiFi(padapter, _offset, _size_byte, pbuf, bPseudoTest);
        else
                hal_ReadEFuse_BT(padapter, _offset, _size_byte, pbuf, bPseudoTest);
}

static u16 hal_EfuseGetCurrentSize_WiFi(
        struct adapter *padapter, bool bPseudoTest
)
{
#ifdef HAL_EFUSE_MEMORY
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL              pEfuseHal = &pHalData->EfuseHal;
#endif
        u16 efuse_addr = 0;
        u16 start_addr = 0; /*  for debug */
        u8 hoffset = 0, hworden = 0;
        u8 efuse_data, word_cnts = 0;
        u32 count = 0; /*  for debug */


        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                efuse_addr = (u16)pEfuseHal->fakeEfuseUsedBytes;
#else
                efuse_addr = (u16)fakeEfuseUsedBytes;
#endif
        } else
                rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);

        start_addr = efuse_addr;
        DBG_8192C("%s: start_efuse_addr = 0x%X\n", __func__, efuse_addr);

        /*  switch bank back to bank 0 for later BT and wifi use. */
        hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);

        count = 0;
        while (AVAILABLE_EFUSE_ADDR(efuse_addr)) {
                if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == false) {
                        DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr = 0x%X !!\n", __func__, efuse_addr);
                        goto error;
                }

                if (efuse_data == 0xFF)
                        break;

                if ((start_addr != 0) && (efuse_addr == start_addr)) {
                        count++;
                        DBG_8192C(FUNC_ADPT_FMT ": [WARNING] efuse raw 0x%X = 0x%02X not 0xFF!!(%d times)\n",
                                FUNC_ADPT_ARG(padapter), efuse_addr, efuse_data, count);

                        efuse_data = 0xFF;
                        if (count < 4) {
                                /*  try again! */

                                if (count > 2) {
                                        /*  try again form address 0 */
                                        efuse_addr = 0;
                                        start_addr = 0;
                                }

                                continue;
                        }

                        goto error;
                }

                if (EXT_HEADER(efuse_data)) {
                        hoffset = GET_HDR_OFFSET_2_0(efuse_data);
                        efuse_addr++;
                        efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest);
                        if (ALL_WORDS_DISABLED(efuse_data))
                                continue;

                        hoffset |= ((efuse_data & 0xF0) >> 1);
                        hworden = efuse_data & 0x0F;
                } else {
                        hoffset = (efuse_data>>4) & 0x0F;
                        hworden = efuse_data & 0x0F;
                }

                word_cnts = Efuse_CalculateWordCnts(hworden);
                efuse_addr += (word_cnts*2)+1;
        }

        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                pEfuseHal->fakeEfuseUsedBytes = efuse_addr;
#else
                fakeEfuseUsedBytes = efuse_addr;
#endif
        } else
                rtw_hal_set_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);

        goto exit;

error:
        /*  report max size to prevent wirte efuse */
        EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_addr, bPseudoTest);

exit:
        DBG_8192C("%s: CurrentSize =%d\n", __func__, efuse_addr);

        return efuse_addr;
}

static u16 hal_EfuseGetCurrentSize_BT(struct adapter *padapter, u8 bPseudoTest)
{
#ifdef HAL_EFUSE_MEMORY
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
#endif
        u16 btusedbytes;
        u16 efuse_addr;
        u8 bank, startBank;
        u8 hoffset = 0, hworden = 0;
        u8 efuse_data, word_cnts = 0;
        u16 retU2 = 0;

        if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                btusedbytes = pEfuseHal->fakeBTEfuseUsedBytes;
#else
                btusedbytes = fakeBTEfuseUsedBytes;
#endif
        } else
                rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&btusedbytes);

        efuse_addr = (u16)((btusedbytes%EFUSE_BT_REAL_BANK_CONTENT_LEN));
        startBank = (u8)(1+(btusedbytes/EFUSE_BT_REAL_BANK_CONTENT_LEN));

        DBG_8192C("%s: start from bank =%d addr = 0x%X\n", __func__, startBank, efuse_addr);

        EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &retU2, bPseudoTest);

        for (bank = startBank; bank < 3; bank++) {
                if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == false) {
                        DBG_8192C(KERN_ERR "%s: switch bank(%d) Fail!!\n", __func__, bank);
                        /* bank = EFUSE_MAX_BANK; */
                        break;
                }

                /*  only when bank is switched we have to reset the efuse_addr. */
                if (bank != startBank)
                        efuse_addr = 0;
#if 1

                while (AVAILABLE_EFUSE_ADDR(efuse_addr)) {
                        if (efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) == false) {
                                DBG_8192C(KERN_ERR "%s: efuse_OneByteRead Fail! addr = 0x%X !!\n", __func__, efuse_addr);
                                /* bank = EFUSE_MAX_BANK; */
                                break;
                        }
                        DBG_8192C("%s: efuse_OneByteRead ! addr = 0x%X !efuse_data = 0x%X! bank =%d\n", __func__, efuse_addr, efuse_data, bank);

                        if (efuse_data == 0xFF)
                                break;

                        if (EXT_HEADER(efuse_data)) {
                                hoffset = GET_HDR_OFFSET_2_0(efuse_data);
                                efuse_addr++;
                                efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest);
                                DBG_8192C("%s: efuse_OneByteRead EXT_HEADER ! addr = 0x%X !efuse_data = 0x%X! bank =%d\n", __func__, efuse_addr, efuse_data, bank);

                                if (ALL_WORDS_DISABLED(efuse_data)) {
                                        efuse_addr++;
                                        continue;
                                }

/*                              hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); */
                                hoffset |= ((efuse_data & 0xF0) >> 1);
                                hworden = efuse_data & 0x0F;
                        } else {
                                hoffset = (efuse_data>>4) & 0x0F;
                                hworden =  efuse_data & 0x0F;
                        }

                        DBG_8192C(FUNC_ADPT_FMT": Offset =%d Worden =%#X\n",
                                FUNC_ADPT_ARG(padapter), hoffset, hworden);

                        word_cnts = Efuse_CalculateWordCnts(hworden);
                        /* read next header */
                        efuse_addr += (word_cnts*2)+1;
                }
#else
        while (
                bContinual &&
                efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest) &&
                AVAILABLE_EFUSE_ADDR(efuse_addr)
        ) {
                        if (efuse_data != 0xFF) {
                                if ((efuse_data&0x1F) == 0x0F) { /* extended header */
                                        hoffset = efuse_data;
                                        efuse_addr++;
                                        efuse_OneByteRead(padapter, efuse_addr, &efuse_data, bPseudoTest);
                                        if ((efuse_data & 0x0F) == 0x0F) {
                                                efuse_addr++;
                                                continue;
                                        } else {
                                                hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
                                                hworden = efuse_data & 0x0F;
                                        }
                                } else {
                                        hoffset = (efuse_data>>4) & 0x0F;
                                        hworden =  efuse_data & 0x0F;
                                }
                                word_cnts = Efuse_CalculateWordCnts(hworden);
                                /* read next header */
                                efuse_addr = efuse_addr + (word_cnts*2)+1;
                        } else
                                bContinual = false;
                }
#endif


                /*  Check if we need to check next bank efuse */
                if (efuse_addr < retU2)
                        break; /*  don't need to check next bank. */
        }

        retU2 = ((bank-1)*EFUSE_BT_REAL_BANK_CONTENT_LEN)+efuse_addr;
        if (bPseudoTest) {
                pEfuseHal->fakeBTEfuseUsedBytes = retU2;
                /* RT_DISP(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT92C(), already use %u bytes\n", pEfuseHal->fakeBTEfuseUsedBytes)); */
        } else {
                pEfuseHal->BTEfuseUsedBytes = retU2;
                /* RT_DISP(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT92C(), already use %u bytes\n", pEfuseHal->BTEfuseUsedBytes)); */
        }

        DBG_8192C("%s: CurrentSize =%d\n", __func__, retU2);
        return retU2;
}

static u16 Hal_EfuseGetCurrentSize(
        struct adapter *padapter, u8 efuseType, bool bPseudoTest
)
{
        u16 ret = 0;

        if (efuseType == EFUSE_WIFI)
                ret = hal_EfuseGetCurrentSize_WiFi(padapter, bPseudoTest);
        else
                ret = hal_EfuseGetCurrentSize_BT(padapter, bPseudoTest);

        return ret;
}

static u8 Hal_EfuseWordEnableDataWrite(
        struct adapter *padapter,
        u16 efuse_addr,
        u8 word_en,
        u8 *data,
        bool bPseudoTest
)
{
        u16 tmpaddr = 0;
        u16 start_addr = efuse_addr;
        u8 badworden = 0x0F;
        u8 tmpdata[PGPKT_DATA_SIZE];


/*      DBG_8192C("%s: efuse_addr =%#x word_en =%#x\n", __func__, efuse_addr, word_en); */
        memset(tmpdata, 0xFF, PGPKT_DATA_SIZE);

        if (!(word_en & BIT(0))) {
                tmpaddr = start_addr;
                efuse_OneByteWrite(padapter, start_addr++, data[0], bPseudoTest);
                efuse_OneByteWrite(padapter, start_addr++, data[1], bPseudoTest);

                efuse_OneByteRead(padapter, tmpaddr, &tmpdata[0], bPseudoTest);
                efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[1], bPseudoTest);
                if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) {
                        badworden &= (~BIT(0));
                }
        }
        if (!(word_en & BIT(1))) {
                tmpaddr = start_addr;
                efuse_OneByteWrite(padapter, start_addr++, data[2], bPseudoTest);
                efuse_OneByteWrite(padapter, start_addr++, data[3], bPseudoTest);

                efuse_OneByteRead(padapter, tmpaddr, &tmpdata[2], bPseudoTest);
                efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[3], bPseudoTest);
                if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) {
                        badworden &= (~BIT(1));
                }
        }

        if (!(word_en & BIT(2))) {
                tmpaddr = start_addr;
                efuse_OneByteWrite(padapter, start_addr++, data[4], bPseudoTest);
                efuse_OneByteWrite(padapter, start_addr++, data[5], bPseudoTest);

                efuse_OneByteRead(padapter, tmpaddr, &tmpdata[4], bPseudoTest);
                efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[5], bPseudoTest);
                if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) {
                        badworden &= (~BIT(2));
                }
        }

        if (!(word_en & BIT(3))) {
                tmpaddr = start_addr;
                efuse_OneByteWrite(padapter, start_addr++, data[6], bPseudoTest);
                efuse_OneByteWrite(padapter, start_addr++, data[7], bPseudoTest);

                efuse_OneByteRead(padapter, tmpaddr, &tmpdata[6], bPseudoTest);
                efuse_OneByteRead(padapter, tmpaddr+1, &tmpdata[7], bPseudoTest);
                if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) {
                        badworden &= (~BIT(3));
                }
        }

        return badworden;
}

static s32 Hal_EfusePgPacketRead(
        struct adapter *padapter,
        u8 offset,
        u8 *data,
        bool bPseudoTest
)
{
        u8 efuse_data, word_cnts = 0;
        u16 efuse_addr = 0;
        u8 hoffset = 0, hworden = 0;
        u8 i;
        u8 max_section = 0;
        s32     ret;


        if (!data)
                return false;

        EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, &max_section, bPseudoTest);
        if (offset > max_section) {
                DBG_8192C("%s: Packet offset(%d) is illegal(>%d)!\n", __func__, offset, max_section);
                return false;
        }

        memset(data, 0xFF, PGPKT_DATA_SIZE);
        ret = true;

        /*  */
        /*  <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
        /*  Skip dummy parts to prevent unexpected data read from Efuse. */
        /*  By pass right now. 2009.02.19. */
        /*  */
        while (AVAILABLE_EFUSE_ADDR(efuse_addr)) {
                if (efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest) == false) {
                        ret = false;
                        break;
                }

                if (efuse_data == 0xFF)
                        break;

                if (EXT_HEADER(efuse_data)) {
                        hoffset = GET_HDR_OFFSET_2_0(efuse_data);
                        efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest);
                        if (ALL_WORDS_DISABLED(efuse_data)) {
                                DBG_8192C("%s: Error!! All words disabled!\n", __func__);
                                continue;
                        }

                        hoffset |= ((efuse_data & 0xF0) >> 1);
                        hworden = efuse_data & 0x0F;
                } else {
                        hoffset = (efuse_data>>4) & 0x0F;
                        hworden =  efuse_data & 0x0F;
                }

                if (hoffset == offset) {
                        for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
                                /*  Check word enable condition in the section */
                                if (!(hworden & (0x01<<i))) {
                                        efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest);
/*                                      DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, efuse_addr+tmpidx, efuse_data); */
                                        data[i*2] = efuse_data;

                                        efuse_OneByteRead(padapter, efuse_addr++, &efuse_data, bPseudoTest);
/*                                      DBG_8192C("%s: efuse[%#X]= 0x%02X\n", __func__, efuse_addr+tmpidx, efuse_data); */
                                        data[(i*2)+1] = efuse_data;
                                }
                        }
                } else {
                        word_cnts = Efuse_CalculateWordCnts(hworden);
                        efuse_addr += word_cnts*2;
                }
        }

        return ret;
}

static u8 hal_EfusePgCheckAvailableAddr(
        struct adapter *padapter, u8 efuseType, u8 bPseudoTest
)
{
        u16 max_available = 0;
        u16 current_size;


        EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &max_available, bPseudoTest);
/*      DBG_8192C("%s: max_available =%d\n", __func__, max_available); */

        current_size = Efuse_GetCurrentSize(padapter, efuseType, bPseudoTest);
        if (current_size >= max_available) {
                DBG_8192C("%s: Error!! current_size(%d)>max_available(%d)\n", __func__, current_size, max_available);
                return false;
        }
        return true;
}

static void hal_EfuseConstructPGPkt(
        u8 offset,
        u8 word_en,
        u8 *pData,
        PPGPKT_STRUCT pTargetPkt
)
{
        memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE);
        pTargetPkt->offset = offset;
        pTargetPkt->word_en = word_en;
        efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
        pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
}

static u8 hal_EfusePartialWriteCheck(
        struct adapter *padapter,
        u8 efuseType,
        u16 *pAddr,
        PPGPKT_STRUCT pTargetPkt,
        u8 bPseudoTest
)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
        u8 bRet = false;
        u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
        u8 efuse_data = 0;

        EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, bPseudoTest);
        EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, &efuse_max, bPseudoTest);

        if (efuseType == EFUSE_WIFI) {
                if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                        startAddr = (u16)pEfuseHal->fakeEfuseUsedBytes;
#else
                        startAddr = (u16)fakeEfuseUsedBytes;
#endif
                } else
                        rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
        } else {
                if (bPseudoTest) {
#ifdef HAL_EFUSE_MEMORY
                        startAddr = (u16)pEfuseHal->fakeBTEfuseUsedBytes;
#else
                        startAddr = (u16)fakeBTEfuseUsedBytes;
#endif
                } else
                        rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BT_BYTES, (u8 *)&startAddr);
        }
        startAddr %= efuse_max;
        DBG_8192C("%s: startAddr =%#X\n", __func__, startAddr);

        while (1) {
                if (startAddr >= efuse_max_available_len) {
                        bRet = false;
                        DBG_8192C("%s: startAddr(%d) >= efuse_max_available_len(%d)\n", __func__, startAddr, efuse_max_available_len);
                        break;
                }

                if (efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
#if 1
                        bRet = false;
                        DBG_8192C("%s: Something Wrong! last bytes(%#X = 0x%02X) is not 0xFF\n",
                                __func__, startAddr, efuse_data);
                        break;
#else
                        if (EXT_HEADER(efuse_data)) {
                                cur_header = efuse_data;
                                startAddr++;
                                efuse_OneByteRead(padapter, startAddr, &efuse_data, bPseudoTest);
                                if (ALL_WORDS_DISABLED(efuse_data)) {
                                        DBG_8192C("%s: Error condition, all words disabled!", __func__);
                                        bRet = false;
                                        break;
                                } else {
                                        curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
                                        curPkt.word_en = efuse_data & 0x0F;
                                }
                        } else {
                                cur_header  =  efuse_data;
                                curPkt.offset = (cur_header>>4) & 0x0F;
                                curPkt.word_en = cur_header & 0x0F;
                        }

                        curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
                        /*  if same header is found but no data followed */
                        /*  write some part of data followed by the header. */
                        if (
                                (curPkt.offset == pTargetPkt->offset) &&
                                (hal_EfuseCheckIfDatafollowed(padapter, curPkt.word_cnts, startAddr+1, bPseudoTest) == false) &&
                                wordEnMatched(pTargetPkt, &curPkt, &matched_wden) == true
                        ) {
                                DBG_8192C("%s: Need to partial write data by the previous wrote header\n", __func__);
                                /*  Here to write partial data */
                                badworden = Efuse_WordEnableDataWrite(padapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
                                if (badworden != 0x0F) {
                                        u32 PgWriteSuccess = 0;
                                        /*  if write fail on some words, write these bad words again */
                                        if (efuseType == EFUSE_WIFI)
                                                PgWriteSuccess = Efuse_PgPacketWrite(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
                                        else
                                                PgWriteSuccess = Efuse_PgPacketWrite_BT(padapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);

                                        if (!PgWriteSuccess) {
                                                bRet = false;   /*  write fail, return */
                                                break;
                                        }
                                }
                                /*  partial write ok, update the target packet for later use */
                                for (i = 0; i < 4; i++) {
                                        if ((matched_wden & (0x1<<i)) == 0) { /*  this word has been written */
                                                pTargetPkt->word_en |= (0x1<<i);        /*  disable the word */
                                        }
                                }
                                pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
                        }
                        /*  read from next header */
                        startAddr = startAddr + (curPkt.word_cnts*2) + 1;
#endif
                } else {
                        /*  not used header, 0xff */
                        *pAddr = startAddr;
/*                      DBG_8192C("%s: Started from unused header offset =%d\n", __func__, startAddr)); */
                        bRet = true;
                        break;
                }
        }

        return bRet;
}

static u8 hal_EfusePgPacketWrite1ByteHeader(
        struct adapter *padapter,
        u8 efuseType,
        u16 *pAddr,
        PPGPKT_STRUCT pTargetPkt,
        u8 bPseudoTest
)
{
        u8 pg_header = 0, tmp_header = 0;
        u16 efuse_addr = *pAddr;
        u8 repeatcnt = 0;


/*      DBG_8192C("%s\n", __func__); */
        pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;

        do {
                efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest);
                efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest);
                if (tmp_header != 0xFF)
                        break;
                if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
                        DBG_8192C("%s: Repeat over limit for pg_header!!\n", __func__);
                        return false;
                }
        } while (1);

        if (tmp_header != pg_header) {
                DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg = 0x%02X read = 0x%02X)\n", __func__, pg_header, tmp_header);
                return false;
        }

        *pAddr = efuse_addr;

        return true;
}

static u8 hal_EfusePgPacketWrite2ByteHeader(
        struct adapter *padapter,
        u8 efuseType,
        u16 *pAddr,
        PPGPKT_STRUCT pTargetPkt,
        u8 bPseudoTest
)
{
        u16 efuse_addr, efuse_max_available_len = 0;
        u8 pg_header = 0, tmp_header = 0;
        u8 repeatcnt = 0;


/*      DBG_8192C("%s\n", __func__); */
        EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, &efuse_max_available_len, bPseudoTest);

        efuse_addr = *pAddr;
        if (efuse_addr >= efuse_max_available_len) {
                DBG_8192C("%s: addr(%d) over available (%d)!!\n", __func__,
                          efuse_addr, efuse_max_available_len);
                return false;
        }

        pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
/*      DBG_8192C("%s: pg_header = 0x%x\n", __func__, pg_header); */

        do {
                efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest);
                efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest);
                if (tmp_header != 0xFF)
                        break;
                if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
                        DBG_8192C("%s: Repeat over limit for pg_header!!\n", __func__);
                        return false;
                }
        } while (1);

        if (tmp_header != pg_header) {
                DBG_8192C(KERN_ERR "%s: PG Header Fail!!(pg = 0x%02X read = 0x%02X)\n", __func__, pg_header, tmp_header);
                return false;
        }

        /*  to write ext_header */
        efuse_addr++;
        pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;

        do {
                efuse_OneByteWrite(padapter, efuse_addr, pg_header, bPseudoTest);
                efuse_OneByteRead(padapter, efuse_addr, &tmp_header, bPseudoTest);
                if (tmp_header != 0xFF)
                        break;
                if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
                        DBG_8192C("%s: Repeat over limit for ext_header!!\n", __func__);
                        return false;
                }
        } while (1);

        if (tmp_header != pg_header) { /* offset PG fail */
                DBG_8192C(KERN_ERR "%s: PG EXT Header Fail!!(pg = 0x%02X read = 0x%02X)\n", __func__, pg_header, tmp_header);
                return false;
        }

        *pAddr = efuse_addr;

        return true;
}

static u8 hal_EfusePgPacketWriteHeader(
        struct adapter *padapter,
        u8 efuseType,
        u16 *pAddr,
        PPGPKT_STRUCT pTargetPkt,
        u8 bPseudoTest
)
{
        u8 bRet = false;

        if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
                bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
        else
                bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest);

        return bRet;
}

static u8 hal_EfusePgPacketWriteData(
        struct adapter *padapter,
        u8 efuseType,
        u16 *pAddr,
        PPGPKT_STRUCT pTargetPkt,
        u8 bPseudoTest
)
{
        u16 efuse_addr;
        u8 badworden;


        efuse_addr = *pAddr;
        badworden = Efuse_WordEnableDataWrite(padapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
        if (badworden != 0x0F) {
                DBG_8192C("%s: Fail!!\n", __func__);
                return false;
        }

/*      DBG_8192C("%s: ok\n", __func__); */
        return true;
}

static s32 Hal_EfusePgPacketWrite(
        struct adapter *padapter,
        u8 offset,
        u8 word_en,
        u8 *pData,
        bool bPseudoTest
)
{
        PGPKT_STRUCT targetPkt;
        u16 startAddr = 0;
        u8 efuseType = EFUSE_WIFI;

        if (!hal_EfusePgCheckAvailableAddr(padapter, efuseType, bPseudoTest))
                return false;

        hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);

        if (!hal_EfusePartialWriteCheck(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        if (!hal_EfusePgPacketWriteHeader(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        if (!hal_EfusePgPacketWriteData(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        return true;
}

static bool Hal_EfusePgPacketWrite_BT(
        struct adapter *padapter,
        u8 offset,
        u8 word_en,
        u8 *pData,
        bool bPseudoTest
)
{
        PGPKT_STRUCT targetPkt;
        u16 startAddr = 0;
        u8 efuseType = EFUSE_BT;

        if (!hal_EfusePgCheckAvailableAddr(padapter, efuseType, bPseudoTest))
                return false;

        hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);

        if (!hal_EfusePartialWriteCheck(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        if (!hal_EfusePgPacketWriteHeader(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        if (!hal_EfusePgPacketWriteData(padapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
                return false;

        return true;
}

static HAL_VERSION ReadChipVersion8723B(struct adapter *padapter)
{
        u32 value32;
        HAL_VERSION ChipVersion;
        struct hal_com_data *pHalData;

/* YJ, TODO, move read chip type here */
        pHalData = GET_HAL_DATA(padapter);

        value32 = rtw_read32(padapter, REG_SYS_CFG);
        ChipVersion.ICType = CHIP_8723B;
        ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
        ChipVersion.RFType = RF_TYPE_1T1R;
        ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
        ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */

        /*  For regulator mode. by tynli. 2011.01.14 */
        pHalData->RegulatorMode = ((value32 & SPS_SEL) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);

        value32 = rtw_read32(padapter, REG_GPIO_OUTSTS);
        ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20);      /*  ROM code version. */

        /*  For multi-function consideration. Added by Roger, 2010.10.06. */
        pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
        value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
        pHalData->MultiFunc |= ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0);
        pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0);
        pHalData->MultiFunc |= ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0);
        pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
#if 1
        dump_chip_info(ChipVersion);
#endif
        pHalData->VersionID = ChipVersion;
        if (IS_1T2R(ChipVersion))
                pHalData->rf_type = RF_1T2R;
        else if (IS_2T2R(ChipVersion))
                pHalData->rf_type = RF_2T2R;
        else
                pHalData->rf_type = RF_1T1R;

        MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type);

        return ChipVersion;
}

static void rtl8723b_read_chip_version(struct adapter *padapter)
{
        ReadChipVersion8723B(padapter);
}

void rtl8723b_InitBeaconParameters(struct adapter *padapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        u16 val16;
        u8 val8;


        val8 = DIS_TSF_UDT;
        val16 = val8 | (val8 << 8); /*  port0 and port1 */

        /*  Enable prot0 beacon function for PSTDMA */
        val16 |= EN_BCN_FUNCTION;

        rtw_write16(padapter, REG_BCN_CTRL, val16);

        /*  TODO: Remove these magic number */
        rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
        /*  Firmware will control REG_DRVERLYINT when power saving is enable, */
        /*  so don't set this register on STA mode. */
        if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == false)
                rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8723B); /*  5ms */
        rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8723B); /*  2ms */

        /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
        /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
        rtw_write16(padapter, REG_BCNTCFG, 0x660F);

        pHalData->RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL);
        pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE);
        pHalData->RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2);
        pHalData->RegReg542 = rtw_read8(padapter, REG_TBTT_PROHIBIT+2);
        pHalData->RegCR_1 = rtw_read8(padapter, REG_CR+1);
}

void _InitBurstPktLen_8723BS(struct adapter *Adapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);

        rtw_write8(Adapter, 0x4c7, rtw_read8(Adapter, 0x4c7)|BIT(7)); /* enable single pkt ampdu */
        rtw_write8(Adapter, REG_RX_PKT_LIMIT_8723B, 0x18);              /* for VHT packet length 11K */
        rtw_write8(Adapter, REG_MAX_AGGR_NUM_8723B, 0x1F);
        rtw_write8(Adapter, REG_PIFS_8723B, 0x00);
        rtw_write8(Adapter, REG_FWHW_TXQ_CTRL_8723B, rtw_read8(Adapter, REG_FWHW_TXQ_CTRL)&(~BIT(7)));
        if (pHalData->AMPDUBurstMode)
                rtw_write8(Adapter, REG_AMPDU_BURST_MODE_8723B,  0x5F);
        rtw_write8(Adapter, REG_AMPDU_MAX_TIME_8723B, 0x70);

        /*  ARFB table 9 for 11ac 5G 2SS */
        rtw_write32(Adapter, REG_ARFR0_8723B, 0x00000010);
        if (IS_NORMAL_CHIP(pHalData->VersionID))
                rtw_write32(Adapter, REG_ARFR0_8723B+4, 0xfffff000);
        else
                rtw_write32(Adapter, REG_ARFR0_8723B+4, 0x3e0ff000);

        /*  ARFB table 10 for 11ac 5G 1SS */
        rtw_write32(Adapter, REG_ARFR1_8723B, 0x00000010);
        rtw_write32(Adapter, REG_ARFR1_8723B+4, 0x003ff000);
}

static void ResumeTxBeacon(struct adapter *padapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);


        /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
        /*  which should be read from register to a global variable. */

        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n"));

        pHalData->RegFwHwTxQCtrl |= BIT(6);
        rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl);
        rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff);
        pHalData->RegReg542 |= BIT(0);
        rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
}

static void StopTxBeacon(struct adapter *padapter)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);


        /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
        /*  which should be read from register to a global variable. */

        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n"));

        pHalData->RegFwHwTxQCtrl &= ~BIT(6);
        rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl);
        rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64);
        pHalData->RegReg542 &= ~BIT(0);
        rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);

        CheckFwRsvdPageContent(padapter);  /*  2010.06.23. Added by tynli. */
}

static void _BeaconFunctionEnable(struct adapter *padapter, u8 Enable, u8 Linked)
{
        rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB);
        rtw_write8(padapter, REG_RD_CTRL+1, 0x6F);
}

static void rtl8723b_SetBeaconRelatedRegisters(struct adapter *padapter)
{
        u8 val8;
        u32 value32;
        struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
        struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
        u32 bcn_ctrl_reg;

        /* reset TSF, enable update TSF, correcting TSF On Beacon */

        /* REG_BCN_INTERVAL */
        /* REG_BCNDMATIM */
        /* REG_ATIMWND */
        /* REG_TBTT_PROHIBIT */
        /* REG_DRVERLYINT */
        /* REG_BCN_MAX_ERR */
        /* REG_BCNTCFG (0x510) */
        /* REG_DUAL_TSF_RST */
        /* REG_BCN_CTRL (0x550) */


        bcn_ctrl_reg = REG_BCN_CTRL;

        /*  */
        /*  ATIM window */
        /*  */
        rtw_write16(padapter, REG_ATIMWND, 2);

        /*  */
        /*  Beacon interval (in unit of TU). */
        /*  */
        rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);

        rtl8723b_InitBeaconParameters(padapter);

        rtw_write8(padapter, REG_SLOT, 0x09);

        /*  */
        /*  Reset TSF Timer to zero, added by Roger. 2008.06.24 */
        /*  */
        value32 = rtw_read32(padapter, REG_TCR);
        value32 &= ~TSFRST;
        rtw_write32(padapter, REG_TCR, value32);

        value32 |= TSFRST;
        rtw_write32(padapter, REG_TCR, value32);

        /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
        if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE) == true) {
                rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50);
                rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50);
        }

        _BeaconFunctionEnable(padapter, true, true);

        ResumeTxBeacon(padapter);
        val8 = rtw_read8(padapter, bcn_ctrl_reg);
        val8 |= DIS_BCNQ_SUB;
        rtw_write8(padapter, bcn_ctrl_reg, val8);
}

static void rtl8723b_GetHalODMVar(
        struct adapter *Adapter,
        enum HAL_ODM_VARIABLE eVariable,
        void *pValue1,
        void *pValue2
)
{
        GetHalODMVar(Adapter, eVariable, pValue1, pValue2);
}

static void rtl8723b_SetHalODMVar(
        struct adapter *Adapter,
        enum HAL_ODM_VARIABLE eVariable,
        void *pValue1,
        bool bSet
)
{
        SetHalODMVar(Adapter, eVariable, pValue1, bSet);
}

static void hal_notch_filter_8723b(struct adapter *adapter, bool enable)
{
        if (enable) {
                DBG_871X("Enable notch filter\n");
                rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
        } else {
                DBG_871X("Disable notch filter\n");
                rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
        }
}

static void UpdateHalRAMask8723B(struct adapter *padapter, u32 mac_id, u8 rssi_level)
{
        u32 mask, rate_bitmap;
        u8 shortGIrate = false;
        struct sta_info *psta;
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
        struct dm_priv *pdmpriv = &pHalData->dmpriv;
        struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
        struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);

        DBG_871X("%s(): mac_id =%d rssi_level =%d\n", __func__, mac_id, rssi_level);

        if (mac_id >= NUM_STA) /* CAM_SIZE */
                return;

        psta = pmlmeinfo->FW_sta_info[mac_id].psta;
        if (!psta)
                return;

        shortGIrate = query_ra_short_GI(psta);

        mask = psta->ra_mask;

        rate_bitmap = 0xffffffff;
        rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, mac_id, mask, rssi_level);
        DBG_871X("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
                        __func__, mac_id, psta->wireless_mode, mask, rssi_level, rate_bitmap);

        mask &= rate_bitmap;

        rate_bitmap = hal_btcoex_GetRaMask(padapter);
        mask &= ~rate_bitmap;

#ifdef CONFIG_CMCC_TEST
        if (pmlmeext->cur_wireless_mode & WIRELESS_11G) {
                if (mac_id == 0) {
                        DBG_871X("CMCC_BT update raid entry, mask = 0x%x\n", mask);
                        mask &= 0xffffff00; /* disable CCK & <24M OFDM rate for 11G mode for CMCC */
                        DBG_871X("CMCC_BT update raid entry, mask = 0x%x\n", mask);
                }
        }
#endif

        if (pHalData->fw_ractrl) {
                rtl8723b_set_FwMacIdConfig_cmd(padapter, mac_id, psta->raid, psta->bw_mode, shortGIrate, mask);
        }

        /* set correct initial date rate for each mac_id */
        pdmpriv->INIDATA_RATE[mac_id] = psta->init_rate;
        DBG_871X("%s(): mac_id =%d raid = 0x%x bw =%d mask = 0x%x init_rate = 0x%x\n", __func__, mac_id, psta->raid, psta->bw_mode, mask, psta->init_rate);
}


void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc)
{
        pHalFunc->free_hal_data = &rtl8723b_free_hal_data;

        pHalFunc->dm_init = &rtl8723b_init_dm_priv;

        pHalFunc->read_chip_version = &rtl8723b_read_chip_version;

        pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8723B;

        pHalFunc->set_bwmode_handler = &PHY_SetBWMode8723B;
        pHalFunc->set_channel_handler = &PHY_SwChnl8723B;
        pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8723B;

        pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8723B;
        pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8723B;

        pHalFunc->hal_dm_watchdog = &rtl8723b_HalDmWatchDog;
        pHalFunc->hal_dm_watchdog_in_lps = &rtl8723b_HalDmWatchDog_in_LPS;


        pHalFunc->SetBeaconRelatedRegistersHandler = &rtl8723b_SetBeaconRelatedRegisters;

        pHalFunc->Add_RateATid = &rtl8723b_Add_RateATid;

        pHalFunc->run_thread = &rtl8723b_start_thread;
        pHalFunc->cancel_thread = &rtl8723b_stop_thread;

        pHalFunc->read_bbreg = &PHY_QueryBBReg_8723B;
        pHalFunc->write_bbreg = &PHY_SetBBReg_8723B;
        pHalFunc->read_rfreg = &PHY_QueryRFReg_8723B;
        pHalFunc->write_rfreg = &PHY_SetRFReg_8723B;

        /*  Efuse related function */
        pHalFunc->BTEfusePowerSwitch = &Hal_BT_EfusePowerSwitch;
        pHalFunc->EfusePowerSwitch = &Hal_EfusePowerSwitch;
        pHalFunc->ReadEFuse = &Hal_ReadEFuse;
        pHalFunc->EFUSEGetEfuseDefinition = &Hal_GetEfuseDefinition;
        pHalFunc->EfuseGetCurrentSize = &Hal_EfuseGetCurrentSize;
        pHalFunc->Efuse_PgPacketRead = &Hal_EfusePgPacketRead;
        pHalFunc->Efuse_PgPacketWrite = &Hal_EfusePgPacketWrite;
        pHalFunc->Efuse_WordEnableDataWrite = &Hal_EfuseWordEnableDataWrite;
        pHalFunc->Efuse_PgPacketWrite_BT = &Hal_EfusePgPacketWrite_BT;

        pHalFunc->GetHalODMVarHandler = &rtl8723b_GetHalODMVar;
        pHalFunc->SetHalODMVarHandler = &rtl8723b_SetHalODMVar;

        pHalFunc->xmit_thread_handler = &hal_xmit_handler;
        pHalFunc->hal_notch_filter = &hal_notch_filter_8723b;

        pHalFunc->c2h_handler = c2h_handler_8723b;
        pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8723b;

        pHalFunc->fill_h2c_cmd = &FillH2CCmd8723B;
}

void rtl8723b_InitAntenna_Selection(struct adapter *padapter)
{
        struct hal_com_data *pHalData;
        u8 val;


        pHalData = GET_HAL_DATA(padapter);

        val = rtw_read8(padapter, REG_LEDCFG2);
        /*  Let 8051 take control antenna settting */
        val |= BIT(7); /*  DPDT_SEL_EN, 0x4C[23] */
        rtw_write8(padapter, REG_LEDCFG2, val);
}

void rtl8723b_init_default_value(struct adapter *padapter)
{
        struct hal_com_data *pHalData;
        struct dm_priv *pdmpriv;
        u8 i;


        pHalData = GET_HAL_DATA(padapter);
        pdmpriv = &pHalData->dmpriv;

        padapter->registrypriv.wireless_mode = WIRELESS_11BG_24N;

        /*  init default value */
        pHalData->fw_ractrl = false;
        pHalData->bIQKInitialized = false;
        if (!adapter_to_pwrctl(padapter)->bkeepfwalive)
                pHalData->LastHMEBoxNum = 0;

        pHalData->bIQKInitialized = false;

        /*  init dm default value */
        pdmpriv->TM_Trigger = 0;/* for IQK */
/*      pdmpriv->binitialized = false; */
/*      pdmpriv->prv_traffic_idx = 3; */
/*      pdmpriv->initialize = 0; */

        pdmpriv->ThermalValue_HP_index = 0;
        for (i = 0; i < HP_THERMAL_NUM; i++)
                pdmpriv->ThermalValue_HP[i] = 0;

        /*  init Efuse variables */
        pHalData->EfuseUsedBytes = 0;
        pHalData->EfuseUsedPercentage = 0;
#ifdef HAL_EFUSE_MEMORY
        pHalData->EfuseHal.fakeEfuseBank = 0;
        pHalData->EfuseHal.fakeEfuseUsedBytes = 0;
        memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE);
        memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN);
        memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN);
        pHalData->EfuseHal.BTEfuseUsedBytes = 0;
        pHalData->EfuseHal.BTEfuseUsedPercentage = 0;
        memset(pHalData->EfuseHal.BTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK*EFUSE_MAX_HW_SIZE);
        memset(pHalData->EfuseHal.BTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
        memset(pHalData->EfuseHal.BTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
        pHalData->EfuseHal.fakeBTEfuseUsedBytes = 0;
        memset(pHalData->EfuseHal.fakeBTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK*EFUSE_MAX_HW_SIZE);
        memset(pHalData->EfuseHal.fakeBTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
        memset(pHalData->EfuseHal.fakeBTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
#endif
}

u8 GetEEPROMSize8723B(struct adapter *padapter)
{
        u8 size = 0;
        u32 cr;

        cr = rtw_read16(padapter, REG_9346CR);
        /*  6: EEPROM used is 93C46, 4: boot from E-Fuse. */
        size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;

        MSG_8192C("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46");

        return size;
}

/*  */
/*  */
/*  LLT R/W/Init function */
/*  */
/*  */
s32 rtl8723b_InitLLTTable(struct adapter *padapter)
{
        unsigned long start, passing_time;
        u32 val32;
        s32 ret;


        ret = _FAIL;

        val32 = rtw_read32(padapter, REG_AUTO_LLT);
        val32 |= BIT_AUTO_INIT_LLT;
        rtw_write32(padapter, REG_AUTO_LLT, val32);

        start = jiffies;

        do {
                val32 = rtw_read32(padapter, REG_AUTO_LLT);
                if (!(val32 & BIT_AUTO_INIT_LLT)) {
                        ret = _SUCCESS;
                        break;
                }

                passing_time = jiffies_to_msecs(jiffies - start);
                if (passing_time > 1000) {
                        DBG_8192C(
                                "%s: FAIL!! REG_AUTO_LLT(0x%X) =%08x\n",
                                __func__,
                                REG_AUTO_LLT,
                                val32
                        );
                        break;
                }

                msleep(1);
        } while (1);

        return ret;
}

static bool Hal_GetChnlGroup8723B(u8 Channel, u8 *pGroup)
{
        bool bIn24G = true;

        if (Channel <= 14) {
                bIn24G = true;

                if (1  <= Channel && Channel <= 2)
                        *pGroup = 0;
                else if (3  <= Channel && Channel <= 5)
                        *pGroup = 1;
                else if (6  <= Channel && Channel <= 8)
                        *pGroup = 2;
                else if (9  <= Channel && Channel <= 11)
                        *pGroup = 3;
                else if (12 <= Channel && Channel <= 14)
                        *pGroup = 4;
                else {
                        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("==>Hal_GetChnlGroup8723B in 2.4 G, but Channel %d in Group not found\n", Channel));
                }
        } else {
                bIn24G = false;

                if (36   <= Channel && Channel <=  42)
                        *pGroup = 0;
                else if (44   <= Channel && Channel <=  48)
                        *pGroup = 1;
                else if (50   <= Channel && Channel <=  58)
                        *pGroup = 2;
                else if (60   <= Channel && Channel <=  64)
                        *pGroup = 3;
                else if (100  <= Channel && Channel <= 106)
                        *pGroup = 4;
                else if (108  <= Channel && Channel <= 114)
                        *pGroup = 5;
                else if (116  <= Channel && Channel <= 122)
                        *pGroup = 6;
                else if (124  <= Channel && Channel <= 130)
                        *pGroup = 7;
                else if (132  <= Channel && Channel <= 138)
                        *pGroup = 8;
                else if (140  <= Channel && Channel <= 144)
                        *pGroup = 9;
                else if (149  <= Channel && Channel <= 155)
                        *pGroup = 10;
                else if (157  <= Channel && Channel <= 161)
                        *pGroup = 11;
                else if (165  <= Channel && Channel <= 171)
                        *pGroup = 12;
                else if (173  <= Channel && Channel <= 177)
                        *pGroup = 13;
                else {
                        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("==>Hal_GetChnlGroup8723B in 5G, but Channel %d in Group not found\n", Channel));
                }

        }
        RT_TRACE(
                _module_hci_hal_init_c_,
                _drv_info_,
                (
                        "<==Hal_GetChnlGroup8723B,  (%s) Channel = %d, Group =%d,\n",
                        bIn24G ? "2.4G" : "5G",
                        Channel,
                        *pGroup
                )
        );
        return bIn24G;
}

void Hal_InitPGData(struct adapter *padapter, u8 *PROMContent)
{
        struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);

        if (!pEEPROM->bautoload_fail_flag) { /*  autoload OK. */
                if (!pEEPROM->EepromOrEfuse) {
                        /*  Read EFUSE real map to shadow. */
                        EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
                        memcpy((void *)PROMContent, (void *)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B);
                }
        } else {/* autoload fail */
                RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
                if (!pEEPROM->EepromOrEfuse)
                        EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
                memcpy((void *)PROMContent, (void *)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_8723B);
        }
}

void Hal_EfuseParseIDCode(struct adapter *padapter, u8 *hwinfo)
{
        struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
/*      struct hal_com_data     *pHalData = GET_HAL_DATA(padapter); */
        u16 EEPROMId;


        /*  Checl 0x8129 again for making sure autoload status!! */
        EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
        if (EEPROMId != RTL_EEPROM_ID) {
                DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
                pEEPROM->bautoload_fail_flag = true;
        } else
                pEEPROM->bautoload_fail_flag = false;

        RT_TRACE(_module_hal_init_c_, _drv_notice_, ("EEPROM ID = 0x%04x\n", EEPROMId));
}

static void Hal_ReadPowerValueFromPROM_8723B(
        struct adapter *Adapter,
        struct TxPowerInfo24G *pwrInfo24G,
        u8 *PROMContent,
        bool AutoLoadFail
)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
        u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_8723B, group, TxCount = 0;

        memset(pwrInfo24G, 0, sizeof(struct TxPowerInfo24G));

        if (0xFF == PROMContent[eeAddr+1])
                AutoLoadFail = true;

        if (AutoLoadFail) {
                DBG_871X("%s(): Use Default value!\n", __func__);
                for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
                        /* 2.4G default value */
                        for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
                                pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
                                pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
                        }

                        for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
                                if (TxCount == 0) {
                                        pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
                                        pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
                                } else {
                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                }
                        }
                }

                return;
        }

        pHalData->bTXPowerDataReadFromEEPORM = true;            /* YJ, move, 120316 */

        for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
                /* 2 2.4G default value */
                for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
                        pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
                        if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
                                pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
                }

                for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
                        pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
                        if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
                                pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
                }

                for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
                        if (TxCount == 0) {
                                pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_HT20_DIFF;
                                else {
                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
                                        if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
                                }

                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
                                else {
                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
                                        if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
                                }
                                pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
                                eeAddr++;
                        } else {
                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                else {
                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
                                        if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
                                }

                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                else {
                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
                                        if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
                                }
                                eeAddr++;

                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                else {
                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
                                        if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3)              /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
                                }

                                if (PROMContent[eeAddr] == 0xFF)
                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
                                else {
                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
                                        if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3)               /* 4bit sign number to 8 bit sign number */
                                                pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
                                }
                                eeAddr++;
                        }
                }
        }
}


void Hal_EfuseParseTxPowerInfo_8723B(
        struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail
)
{
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
        struct TxPowerInfo24G   pwrInfo24G;
        u8      rfPath, ch, TxCount = 1;

        Hal_ReadPowerValueFromPROM_8723B(padapter, &pwrInfo24G, PROMContent, AutoLoadFail);
        for (rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) {
                for (ch = 0 ; ch < CHANNEL_MAX_NUMBER; ch++) {
                        u8 group = 0;

                        Hal_GetChnlGroup8723B(ch+1, &group);

                        if (ch == 14-1) {
                                pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][5];
                                pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
                        } else {
                                pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
                                pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
                        }
#ifdef DEBUG
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======= Path %d, ChannelIndex %d, Group %d =======\n", rfPath, ch, group));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]));
#endif
                }

                for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
                        pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
                        pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
                        pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
                        pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];

#ifdef DEBUG
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("--------------------------------------- 2.4G ---------------------------------------\n"));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CCK_24G_Diff[%d][%d]= %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("OFDM_24G_Diff[%d][%d]= %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("BW20_24G_Diff[%d][%d]= %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]));
                        RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("BW40_24G_Diff[%d][%d]= %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]));
#endif
                }
        }

        /*  2010/10/19 MH Add Regulator recognize for CU. */
        if (!AutoLoadFail) {
                pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_8723B]&0x7);   /* bit0~2 */
                if (PROMContent[EEPROM_RF_BOARD_OPTION_8723B] == 0xFF)
                        pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
        } else
                pHalData->EEPROMRegulatory = 0;

        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory));
}

void Hal_EfuseParseBTCoexistInfo_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        u8 tempval;
        u32 tmpu4;

        if (!AutoLoadFail) {
                tmpu4 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
                if (tmpu4 & BT_FUNC_EN)
                        pHalData->EEPROMBluetoothCoexist = true;
                else
                        pHalData->EEPROMBluetoothCoexist = false;

                pHalData->EEPROMBluetoothType = BT_RTL8723B;

                tempval = hwinfo[EEPROM_RF_BT_SETTING_8723B];
                if (tempval != 0xFF) {
                        pHalData->EEPROMBluetoothAntNum = tempval & BIT(0);
                        /*  EFUSE_0xC3[6] == 0, S1(Main)-ODM_RF_PATH_A; */
                        /*  EFUSE_0xC3[6] == 1, S0(Aux)-ODM_RF_PATH_B */
                        pHalData->ant_path = (tempval & BIT(6))?ODM_RF_PATH_B:ODM_RF_PATH_A;
                } else {
                        pHalData->EEPROMBluetoothAntNum = Ant_x1;
                        if (pHalData->PackageType == PACKAGE_QFN68)
                                pHalData->ant_path = ODM_RF_PATH_B;
                        else
                                pHalData->ant_path = ODM_RF_PATH_A;
                }
        } else {
                pHalData->EEPROMBluetoothCoexist = false;
                pHalData->EEPROMBluetoothType = BT_RTL8723B;
                pHalData->EEPROMBluetoothAntNum = Ant_x1;
                pHalData->ant_path = ODM_RF_PATH_A;
        }

        if (padapter->registrypriv.ant_num > 0) {
                DBG_8192C(
                        "%s: Apply driver defined antenna number(%d) to replace origin(%d)\n",
                        __func__,
                        padapter->registrypriv.ant_num,
                        pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1
                );

                switch (padapter->registrypriv.ant_num) {
                case 1:
                        pHalData->EEPROMBluetoothAntNum = Ant_x1;
                        break;
                case 2:
                        pHalData->EEPROMBluetoothAntNum = Ant_x2;
                        break;
                default:
                        DBG_8192C(
                                "%s: Discard invalid driver defined antenna number(%d)!\n",
                                __func__,
                                padapter->registrypriv.ant_num
                        );
                        break;
                }
        }

        hal_btcoex_SetBTCoexist(padapter, pHalData->EEPROMBluetoothCoexist);
        hal_btcoex_SetChipType(padapter, pHalData->EEPROMBluetoothType);
        hal_btcoex_SetPgAntNum(padapter, pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1);
        if (pHalData->EEPROMBluetoothAntNum == Ant_x1)
                hal_btcoex_SetSingleAntPath(padapter, pHalData->ant_path);

        DBG_8192C(
                "%s: %s BT-coex, ant_num =%d\n",
                __func__,
                pHalData->EEPROMBluetoothCoexist == true ? "Enable" : "Disable",
                pHalData->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1
        );
}

void Hal_EfuseParseEEPROMVer_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);

/*      RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s(): AutoLoadFail = %d\n", __func__, AutoLoadFail)); */
        if (!AutoLoadFail)
                pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_8723B];
        else
                pHalData->EEPROMVersion = 1;
        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
                pHalData->EEPROMVersion));
}



void Hal_EfuseParsePackageType_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
        u8 package;
        u8 efuseContent;

        Efuse_PowerSwitch(padapter, false, true);
        efuse_OneByteRead(padapter, 0x1FB, &efuseContent, false);
        DBG_871X("%s phy efuse read 0x1FB =%x\n", __func__, efuseContent);
        Efuse_PowerSwitch(padapter, false, false);

        package = efuseContent & 0x7;
        switch (package) {
        case 0x4:
                pHalData->PackageType = PACKAGE_TFBGA79;
                break;
        case 0x5:
                pHalData->PackageType = PACKAGE_TFBGA90;
                break;
        case 0x6:
                pHalData->PackageType = PACKAGE_QFN68;
                break;
        case 0x7:
                pHalData->PackageType = PACKAGE_TFBGA80;
                break;

        default:
                pHalData->PackageType = PACKAGE_DEFAULT;
                break;
        }

        DBG_871X("PackageType = 0x%X\n", pHalData->PackageType);
}


void Hal_EfuseParseVoltage_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);

        /* memcpy(pEEPROM->adjuseVoltageVal, &hwinfo[EEPROM_Voltage_ADDR_8723B], 1); */
        DBG_871X("%s hwinfo[EEPROM_Voltage_ADDR_8723B] =%02x\n", __func__, hwinfo[EEPROM_Voltage_ADDR_8723B]);
        pEEPROM->adjuseVoltageVal = (hwinfo[EEPROM_Voltage_ADDR_8723B] & 0xf0) >> 4;
        DBG_871X("%s pEEPROM->adjuseVoltageVal =%x\n", __func__, pEEPROM->adjuseVoltageVal);
}

void Hal_EfuseParseChnlPlan_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan(
                padapter,
                hwinfo ? hwinfo[EEPROM_ChannelPlan_8723B] : 0xFF,
                padapter->registrypriv.channel_plan,
                RT_CHANNEL_DOMAIN_WORLD_NULL,
                AutoLoadFail
        );

        Hal_ChannelPlanToRegulation(padapter, padapter->mlmepriv.ChannelPlan);

        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan));
}

void Hal_EfuseParseCustomerID_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);

/*      RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s(): AutoLoadFail = %d\n", __func__, AutoLoadFail)); */
        if (!AutoLoadFail)
                pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_8723B];
        else
                pHalData->EEPROMCustomerID = 0;

        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID));
}

void Hal_EfuseParseAntennaDiversity_8723B(
        struct adapter *padapter,
        u8 *hwinfo,
        bool AutoLoadFail
)
{
}

void Hal_EfuseParseXtal_8723B(
        struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail
)
{
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);

/*      RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s(): AutoLoadFail = %d\n", __func__, AutoLoadFail)); */
        if (!AutoLoadFail) {
                pHalData->CrystalCap = hwinfo[EEPROM_XTAL_8723B];
                if (pHalData->CrystalCap == 0xFF)
                        pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723B;    /* what value should 8812 set? */
        } else
                pHalData->CrystalCap = EEPROM_Default_CrystalCap_8723B;

        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM CrystalCap: 0x%2x\n", pHalData->CrystalCap));
}


void Hal_EfuseParseThermalMeter_8723B(
        struct adapter *padapter, u8 *PROMContent, u8 AutoLoadFail
)
{
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);

/*      RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s(): AutoLoadFail = %d\n", __func__, AutoLoadFail)); */
        /*  */
        /*  ThermalMeter from EEPROM */
        /*  */
        if (!AutoLoadFail)
                pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_8723B];
        else
                pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_8723B;

        if ((pHalData->EEPROMThermalMeter == 0xff) || AutoLoadFail) {
                pHalData->bAPKThermalMeterIgnore = true;
                pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_8723B;
        }

        RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter));
}


void Hal_ReadRFGainOffset(
        struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail
)
{
        /*  */
        /*  BB_RF Gain Offset from EEPROM */
        /*  */

        if (!AutoloadFail) {
                Adapter->eeprompriv.EEPROMRFGainOffset = PROMContent[EEPROM_RF_GAIN_OFFSET];
                DBG_871X("AutoloadFail =%x,\n", AutoloadFail);
                Adapter->eeprompriv.EEPROMRFGainVal = EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL);
                DBG_871X("Adapter->eeprompriv.EEPROMRFGainVal =%x\n", Adapter->eeprompriv.EEPROMRFGainVal);
        } else {
                Adapter->eeprompriv.EEPROMRFGainOffset = 0;
                Adapter->eeprompriv.EEPROMRFGainVal = 0xFF;
                DBG_871X("else AutoloadFail =%x,\n", AutoloadFail);
        }
        DBG_871X("EEPRORFGainOffset = 0x%02x\n", Adapter->eeprompriv.EEPROMRFGainOffset);
}

u8 BWMapping_8723B(struct adapter *Adapter, struct pkt_attrib *pattrib)
{
        u8 BWSettingOfDesc = 0;
        struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);

        /* DBG_871X("BWMapping pHalData->CurrentChannelBW %d, pattrib->bwmode %d\n", pHalData->CurrentChannelBW, pattrib->bwmode); */

        if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_80) {
                if (pattrib->bwmode == CHANNEL_WIDTH_80)
                        BWSettingOfDesc = 2;
                else if (pattrib->bwmode == CHANNEL_WIDTH_40)
                        BWSettingOfDesc = 1;
                else
                        BWSettingOfDesc = 0;
        } else if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) {
                if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
                        BWSettingOfDesc = 1;
                else
                        BWSettingOfDesc = 0;
        } else
                BWSettingOfDesc = 0;

        /* if (pTcb->bBTTxPacket) */
        /*      BWSettingOfDesc = 0; */

        return BWSettingOfDesc;
}

u8 SCMapping_8723B(struct adapter *Adapter, struct pkt_attrib *pattrib)
{
        u8 SCSettingOfDesc = 0;
        struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);

        /* DBG_871X("SCMapping: pHalData->CurrentChannelBW %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d\n", pHalData->CurrentChannelBW, pHalData->nCur80MhzPrimeSC, pHalData->nCur40MhzPrimeSC); */

        if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_80) {
                if (pattrib->bwmode == CHANNEL_WIDTH_80) {
                        SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
                } else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
                        if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
                                SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
                        else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
                                SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
                        else
                                DBG_871X("SCMapping: Not Correct Primary40MHz Setting\n");
                } else {
                        if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
                                SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
                        else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
                                SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
                        else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
                                SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
                        else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
                                SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
                        else
                                DBG_871X("SCMapping: Not Correct Primary40MHz Setting\n");
                }
        } else if (pHalData->CurrentChannelBW == CHANNEL_WIDTH_40) {
                /* DBG_871X("SCMapping: HT Case: pHalData->CurrentChannelBW %d, pHalData->nCur40MhzPrimeSC %d\n", pHalData->CurrentChannelBW, pHalData->nCur40MhzPrimeSC); */

                if (pattrib->bwmode == CHANNEL_WIDTH_40) {
                        SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
                } else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
                        if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) {
                                SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
                        } else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) {
                                SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
                        } else {
                                SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
                        }
                }
        } else {
                SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
        }

        return SCSettingOfDesc;
}

static void rtl8723b_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
        u16 *usPtr = (u16 *)ptxdesc;
        u32 count;
        u32 index;
        u16 checksum = 0;


        /*  Clear first */
        ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);

        /*  checksume is always calculated by first 32 bytes, */
        /*  and it doesn't depend on TX DESC length. */
        /*  Thomas, Lucas@SD4, 20130515 */
        count = 16;

        for (index = 0; index < count; index++) {
                checksum |= le16_to_cpu(*(__le16 *)(usPtr + index));
        }

        ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff);
}

static u8 fill_txdesc_sectype(struct pkt_attrib *pattrib)
{
        u8 sectype = 0;
        if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
                switch (pattrib->encrypt) {
                /*  SEC_TYPE */
                case _WEP40_:
                case _WEP104_:
                case _TKIP_:
                case _TKIP_WTMIC_:
                        sectype = 1;
                        break;

                case _AES_:
                        sectype = 3;
                        break;

                case _NO_PRIVACY_:
                default:
                        break;