1
2
3
4
5
6#ifndef __QCOM_TSENS_H__
7#define __QCOM_TSENS_H__
8
9#define ONE_PT_CALIB 0x1
10#define ONE_PT_CALIB2 0x2
11#define TWO_PT_CALIB 0x3
12#define CAL_DEGC_PT1 30
13#define CAL_DEGC_PT2 120
14#define SLOPE_FACTOR 1000
15#define SLOPE_DEFAULT 3200
16
17
18#include <linux/thermal.h>
19#include <linux/regmap.h>
20
21struct tsens_priv;
22
23enum tsens_ver {
24 VER_0_1 = 0,
25 VER_1_X,
26 VER_2_X,
27};
28
29
30
31
32
33
34
35
36
37
38
39struct tsens_sensor {
40 struct tsens_priv *priv;
41 struct thermal_zone_device *tzd;
42 int offset;
43 unsigned int id;
44 unsigned int hw_id;
45 int slope;
46 u32 status;
47};
48
49
50
51
52
53
54
55
56
57
58
59
60struct tsens_ops {
61
62 int (*init)(struct tsens_priv *priv);
63 int (*calibrate)(struct tsens_priv *priv);
64 int (*get_temp)(struct tsens_priv *priv, int i, int *temp);
65
66 int (*enable)(struct tsens_priv *priv, int i);
67 void (*disable)(struct tsens_priv *priv);
68 int (*suspend)(struct tsens_priv *priv);
69 int (*resume)(struct tsens_priv *priv);
70 int (*get_trend)(struct tsens_priv *priv, int i, enum thermal_trend *trend);
71};
72
73#define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \
74 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
75 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
76 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
77 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
78 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
79 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
80 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
81 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
82 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
83 [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \
84 [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit)
85
86#define REG_FIELD_FOR_EACH_SENSOR16(_name, _offset, _startbit, _stopbit) \
87 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
88 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
89 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
90 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
91 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
92 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
93 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
94 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
95 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
96 [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \
97 [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit), \
98 [_name##_##11] = REG_FIELD(_offset + 44, _startbit, _stopbit), \
99 [_name##_##12] = REG_FIELD(_offset + 48, _startbit, _stopbit), \
100 [_name##_##13] = REG_FIELD(_offset + 52, _startbit, _stopbit), \
101 [_name##_##14] = REG_FIELD(_offset + 56, _startbit, _stopbit), \
102 [_name##_##15] = REG_FIELD(_offset + 60, _startbit, _stopbit)
103
104
105enum regfield_ids {
106
107
108 VER_MAJOR = 0,
109 VER_MINOR,
110 VER_STEP,
111
112 TSENS_EN = 3,
113 TSENS_SW_RST,
114 SENSOR_EN,
115 CODE_OR_TEMP,
116
117
118
119 LAST_TEMP_0 = 7,
120 LAST_TEMP_1,
121 LAST_TEMP_2,
122 LAST_TEMP_3,
123 LAST_TEMP_4,
124 LAST_TEMP_5,
125 LAST_TEMP_6,
126 LAST_TEMP_7,
127 LAST_TEMP_8,
128 LAST_TEMP_9,
129 LAST_TEMP_10,
130 LAST_TEMP_11,
131 LAST_TEMP_12,
132 LAST_TEMP_13,
133 LAST_TEMP_14,
134 LAST_TEMP_15,
135 VALID_0 = 23,
136 VALID_1,
137 VALID_2,
138 VALID_3,
139 VALID_4,
140 VALID_5,
141 VALID_6,
142 VALID_7,
143 VALID_8,
144 VALID_9,
145 VALID_10,
146 VALID_11,
147 VALID_12,
148 VALID_13,
149 VALID_14,
150 VALID_15,
151 MIN_STATUS_0,
152 MIN_STATUS_1,
153 MIN_STATUS_2,
154 MIN_STATUS_3,
155 MIN_STATUS_4,
156 MIN_STATUS_5,
157 MIN_STATUS_6,
158 MIN_STATUS_7,
159 MIN_STATUS_8,
160 MIN_STATUS_9,
161 MIN_STATUS_10,
162 MIN_STATUS_11,
163 MIN_STATUS_12,
164 MIN_STATUS_13,
165 MIN_STATUS_14,
166 MIN_STATUS_15,
167 MAX_STATUS_0,
168 MAX_STATUS_1,
169 MAX_STATUS_2,
170 MAX_STATUS_3,
171 MAX_STATUS_4,
172 MAX_STATUS_5,
173 MAX_STATUS_6,
174 MAX_STATUS_7,
175 MAX_STATUS_8,
176 MAX_STATUS_9,
177 MAX_STATUS_10,
178 MAX_STATUS_11,
179 MAX_STATUS_12,
180 MAX_STATUS_13,
181 MAX_STATUS_14,
182 MAX_STATUS_15,
183 LOWER_STATUS_0,
184 LOWER_STATUS_1,
185 LOWER_STATUS_2,
186 LOWER_STATUS_3,
187 LOWER_STATUS_4,
188 LOWER_STATUS_5,
189 LOWER_STATUS_6,
190 LOWER_STATUS_7,
191 LOWER_STATUS_8,
192 LOWER_STATUS_9,
193 LOWER_STATUS_10,
194 LOWER_STATUS_11,
195 LOWER_STATUS_12,
196 LOWER_STATUS_13,
197 LOWER_STATUS_14,
198 LOWER_STATUS_15,
199 UPPER_STATUS_0,
200 UPPER_STATUS_1,
201 UPPER_STATUS_2,
202 UPPER_STATUS_3,
203 UPPER_STATUS_4,
204 UPPER_STATUS_5,
205 UPPER_STATUS_6,
206 UPPER_STATUS_7,
207 UPPER_STATUS_8,
208 UPPER_STATUS_9,
209 UPPER_STATUS_10,
210 UPPER_STATUS_11,
211 UPPER_STATUS_12,
212 UPPER_STATUS_13,
213 UPPER_STATUS_14,
214 UPPER_STATUS_15,
215 CRITICAL_STATUS_0,
216 CRITICAL_STATUS_1,
217 CRITICAL_STATUS_2,
218 CRITICAL_STATUS_3,
219 CRITICAL_STATUS_4,
220 CRITICAL_STATUS_5,
221 CRITICAL_STATUS_6,
222 CRITICAL_STATUS_7,
223 CRITICAL_STATUS_8,
224 CRITICAL_STATUS_9,
225 CRITICAL_STATUS_10,
226 CRITICAL_STATUS_11,
227 CRITICAL_STATUS_12,
228 CRITICAL_STATUS_13,
229 CRITICAL_STATUS_14,
230 CRITICAL_STATUS_15,
231
232 TRDY,
233
234 INT_EN,
235 LOW_INT_EN,
236 UP_INT_EN,
237 CRIT_INT_EN,
238
239
240 MAX_REGFIELDS
241};
242
243
244
245
246
247
248
249
250
251
252struct tsens_features {
253 unsigned int ver_major;
254 unsigned int crit_int:1;
255 unsigned int adc:1;
256 unsigned int srot_split:1;
257 unsigned int max_sensors;
258};
259
260
261
262
263
264
265
266
267
268struct tsens_plat_data {
269 const u32 num_sensors;
270 const struct tsens_ops *ops;
271 unsigned int *hw_ids;
272 const struct tsens_features *feat;
273 const struct reg_field *fields;
274};
275
276
277
278
279struct tsens_context {
280 int threshold;
281 int control;
282};
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299struct tsens_priv {
300 struct device *dev;
301 u32 num_sensors;
302 struct regmap *tm_map;
303 struct regmap *srot_map;
304 u32 tm_offset;
305 struct regmap_field *rf[MAX_REGFIELDS];
306 struct tsens_context ctx;
307 const struct tsens_features *feat;
308 const struct reg_field *fields;
309 const struct tsens_ops *ops;
310 struct tsens_sensor sensor[0];
311};
312
313char *qfprom_read(struct device *dev, const char *cname);
314void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode);
315int init_common(struct tsens_priv *priv);
316int get_temp_tsens_valid(struct tsens_priv *priv, int i, int *temp);
317int get_temp_common(struct tsens_priv *priv, int i, int *temp);
318
319
320extern const struct tsens_plat_data data_8960;
321
322
323extern const struct tsens_plat_data data_8916, data_8974;
324
325
326extern const struct tsens_plat_data data_tsens_v1;
327
328
329extern const struct tsens_plat_data data_8996, data_tsens_v2;
330
331#endif
332