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10#include <linux/serial_8250.h>
11#include <linux/serial_reg.h>
12#include <linux/dmaengine.h>
13
14#include "../serial_mctrl_gpio.h"
15
16struct uart_8250_dma {
17 int (*tx_dma)(struct uart_8250_port *p);
18 int (*rx_dma)(struct uart_8250_port *p);
19
20
21 dma_filter_fn fn;
22
23 void *rx_param;
24 void *tx_param;
25
26 struct dma_slave_config rxconf;
27 struct dma_slave_config txconf;
28
29 struct dma_chan *rxchan;
30 struct dma_chan *txchan;
31
32
33 phys_addr_t rx_dma_addr;
34 phys_addr_t tx_dma_addr;
35
36
37 dma_addr_t rx_addr;
38 dma_addr_t tx_addr;
39
40 dma_cookie_t rx_cookie;
41 dma_cookie_t tx_cookie;
42
43 void *rx_buf;
44
45 size_t rx_size;
46 size_t tx_size;
47
48 unsigned char tx_running;
49 unsigned char tx_err;
50 unsigned char rx_running;
51};
52
53struct old_serial_port {
54 unsigned int uart;
55 unsigned int baud_base;
56 unsigned int port;
57 unsigned int irq;
58 upf_t flags;
59 unsigned char io_type;
60 unsigned char __iomem *iomem_base;
61 unsigned short iomem_reg_shift;
62};
63
64struct serial8250_config {
65 const char *name;
66 unsigned short fifo_size;
67 unsigned short tx_loadsz;
68 unsigned char fcr;
69 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
70 unsigned int flags;
71};
72
73#define UART_CAP_FIFO (1 << 8)
74#define UART_CAP_EFR (1 << 9)
75#define UART_CAP_SLEEP (1 << 10)
76#define UART_CAP_AFE (1 << 11)
77#define UART_CAP_UUE (1 << 12)
78#define UART_CAP_RTOIE (1 << 13)
79#define UART_CAP_HFIFO (1 << 14)
80#define UART_CAP_RPM (1 << 15)
81#define UART_CAP_IRDA (1 << 16)
82#define UART_CAP_MINI (1 << 17)
83
84
85
86#define UART_BUG_QUOT (1 << 0)
87#define UART_BUG_TXEN (1 << 1)
88#define UART_BUG_NOMSR (1 << 2)
89#define UART_BUG_THRE (1 << 3)
90#define UART_BUG_PARITY (1 << 4)
91
92
93#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
94#define SERIAL8250_SHARE_IRQS 1
95#else
96#define SERIAL8250_SHARE_IRQS 0
97#endif
98
99#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
100 { \
101 .iobase = _base, \
102 .irq = _irq, \
103 .uartclk = 1843200, \
104 .iotype = UPIO_PORT, \
105 .flags = UPF_BOOT_AUTOCONF | (_flags), \
106 }
107
108#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
109
110
111static inline int serial_in(struct uart_8250_port *up, int offset)
112{
113 return up->port.serial_in(&up->port, offset);
114}
115
116static inline void serial_out(struct uart_8250_port *up, int offset, int value)
117{
118 up->port.serial_out(&up->port, offset, value);
119}
120
121void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
122
123static inline int serial_dl_read(struct uart_8250_port *up)
124{
125 return up->dl_read(up);
126}
127
128static inline void serial_dl_write(struct uart_8250_port *up, int value)
129{
130 up->dl_write(up, value);
131}
132
133static inline bool serial8250_set_THRI(struct uart_8250_port *up)
134{
135 if (up->ier & UART_IER_THRI)
136 return false;
137 up->ier |= UART_IER_THRI;
138 serial_out(up, UART_IER, up->ier);
139 return true;
140}
141
142static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
143{
144 if (!(up->ier & UART_IER_THRI))
145 return false;
146 up->ier &= ~UART_IER_THRI;
147 serial_out(up, UART_IER, up->ier);
148 return true;
149}
150
151struct uart_8250_port *serial8250_get_port(int line);
152
153void serial8250_rpm_get(struct uart_8250_port *p);
154void serial8250_rpm_put(struct uart_8250_port *p);
155
156void serial8250_rpm_get_tx(struct uart_8250_port *p);
157void serial8250_rpm_put_tx(struct uart_8250_port *p);
158
159int serial8250_em485_init(struct uart_8250_port *p);
160void serial8250_em485_destroy(struct uart_8250_port *p);
161
162
163static inline int serial8250_TIOCM_to_MCR(int tiocm)
164{
165 int mcr = 0;
166
167 if (tiocm & TIOCM_RTS)
168 mcr |= UART_MCR_RTS;
169 if (tiocm & TIOCM_DTR)
170 mcr |= UART_MCR_DTR;
171 if (tiocm & TIOCM_OUT1)
172 mcr |= UART_MCR_OUT1;
173 if (tiocm & TIOCM_OUT2)
174 mcr |= UART_MCR_OUT2;
175 if (tiocm & TIOCM_LOOP)
176 mcr |= UART_MCR_LOOP;
177
178 return mcr;
179}
180
181static inline int serial8250_MCR_to_TIOCM(int mcr)
182{
183 int tiocm = 0;
184
185 if (mcr & UART_MCR_RTS)
186 tiocm |= TIOCM_RTS;
187 if (mcr & UART_MCR_DTR)
188 tiocm |= TIOCM_DTR;
189 if (mcr & UART_MCR_OUT1)
190 tiocm |= TIOCM_OUT1;
191 if (mcr & UART_MCR_OUT2)
192 tiocm |= TIOCM_OUT2;
193 if (mcr & UART_MCR_LOOP)
194 tiocm |= TIOCM_LOOP;
195
196 return tiocm;
197}
198
199
200static inline int serial8250_MSR_to_TIOCM(int msr)
201{
202 int tiocm = 0;
203
204 if (msr & UART_MSR_DCD)
205 tiocm |= TIOCM_CAR;
206 if (msr & UART_MSR_RI)
207 tiocm |= TIOCM_RNG;
208 if (msr & UART_MSR_DSR)
209 tiocm |= TIOCM_DSR;
210 if (msr & UART_MSR_CTS)
211 tiocm |= TIOCM_CTS;
212
213 return tiocm;
214}
215
216static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
217{
218 serial_out(up, UART_MCR, value);
219
220 if (up->gpios)
221 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
222}
223
224static inline int serial8250_in_MCR(struct uart_8250_port *up)
225{
226 int mctrl;
227
228 mctrl = serial_in(up, UART_MCR);
229
230 if (up->gpios) {
231 unsigned int mctrl_gpio = 0;
232
233 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
234 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
235 }
236
237 return mctrl;
238}
239
240#if defined(__alpha__) && !defined(CONFIG_PCI)
241
242
243
244
245
246#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
247#else
248#define ALPHA_KLUDGE_MCR 0
249#endif
250
251#ifdef CONFIG_SERIAL_8250_PNP
252int serial8250_pnp_init(void);
253void serial8250_pnp_exit(void);
254#else
255static inline int serial8250_pnp_init(void) { return 0; }
256static inline void serial8250_pnp_exit(void) { }
257#endif
258
259#ifdef CONFIG_SERIAL_8250_FINTEK
260int fintek_8250_probe(struct uart_8250_port *uart);
261#else
262static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
263#endif
264
265#ifdef CONFIG_ARCH_OMAP1
266static inline int is_omap1_8250(struct uart_8250_port *pt)
267{
268 int res;
269
270 switch (pt->port.mapbase) {
271 case OMAP1_UART1_BASE:
272 case OMAP1_UART2_BASE:
273 case OMAP1_UART3_BASE:
274 res = 1;
275 break;
276 default:
277 res = 0;
278 break;
279 }
280
281 return res;
282}
283
284static inline int is_omap1510_8250(struct uart_8250_port *pt)
285{
286 if (!cpu_is_omap1510())
287 return 0;
288
289 return is_omap1_8250(pt);
290}
291#else
292static inline int is_omap1_8250(struct uart_8250_port *pt)
293{
294 return 0;
295}
296static inline int is_omap1510_8250(struct uart_8250_port *pt)
297{
298 return 0;
299}
300#endif
301
302#ifdef CONFIG_SERIAL_8250_DMA
303extern int serial8250_tx_dma(struct uart_8250_port *);
304extern int serial8250_rx_dma(struct uart_8250_port *);
305extern void serial8250_rx_dma_flush(struct uart_8250_port *);
306extern int serial8250_request_dma(struct uart_8250_port *);
307extern void serial8250_release_dma(struct uart_8250_port *);
308#else
309static inline int serial8250_tx_dma(struct uart_8250_port *p)
310{
311 return -1;
312}
313static inline int serial8250_rx_dma(struct uart_8250_port *p)
314{
315 return -1;
316}
317static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
318static inline int serial8250_request_dma(struct uart_8250_port *p)
319{
320 return -1;
321}
322static inline void serial8250_release_dma(struct uart_8250_port *p) { }
323#endif
324
325static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
326{
327 unsigned char status;
328
329 status = serial_in(up, 0x04);
330#define PRESL(x) ((x) & 0x30)
331 if (PRESL(status) == 0x10) {
332
333 return 0;
334 } else {
335 status &= ~0xB0;
336 status |= 0x10;
337 serial_out(up, 0x04, status);
338 }
339 return 1;
340}
341
342static inline int serial_index(struct uart_port *port)
343{
344 return port->minor - 64;
345}
346