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12#if defined(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
13#define SUPPORT_SYSRQ
14#endif
15
16#include <linux/platform_device.h>
17#include <linux/serial.h>
18#include <linux/console.h>
19#include <linux/serial_core.h>
20#include <linux/slab.h>
21#include <linux/tty.h>
22#include <linux/tty_flip.h>
23#include <linux/clk.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26#include <linux/of.h>
27#include <linux/module.h>
28#include <linux/pm_runtime.h>
29#include <linux/iopoll.h>
30
31#define CDNS_UART_TTY_NAME "ttyPS"
32#define CDNS_UART_NAME "xuartps"
33#define CDNS_UART_FIFO_SIZE 64
34#define CDNS_UART_REGISTER_SPACE 0x1000
35#define TX_TIMEOUT 500000
36
37
38static int rx_trigger_level = 56;
39static int uartps_major;
40module_param(rx_trigger_level, uint, 0444);
41MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
42
43
44static int rx_timeout = 10;
45module_param(rx_timeout, uint, 0444);
46MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
47
48
49#define CDNS_UART_CR 0x00
50#define CDNS_UART_MR 0x04
51#define CDNS_UART_IER 0x08
52#define CDNS_UART_IDR 0x0C
53#define CDNS_UART_IMR 0x10
54#define CDNS_UART_ISR 0x14
55#define CDNS_UART_BAUDGEN 0x18
56#define CDNS_UART_RXTOUT 0x1C
57#define CDNS_UART_RXWM 0x20
58#define CDNS_UART_MODEMCR 0x24
59#define CDNS_UART_MODEMSR 0x28
60#define CDNS_UART_SR 0x2C
61#define CDNS_UART_FIFO 0x30
62#define CDNS_UART_BAUDDIV 0x34
63#define CDNS_UART_FLOWDEL 0x38
64#define CDNS_UART_IRRX_PWIDTH 0x3C
65#define CDNS_UART_IRTX_PWIDTH 0x40
66#define CDNS_UART_TXWM 0x44
67#define CDNS_UART_RXBS 0x48
68
69
70#define CDNS_UART_CR_STOPBRK 0x00000100
71#define CDNS_UART_CR_STARTBRK 0x00000080
72#define CDNS_UART_CR_TX_DIS 0x00000020
73#define CDNS_UART_CR_TX_EN 0x00000010
74#define CDNS_UART_CR_RX_DIS 0x00000008
75#define CDNS_UART_CR_RX_EN 0x00000004
76#define CDNS_UART_CR_TXRST 0x00000002
77#define CDNS_UART_CR_RXRST 0x00000001
78#define CDNS_UART_CR_RST_TO 0x00000040
79#define CDNS_UART_RXBS_PARITY 0x00000001
80#define CDNS_UART_RXBS_FRAMING 0x00000002
81#define CDNS_UART_RXBS_BRK 0x00000004
82
83
84
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86
87
88
89#define CDNS_UART_MR_CLKSEL 0x00000001
90#define CDNS_UART_MR_CHMODE_L_LOOP 0x00000200
91#define CDNS_UART_MR_CHMODE_NORM 0x00000000
92#define CDNS_UART_MR_CHMODE_MASK 0x00000300
93
94#define CDNS_UART_MR_STOPMODE_2_BIT 0x00000080
95#define CDNS_UART_MR_STOPMODE_1_BIT 0x00000000
96
97#define CDNS_UART_MR_PARITY_NONE 0x00000020
98#define CDNS_UART_MR_PARITY_MARK 0x00000018
99#define CDNS_UART_MR_PARITY_SPACE 0x00000010
100#define CDNS_UART_MR_PARITY_ODD 0x00000008
101#define CDNS_UART_MR_PARITY_EVEN 0x00000000
102
103#define CDNS_UART_MR_CHARLEN_6_BIT 0x00000006
104#define CDNS_UART_MR_CHARLEN_7_BIT 0x00000004
105#define CDNS_UART_MR_CHARLEN_8_BIT 0x00000000
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116
117
118#define CDNS_UART_IXR_TOUT 0x00000100
119#define CDNS_UART_IXR_PARITY 0x00000080
120#define CDNS_UART_IXR_FRAMING 0x00000040
121#define CDNS_UART_IXR_OVERRUN 0x00000020
122#define CDNS_UART_IXR_TXFULL 0x00000010
123#define CDNS_UART_IXR_TXEMPTY 0x00000008
124#define CDNS_UART_ISR_RXEMPTY 0x00000002
125#define CDNS_UART_IXR_RXTRIG 0x00000001
126#define CDNS_UART_IXR_RXFULL 0x00000004
127#define CDNS_UART_IXR_RXEMPTY 0x00000002
128#define CDNS_UART_IXR_RXMASK 0x000021e7
129
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140
141
142#define CDNS_UART_RX_IRQS (CDNS_UART_IXR_FRAMING | \
143 CDNS_UART_IXR_OVERRUN | \
144 CDNS_UART_IXR_RXTRIG | \
145 CDNS_UART_IXR_TOUT)
146
147
148#define CDNS_UART_IXR_BRK 0x00002000
149
150#define CDNS_UART_RXBS_SUPPORT BIT(1)
151
152
153
154
155
156#define CDNS_UART_MODEMCR_FCM 0x00000020
157#define CDNS_UART_MODEMCR_RTS 0x00000002
158#define CDNS_UART_MODEMCR_DTR 0x00000001
159
160
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162
163
164
165
166#define CDNS_UART_SR_RXEMPTY 0x00000002
167#define CDNS_UART_SR_TXEMPTY 0x00000008
168#define CDNS_UART_SR_TXFULL 0x00000010
169#define CDNS_UART_SR_RXTRIG 0x00000001
170#define CDNS_UART_SR_TACTIVE 0x00000800
171
172
173#define CDNS_UART_BDIV_MIN 4
174#define CDNS_UART_BDIV_MAX 255
175#define CDNS_UART_CD_MAX 65535
176#define UART_AUTOSUSPEND_TIMEOUT 3000
177
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187
188
189struct cdns_uart {
190 struct uart_port *port;
191 struct clk *uartclk;
192 struct clk *pclk;
193 struct uart_driver *cdns_uart_driver;
194 unsigned int baud;
195 int id;
196 struct notifier_block clk_rate_change_nb;
197 u32 quirks;
198 bool cts_override;
199};
200struct cdns_platform_data {
201 u32 quirks;
202};
203#define to_cdns_uart(_nb) container_of(_nb, struct cdns_uart, \
204 clk_rate_change_nb)
205
206
207
208
209
210
211
212static void cdns_uart_handle_rx(void *dev_id, unsigned int isrstatus)
213{
214 struct uart_port *port = (struct uart_port *)dev_id;
215 struct cdns_uart *cdns_uart = port->private_data;
216 unsigned int data;
217 unsigned int rxbs_status = 0;
218 unsigned int status_mask;
219 unsigned int framerrprocessed = 0;
220 char status = TTY_NORMAL;
221 bool is_rxbs_support;
222
223 is_rxbs_support = cdns_uart->quirks & CDNS_UART_RXBS_SUPPORT;
224
225 while ((readl(port->membase + CDNS_UART_SR) &
226 CDNS_UART_SR_RXEMPTY) != CDNS_UART_SR_RXEMPTY) {
227 if (is_rxbs_support)
228 rxbs_status = readl(port->membase + CDNS_UART_RXBS);
229 data = readl(port->membase + CDNS_UART_FIFO);
230 port->icount.rx++;
231
232
233
234
235
236
237 if (!is_rxbs_support && (isrstatus & CDNS_UART_IXR_FRAMING)) {
238 if (!data) {
239 port->read_status_mask |= CDNS_UART_IXR_BRK;
240 framerrprocessed = 1;
241 continue;
242 }
243 }
244 if (is_rxbs_support && (rxbs_status & CDNS_UART_RXBS_BRK)) {
245 port->icount.brk++;
246 status = TTY_BREAK;
247 if (uart_handle_break(port))
248 continue;
249 }
250
251 isrstatus &= port->read_status_mask;
252 isrstatus &= ~port->ignore_status_mask;
253 status_mask = port->read_status_mask;
254 status_mask &= ~port->ignore_status_mask;
255
256 if (data &&
257 (port->read_status_mask & CDNS_UART_IXR_BRK)) {
258 port->read_status_mask &= ~CDNS_UART_IXR_BRK;
259 port->icount.brk++;
260 if (uart_handle_break(port))
261 continue;
262 }
263
264 if (uart_handle_sysrq_char(port, data))
265 continue;
266
267 if (is_rxbs_support) {
268 if ((rxbs_status & CDNS_UART_RXBS_PARITY)
269 && (status_mask & CDNS_UART_IXR_PARITY)) {
270 port->icount.parity++;
271 status = TTY_PARITY;
272 }
273 if ((rxbs_status & CDNS_UART_RXBS_FRAMING)
274 && (status_mask & CDNS_UART_IXR_PARITY)) {
275 port->icount.frame++;
276 status = TTY_FRAME;
277 }
278 } else {
279 if (isrstatus & CDNS_UART_IXR_PARITY) {
280 port->icount.parity++;
281 status = TTY_PARITY;
282 }
283 if ((isrstatus & CDNS_UART_IXR_FRAMING) &&
284 !framerrprocessed) {
285 port->icount.frame++;
286 status = TTY_FRAME;
287 }
288 }
289 if (isrstatus & CDNS_UART_IXR_OVERRUN) {
290 port->icount.overrun++;
291 tty_insert_flip_char(&port->state->port, 0,
292 TTY_OVERRUN);
293 }
294 tty_insert_flip_char(&port->state->port, data, status);
295 isrstatus = 0;
296 }
297 spin_unlock(&port->lock);
298 tty_flip_buffer_push(&port->state->port);
299 spin_lock(&port->lock);
300}
301
302
303
304
305
306
307static void cdns_uart_handle_tx(void *dev_id)
308{
309 struct uart_port *port = (struct uart_port *)dev_id;
310 unsigned int numbytes;
311
312 if (uart_circ_empty(&port->state->xmit)) {
313 writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IDR);
314 } else {
315 numbytes = port->fifosize;
316 while (numbytes && !uart_circ_empty(&port->state->xmit) &&
317 !(readl(port->membase + CDNS_UART_SR) &
318 CDNS_UART_SR_TXFULL)) {
319
320
321
322
323
324 writel(
325 port->state->xmit.buf[port->state->xmit.tail],
326 port->membase + CDNS_UART_FIFO);
327
328 port->icount.tx++;
329
330
331
332
333
334 port->state->xmit.tail =
335 (port->state->xmit.tail + 1) &
336 (UART_XMIT_SIZE - 1);
337
338 numbytes--;
339 }
340
341 if (uart_circ_chars_pending(
342 &port->state->xmit) < WAKEUP_CHARS)
343 uart_write_wakeup(port);
344 }
345}
346
347
348
349
350
351
352
353
354static irqreturn_t cdns_uart_isr(int irq, void *dev_id)
355{
356 struct uart_port *port = (struct uart_port *)dev_id;
357 unsigned int isrstatus;
358
359 spin_lock(&port->lock);
360
361
362
363
364 isrstatus = readl(port->membase + CDNS_UART_ISR);
365 writel(isrstatus, port->membase + CDNS_UART_ISR);
366
367 if (isrstatus & CDNS_UART_IXR_TXEMPTY) {
368 cdns_uart_handle_tx(dev_id);
369 isrstatus &= ~CDNS_UART_IXR_TXEMPTY;
370 }
371
372
373
374
375
376 if (isrstatus & CDNS_UART_IXR_RXMASK &&
377 !(readl(port->membase + CDNS_UART_CR) & CDNS_UART_CR_RX_DIS))
378 cdns_uart_handle_rx(dev_id, isrstatus);
379
380 spin_unlock(&port->lock);
381 return IRQ_HANDLED;
382}
383
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391
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401
402
403
404static unsigned int cdns_uart_calc_baud_divs(unsigned int clk,
405 unsigned int baud, u32 *rbdiv, u32 *rcd, int *div8)
406{
407 u32 cd, bdiv;
408 unsigned int calc_baud;
409 unsigned int bestbaud = 0;
410 unsigned int bauderror;
411 unsigned int besterror = ~0;
412
413 if (baud < clk / ((CDNS_UART_BDIV_MAX + 1) * CDNS_UART_CD_MAX)) {
414 *div8 = 1;
415 clk /= 8;
416 } else {
417 *div8 = 0;
418 }
419
420 for (bdiv = CDNS_UART_BDIV_MIN; bdiv <= CDNS_UART_BDIV_MAX; bdiv++) {
421 cd = DIV_ROUND_CLOSEST(clk, baud * (bdiv + 1));
422 if (cd < 1 || cd > CDNS_UART_CD_MAX)
423 continue;
424
425 calc_baud = clk / (cd * (bdiv + 1));
426
427 if (baud > calc_baud)
428 bauderror = baud - calc_baud;
429 else
430 bauderror = calc_baud - baud;
431
432 if (besterror > bauderror) {
433 *rbdiv = bdiv;
434 *rcd = cd;
435 bestbaud = calc_baud;
436 besterror = bauderror;
437 }
438 }
439
440 if (((besterror * 100) / baud) < 3)
441 bestbaud = baud;
442
443 return bestbaud;
444}
445
446
447
448
449
450
451
452
453static unsigned int cdns_uart_set_baud_rate(struct uart_port *port,
454 unsigned int baud)
455{
456 unsigned int calc_baud;
457 u32 cd = 0, bdiv = 0;
458 u32 mreg;
459 int div8;
460 struct cdns_uart *cdns_uart = port->private_data;
461
462 calc_baud = cdns_uart_calc_baud_divs(port->uartclk, baud, &bdiv, &cd,
463 &div8);
464
465
466 mreg = readl(port->membase + CDNS_UART_MR);
467 if (div8)
468 mreg |= CDNS_UART_MR_CLKSEL;
469 else
470 mreg &= ~CDNS_UART_MR_CLKSEL;
471 writel(mreg, port->membase + CDNS_UART_MR);
472 writel(cd, port->membase + CDNS_UART_BAUDGEN);
473 writel(bdiv, port->membase + CDNS_UART_BAUDDIV);
474 cdns_uart->baud = baud;
475
476 return calc_baud;
477}
478
479#ifdef CONFIG_COMMON_CLK
480
481
482
483
484
485
486
487static int cdns_uart_clk_notifier_cb(struct notifier_block *nb,
488 unsigned long event, void *data)
489{
490 u32 ctrl_reg;
491 struct uart_port *port;
492 int locked = 0;
493 struct clk_notifier_data *ndata = data;
494 unsigned long flags = 0;
495 struct cdns_uart *cdns_uart = to_cdns_uart(nb);
496
497 port = cdns_uart->port;
498 if (port->suspended)
499 return NOTIFY_OK;
500
501 switch (event) {
502 case PRE_RATE_CHANGE:
503 {
504 u32 bdiv, cd;
505 int div8;
506
507
508
509
510
511 if (!cdns_uart_calc_baud_divs(ndata->new_rate, cdns_uart->baud,
512 &bdiv, &cd, &div8)) {
513 dev_warn(port->dev, "clock rate change rejected\n");
514 return NOTIFY_BAD;
515 }
516
517 spin_lock_irqsave(&cdns_uart->port->lock, flags);
518
519
520 ctrl_reg = readl(port->membase + CDNS_UART_CR);
521 ctrl_reg |= CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS;
522 writel(ctrl_reg, port->membase + CDNS_UART_CR);
523
524 spin_unlock_irqrestore(&cdns_uart->port->lock, flags);
525
526 return NOTIFY_OK;
527 }
528 case POST_RATE_CHANGE:
529
530
531
532
533
534 spin_lock_irqsave(&cdns_uart->port->lock, flags);
535
536 locked = 1;
537 port->uartclk = ndata->new_rate;
538
539 cdns_uart->baud = cdns_uart_set_baud_rate(cdns_uart->port,
540 cdns_uart->baud);
541
542 case ABORT_RATE_CHANGE:
543 if (!locked)
544 spin_lock_irqsave(&cdns_uart->port->lock, flags);
545
546
547 ctrl_reg = readl(port->membase + CDNS_UART_CR);
548 ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST;
549 writel(ctrl_reg, port->membase + CDNS_UART_CR);
550
551 while (readl(port->membase + CDNS_UART_CR) &
552 (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
553 cpu_relax();
554
555
556
557
558
559
560 writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
561 ctrl_reg = readl(port->membase + CDNS_UART_CR);
562 ctrl_reg &= ~(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS);
563 ctrl_reg |= CDNS_UART_CR_TX_EN | CDNS_UART_CR_RX_EN;
564 writel(ctrl_reg, port->membase + CDNS_UART_CR);
565
566 spin_unlock_irqrestore(&cdns_uart->port->lock, flags);
567
568 return NOTIFY_OK;
569 default:
570 return NOTIFY_DONE;
571 }
572}
573#endif
574
575
576
577
578
579static void cdns_uart_start_tx(struct uart_port *port)
580{
581 unsigned int status;
582
583 if (uart_tx_stopped(port))
584 return;
585
586
587
588
589
590 status = readl(port->membase + CDNS_UART_CR);
591 status &= ~CDNS_UART_CR_TX_DIS;
592 status |= CDNS_UART_CR_TX_EN;
593 writel(status, port->membase + CDNS_UART_CR);
594
595 if (uart_circ_empty(&port->state->xmit))
596 return;
597
598 cdns_uart_handle_tx(port);
599
600 writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_ISR);
601
602 writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IER);
603}
604
605
606
607
608
609static void cdns_uart_stop_tx(struct uart_port *port)
610{
611 unsigned int regval;
612
613 regval = readl(port->membase + CDNS_UART_CR);
614 regval |= CDNS_UART_CR_TX_DIS;
615
616 writel(regval, port->membase + CDNS_UART_CR);
617}
618
619
620
621
622
623static void cdns_uart_stop_rx(struct uart_port *port)
624{
625 unsigned int regval;
626
627
628 writel(CDNS_UART_RX_IRQS, port->membase + CDNS_UART_IDR);
629
630
631 regval = readl(port->membase + CDNS_UART_CR);
632 regval |= CDNS_UART_CR_RX_DIS;
633 writel(regval, port->membase + CDNS_UART_CR);
634}
635
636
637
638
639
640
641
642static unsigned int cdns_uart_tx_empty(struct uart_port *port)
643{
644 unsigned int status;
645
646 status = readl(port->membase + CDNS_UART_SR) &
647 CDNS_UART_SR_TXEMPTY;
648 return status ? TIOCSER_TEMT : 0;
649}
650
651
652
653
654
655
656
657static void cdns_uart_break_ctl(struct uart_port *port, int ctl)
658{
659 unsigned int status;
660 unsigned long flags;
661
662 spin_lock_irqsave(&port->lock, flags);
663
664 status = readl(port->membase + CDNS_UART_CR);
665
666 if (ctl == -1)
667 writel(CDNS_UART_CR_STARTBRK | status,
668 port->membase + CDNS_UART_CR);
669 else {
670 if ((status & CDNS_UART_CR_STOPBRK) == 0)
671 writel(CDNS_UART_CR_STOPBRK | status,
672 port->membase + CDNS_UART_CR);
673 }
674 spin_unlock_irqrestore(&port->lock, flags);
675}
676
677
678
679
680
681
682
683
684static void cdns_uart_set_termios(struct uart_port *port,
685 struct ktermios *termios, struct ktermios *old)
686{
687 unsigned int cval = 0;
688 unsigned int baud, minbaud, maxbaud;
689 unsigned long flags;
690 unsigned int ctrl_reg, mode_reg, val;
691 int err;
692
693
694 if (!(readl(port->membase + CDNS_UART_CR) &
695 CDNS_UART_CR_TX_DIS)) {
696 err = readl_poll_timeout(port->membase + CDNS_UART_SR,
697 val, (val & CDNS_UART_SR_TXEMPTY),
698 1000, TX_TIMEOUT);
699 if (err) {
700 dev_err(port->dev, "timed out waiting for tx empty");
701 return;
702 }
703 }
704 spin_lock_irqsave(&port->lock, flags);
705
706
707 ctrl_reg = readl(port->membase + CDNS_UART_CR);
708 ctrl_reg |= CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS;
709 writel(ctrl_reg, port->membase + CDNS_UART_CR);
710
711
712
713
714
715
716 minbaud = port->uartclk /
717 ((CDNS_UART_BDIV_MAX + 1) * CDNS_UART_CD_MAX * 8);
718 maxbaud = port->uartclk / (CDNS_UART_BDIV_MIN + 1);
719 baud = uart_get_baud_rate(port, termios, old, minbaud, maxbaud);
720 baud = cdns_uart_set_baud_rate(port, baud);
721 if (tty_termios_baud_rate(termios))
722 tty_termios_encode_baud_rate(termios, baud, baud);
723
724
725 uart_update_timeout(port, termios->c_cflag, baud);
726
727
728 ctrl_reg = readl(port->membase + CDNS_UART_CR);
729 ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST;
730 writel(ctrl_reg, port->membase + CDNS_UART_CR);
731
732 while (readl(port->membase + CDNS_UART_CR) &
733 (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
734 cpu_relax();
735
736
737
738
739
740 ctrl_reg = readl(port->membase + CDNS_UART_CR);
741 ctrl_reg &= ~(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS);
742 ctrl_reg |= CDNS_UART_CR_TX_EN | CDNS_UART_CR_RX_EN;
743 writel(ctrl_reg, port->membase + CDNS_UART_CR);
744
745 writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
746
747 port->read_status_mask = CDNS_UART_IXR_TXEMPTY | CDNS_UART_IXR_RXTRIG |
748 CDNS_UART_IXR_OVERRUN | CDNS_UART_IXR_TOUT;
749 port->ignore_status_mask = 0;
750
751 if (termios->c_iflag & INPCK)
752 port->read_status_mask |= CDNS_UART_IXR_PARITY |
753 CDNS_UART_IXR_FRAMING;
754
755 if (termios->c_iflag & IGNPAR)
756 port->ignore_status_mask |= CDNS_UART_IXR_PARITY |
757 CDNS_UART_IXR_FRAMING | CDNS_UART_IXR_OVERRUN;
758
759
760 if ((termios->c_cflag & CREAD) == 0)
761 port->ignore_status_mask |= CDNS_UART_IXR_RXTRIG |
762 CDNS_UART_IXR_TOUT | CDNS_UART_IXR_PARITY |
763 CDNS_UART_IXR_FRAMING | CDNS_UART_IXR_OVERRUN;
764
765 mode_reg = readl(port->membase + CDNS_UART_MR);
766
767
768 switch (termios->c_cflag & CSIZE) {
769 case CS6:
770 cval |= CDNS_UART_MR_CHARLEN_6_BIT;
771 break;
772 case CS7:
773 cval |= CDNS_UART_MR_CHARLEN_7_BIT;
774 break;
775 default:
776 case CS8:
777 cval |= CDNS_UART_MR_CHARLEN_8_BIT;
778 termios->c_cflag &= ~CSIZE;
779 termios->c_cflag |= CS8;
780 break;
781 }
782
783
784 if (termios->c_cflag & CSTOPB)
785 cval |= CDNS_UART_MR_STOPMODE_2_BIT;
786 else
787 cval |= CDNS_UART_MR_STOPMODE_1_BIT;
788
789 if (termios->c_cflag & PARENB) {
790
791 if (termios->c_cflag & CMSPAR) {
792 if (termios->c_cflag & PARODD)
793 cval |= CDNS_UART_MR_PARITY_MARK;
794 else
795 cval |= CDNS_UART_MR_PARITY_SPACE;
796 } else {
797 if (termios->c_cflag & PARODD)
798 cval |= CDNS_UART_MR_PARITY_ODD;
799 else
800 cval |= CDNS_UART_MR_PARITY_EVEN;
801 }
802 } else {
803 cval |= CDNS_UART_MR_PARITY_NONE;
804 }
805 cval |= mode_reg & 1;
806 writel(cval, port->membase + CDNS_UART_MR);
807
808 spin_unlock_irqrestore(&port->lock, flags);
809}
810
811
812
813
814
815
816
817static int cdns_uart_startup(struct uart_port *port)
818{
819 struct cdns_uart *cdns_uart = port->private_data;
820 bool is_brk_support;
821 int ret;
822 unsigned long flags;
823 unsigned int status = 0;
824
825 is_brk_support = cdns_uart->quirks & CDNS_UART_RXBS_SUPPORT;
826
827 spin_lock_irqsave(&port->lock, flags);
828
829
830 writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,
831 port->membase + CDNS_UART_CR);
832
833
834
835
836 writel(CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST,
837 port->membase + CDNS_UART_CR);
838
839 while (readl(port->membase + CDNS_UART_CR) &
840 (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
841 cpu_relax();
842
843
844
845
846
847 status = readl(port->membase + CDNS_UART_CR);
848 status &= ~CDNS_UART_CR_RX_DIS;
849 status |= CDNS_UART_CR_RX_EN;
850 writel(status, port->membase + CDNS_UART_CR);
851
852
853
854
855 writel(CDNS_UART_MR_CHMODE_NORM | CDNS_UART_MR_STOPMODE_1_BIT
856 | CDNS_UART_MR_PARITY_NONE | CDNS_UART_MR_CHARLEN_8_BIT,
857 port->membase + CDNS_UART_MR);
858
859
860
861
862
863 writel(rx_trigger_level, port->membase + CDNS_UART_RXWM);
864
865
866
867
868
869 writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
870
871
872 writel(readl(port->membase + CDNS_UART_ISR),
873 port->membase + CDNS_UART_ISR);
874
875 spin_unlock_irqrestore(&port->lock, flags);
876
877 ret = request_irq(port->irq, cdns_uart_isr, 0, CDNS_UART_NAME, port);
878 if (ret) {
879 dev_err(port->dev, "request_irq '%d' failed with %d\n",
880 port->irq, ret);
881 return ret;
882 }
883
884
885 if (is_brk_support)
886 writel(CDNS_UART_RX_IRQS | CDNS_UART_IXR_BRK,
887 port->membase + CDNS_UART_IER);
888 else
889 writel(CDNS_UART_RX_IRQS, port->membase + CDNS_UART_IER);
890
891 return 0;
892}
893
894
895
896
897
898static void cdns_uart_shutdown(struct uart_port *port)
899{
900 int status;
901 unsigned long flags;
902
903 spin_lock_irqsave(&port->lock, flags);
904
905
906 status = readl(port->membase + CDNS_UART_IMR);
907 writel(status, port->membase + CDNS_UART_IDR);
908 writel(0xffffffff, port->membase + CDNS_UART_ISR);
909
910
911 writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,
912 port->membase + CDNS_UART_CR);
913
914 spin_unlock_irqrestore(&port->lock, flags);
915
916 free_irq(port->irq, port);
917}
918
919
920
921
922
923
924
925static const char *cdns_uart_type(struct uart_port *port)
926{
927 return port->type == PORT_XUARTPS ? CDNS_UART_NAME : NULL;
928}
929
930
931
932
933
934
935
936
937static int cdns_uart_verify_port(struct uart_port *port,
938 struct serial_struct *ser)
939{
940 if (ser->type != PORT_UNKNOWN && ser->type != PORT_XUARTPS)
941 return -EINVAL;
942 if (port->irq != ser->irq)
943 return -EINVAL;
944 if (ser->io_type != UPIO_MEM)
945 return -EINVAL;
946 if (port->iobase != ser->port)
947 return -EINVAL;
948 if (ser->hub6 != 0)
949 return -EINVAL;
950 return 0;
951}
952
953
954
955
956
957
958
959
960
961static int cdns_uart_request_port(struct uart_port *port)
962{
963 if (!request_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE,
964 CDNS_UART_NAME)) {
965 return -ENOMEM;
966 }
967
968 port->membase = ioremap(port->mapbase, CDNS_UART_REGISTER_SPACE);
969 if (!port->membase) {
970 dev_err(port->dev, "Unable to map registers\n");
971 release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE);
972 return -ENOMEM;
973 }
974 return 0;
975}
976
977
978
979
980
981
982
983
984static void cdns_uart_release_port(struct uart_port *port)
985{
986 release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE);
987 iounmap(port->membase);
988 port->membase = NULL;
989}
990
991
992
993
994
995
996static void cdns_uart_config_port(struct uart_port *port, int flags)
997{
998 if (flags & UART_CONFIG_TYPE && cdns_uart_request_port(port) == 0)
999 port->type = PORT_XUARTPS;
1000}
1001
1002
1003
1004
1005
1006
1007
1008static unsigned int cdns_uart_get_mctrl(struct uart_port *port)
1009{
1010 struct cdns_uart *cdns_uart_data = port->private_data;
1011
1012 if (cdns_uart_data->cts_override)
1013 return 0;
1014
1015 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
1016}
1017
1018static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
1019{
1020 u32 val;
1021 u32 mode_reg;
1022 struct cdns_uart *cdns_uart_data = port->private_data;
1023
1024 if (cdns_uart_data->cts_override)
1025 return;
1026
1027 val = readl(port->membase + CDNS_UART_MODEMCR);
1028 mode_reg = readl(port->membase + CDNS_UART_MR);
1029
1030 val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR |
1031 CDNS_UART_MODEMCR_FCM);
1032 mode_reg &= ~CDNS_UART_MR_CHMODE_MASK;
1033
1034 if (mctrl & TIOCM_RTS || mctrl & TIOCM_DTR)
1035 val |= CDNS_UART_MODEMCR_FCM;
1036 if (mctrl & TIOCM_LOOP)
1037 mode_reg |= CDNS_UART_MR_CHMODE_L_LOOP;
1038 else
1039 mode_reg |= CDNS_UART_MR_CHMODE_NORM;
1040
1041 writel(val, port->membase + CDNS_UART_MODEMCR);
1042 writel(mode_reg, port->membase + CDNS_UART_MR);
1043}
1044
1045#ifdef CONFIG_CONSOLE_POLL
1046static int cdns_uart_poll_get_char(struct uart_port *port)
1047{
1048 int c;
1049 unsigned long flags;
1050
1051 spin_lock_irqsave(&port->lock, flags);
1052
1053
1054 if (readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_RXEMPTY)
1055 c = NO_POLL_CHAR;
1056 else
1057 c = (unsigned char) readl(port->membase + CDNS_UART_FIFO);
1058
1059 spin_unlock_irqrestore(&port->lock, flags);
1060
1061 return c;
1062}
1063
1064static void cdns_uart_poll_put_char(struct uart_port *port, unsigned char c)
1065{
1066 unsigned long flags;
1067
1068 spin_lock_irqsave(&port->lock, flags);
1069
1070
1071 while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))
1072 cpu_relax();
1073
1074
1075 writel(c, port->membase + CDNS_UART_FIFO);
1076
1077
1078 while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))
1079 cpu_relax();
1080
1081 spin_unlock_irqrestore(&port->lock, flags);
1082}
1083#endif
1084
1085static void cdns_uart_pm(struct uart_port *port, unsigned int state,
1086 unsigned int oldstate)
1087{
1088 switch (state) {
1089 case UART_PM_STATE_OFF:
1090 pm_runtime_mark_last_busy(port->dev);
1091 pm_runtime_put_autosuspend(port->dev);
1092 break;
1093 default:
1094 pm_runtime_get_sync(port->dev);
1095 break;
1096 }
1097}
1098
1099static const struct uart_ops cdns_uart_ops = {
1100 .set_mctrl = cdns_uart_set_mctrl,
1101 .get_mctrl = cdns_uart_get_mctrl,
1102 .start_tx = cdns_uart_start_tx,
1103 .stop_tx = cdns_uart_stop_tx,
1104 .stop_rx = cdns_uart_stop_rx,
1105 .tx_empty = cdns_uart_tx_empty,
1106 .break_ctl = cdns_uart_break_ctl,
1107 .set_termios = cdns_uart_set_termios,
1108 .startup = cdns_uart_startup,
1109 .shutdown = cdns_uart_shutdown,
1110 .pm = cdns_uart_pm,
1111 .type = cdns_uart_type,
1112 .verify_port = cdns_uart_verify_port,
1113 .request_port = cdns_uart_request_port,
1114 .release_port = cdns_uart_release_port,
1115 .config_port = cdns_uart_config_port,
1116#ifdef CONFIG_CONSOLE_POLL
1117 .poll_get_char = cdns_uart_poll_get_char,
1118 .poll_put_char = cdns_uart_poll_put_char,
1119#endif
1120};
1121
1122#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1123
1124
1125
1126
1127
1128static void cdns_uart_console_putchar(struct uart_port *port, int ch)
1129{
1130 while (readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL)
1131 cpu_relax();
1132 writel(ch, port->membase + CDNS_UART_FIFO);
1133}
1134
1135static void cdns_early_write(struct console *con, const char *s,
1136 unsigned n)
1137{
1138 struct earlycon_device *dev = con->data;
1139
1140 uart_console_write(&dev->port, s, n, cdns_uart_console_putchar);
1141}
1142
1143static int __init cdns_early_console_setup(struct earlycon_device *device,
1144 const char *opt)
1145{
1146 struct uart_port *port = &device->port;
1147
1148 if (!port->membase)
1149 return -ENODEV;
1150
1151
1152 writel(CDNS_UART_CR_TX_EN|CDNS_UART_CR_TXRST|CDNS_UART_CR_RXRST,
1153 port->membase + CDNS_UART_CR);
1154
1155
1156
1157
1158 if (port->uartclk && device->baud) {
1159 u32 cd = 0, bdiv = 0;
1160 u32 mr;
1161 int div8;
1162
1163 cdns_uart_calc_baud_divs(port->uartclk, device->baud,
1164 &bdiv, &cd, &div8);
1165 mr = CDNS_UART_MR_PARITY_NONE;
1166 if (div8)
1167 mr |= CDNS_UART_MR_CLKSEL;
1168
1169 writel(mr, port->membase + CDNS_UART_MR);
1170 writel(cd, port->membase + CDNS_UART_BAUDGEN);
1171 writel(bdiv, port->membase + CDNS_UART_BAUDDIV);
1172 }
1173
1174 device->con->write = cdns_early_write;
1175
1176 return 0;
1177}
1178OF_EARLYCON_DECLARE(cdns, "xlnx,xuartps", cdns_early_console_setup);
1179OF_EARLYCON_DECLARE(cdns, "cdns,uart-r1p8", cdns_early_console_setup);
1180OF_EARLYCON_DECLARE(cdns, "cdns,uart-r1p12", cdns_early_console_setup);
1181OF_EARLYCON_DECLARE(cdns, "xlnx,zynqmp-uart", cdns_early_console_setup);
1182
1183
1184
1185static struct uart_port *console_port;
1186
1187
1188
1189
1190
1191
1192
1193static void cdns_uart_console_write(struct console *co, const char *s,
1194 unsigned int count)
1195{
1196 struct uart_port *port = console_port;
1197 unsigned long flags;
1198 unsigned int imr, ctrl;
1199 int locked = 1;
1200
1201 if (port->sysrq)
1202 locked = 0;
1203 else if (oops_in_progress)
1204 locked = spin_trylock_irqsave(&port->lock, flags);
1205 else
1206 spin_lock_irqsave(&port->lock, flags);
1207
1208
1209 imr = readl(port->membase + CDNS_UART_IMR);
1210 writel(imr, port->membase + CDNS_UART_IDR);
1211
1212
1213
1214
1215
1216 ctrl = readl(port->membase + CDNS_UART_CR);
1217 ctrl &= ~CDNS_UART_CR_TX_DIS;
1218 ctrl |= CDNS_UART_CR_TX_EN;
1219 writel(ctrl, port->membase + CDNS_UART_CR);
1220
1221 uart_console_write(port, s, count, cdns_uart_console_putchar);
1222 while ((readl(port->membase + CDNS_UART_SR) &
1223 (CDNS_UART_SR_TXEMPTY | CDNS_UART_SR_TACTIVE)) !=
1224 CDNS_UART_SR_TXEMPTY)
1225 cpu_relax();
1226
1227
1228 writel(imr, port->membase + CDNS_UART_IER);
1229
1230 if (locked)
1231 spin_unlock_irqrestore(&port->lock, flags);
1232}
1233
1234
1235
1236
1237
1238
1239
1240
1241static int cdns_uart_console_setup(struct console *co, char *options)
1242{
1243 struct uart_port *port = console_port;
1244
1245 int baud = 9600;
1246 int bits = 8;
1247 int parity = 'n';
1248 int flow = 'n';
1249
1250 if (!port->membase) {
1251 pr_debug("console on " CDNS_UART_TTY_NAME "%i not present\n",
1252 co->index);
1253 return -ENODEV;
1254 }
1255
1256 if (options)
1257 uart_parse_options(options, &baud, &parity, &bits, &flow);
1258
1259 return uart_set_options(port, co, baud, parity, bits, flow);
1260}
1261#endif
1262
1263#ifdef CONFIG_PM_SLEEP
1264
1265
1266
1267
1268
1269
1270static int cdns_uart_suspend(struct device *device)
1271{
1272 struct uart_port *port = dev_get_drvdata(device);
1273 struct cdns_uart *cdns_uart = port->private_data;
1274 int may_wake;
1275
1276 may_wake = device_may_wakeup(device);
1277
1278 if (console_suspend_enabled && uart_console(port) && may_wake) {
1279 unsigned long flags = 0;
1280
1281 spin_lock_irqsave(&port->lock, flags);
1282
1283 while (!(readl(port->membase + CDNS_UART_SR) &
1284 CDNS_UART_SR_RXEMPTY))
1285 readl(port->membase + CDNS_UART_FIFO);
1286
1287 writel(1, port->membase + CDNS_UART_RXWM);
1288
1289 writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IDR);
1290 spin_unlock_irqrestore(&port->lock, flags);
1291 }
1292
1293
1294
1295
1296
1297 return uart_suspend_port(cdns_uart->cdns_uart_driver, port);
1298}
1299
1300
1301
1302
1303
1304
1305
1306static int cdns_uart_resume(struct device *device)
1307{
1308 struct uart_port *port = dev_get_drvdata(device);
1309 struct cdns_uart *cdns_uart = port->private_data;
1310 unsigned long flags = 0;
1311 u32 ctrl_reg;
1312 int may_wake;
1313
1314 may_wake = device_may_wakeup(device);
1315
1316 if (console_suspend_enabled && uart_console(port) && !may_wake) {
1317 clk_enable(cdns_uart->pclk);
1318 clk_enable(cdns_uart->uartclk);
1319
1320 spin_lock_irqsave(&port->lock, flags);
1321
1322
1323 ctrl_reg = readl(port->membase + CDNS_UART_CR);
1324 ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST;
1325 writel(ctrl_reg, port->membase + CDNS_UART_CR);
1326 while (readl(port->membase + CDNS_UART_CR) &
1327 (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
1328 cpu_relax();
1329
1330
1331 writel(rx_timeout, port->membase + CDNS_UART_RXTOUT);
1332
1333 ctrl_reg = readl(port->membase + CDNS_UART_CR);
1334 ctrl_reg &= ~(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS);
1335 ctrl_reg |= CDNS_UART_CR_TX_EN | CDNS_UART_CR_RX_EN;
1336 writel(ctrl_reg, port->membase + CDNS_UART_CR);
1337
1338 clk_disable(cdns_uart->uartclk);
1339 clk_disable(cdns_uart->pclk);
1340 spin_unlock_irqrestore(&port->lock, flags);
1341 } else {
1342 spin_lock_irqsave(&port->lock, flags);
1343
1344 writel(rx_trigger_level, port->membase + CDNS_UART_RXWM);
1345
1346 writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IER);
1347 spin_unlock_irqrestore(&port->lock, flags);
1348 }
1349
1350 return uart_resume_port(cdns_uart->cdns_uart_driver, port);
1351}
1352#endif
1353static int __maybe_unused cdns_runtime_suspend(struct device *dev)
1354{
1355 struct uart_port *port = dev_get_drvdata(dev);
1356 struct cdns_uart *cdns_uart = port->private_data;
1357
1358 clk_disable(cdns_uart->uartclk);
1359 clk_disable(cdns_uart->pclk);
1360 return 0;
1361};
1362
1363static int __maybe_unused cdns_runtime_resume(struct device *dev)
1364{
1365 struct uart_port *port = dev_get_drvdata(dev);
1366 struct cdns_uart *cdns_uart = port->private_data;
1367
1368 clk_enable(cdns_uart->pclk);
1369 clk_enable(cdns_uart->uartclk);
1370 return 0;
1371};
1372
1373static const struct dev_pm_ops cdns_uart_dev_pm_ops = {
1374 SET_SYSTEM_SLEEP_PM_OPS(cdns_uart_suspend, cdns_uart_resume)
1375 SET_RUNTIME_PM_OPS(cdns_runtime_suspend,
1376 cdns_runtime_resume, NULL)
1377};
1378
1379static const struct cdns_platform_data zynqmp_uart_def = {
1380 .quirks = CDNS_UART_RXBS_SUPPORT, };
1381
1382
1383static const struct of_device_id cdns_uart_of_match[] = {
1384 { .compatible = "xlnx,xuartps", },
1385 { .compatible = "cdns,uart-r1p8", },
1386 { .compatible = "cdns,uart-r1p12", .data = &zynqmp_uart_def },
1387 { .compatible = "xlnx,zynqmp-uart", .data = &zynqmp_uart_def },
1388 {}
1389};
1390MODULE_DEVICE_TABLE(of, cdns_uart_of_match);
1391
1392
1393
1394
1395
1396#define MAX_UART_INSTANCES 32
1397
1398
1399static DECLARE_BITMAP(alias_bitmap, MAX_UART_INSTANCES);
1400static int alias_bitmap_initialized;
1401
1402
1403static DECLARE_BITMAP(bitmap, MAX_UART_INSTANCES);
1404
1405static DEFINE_MUTEX(bitmap_lock);
1406
1407static int cdns_get_id(struct platform_device *pdev)
1408{
1409 int id, ret;
1410
1411 mutex_lock(&bitmap_lock);
1412
1413
1414 if (!alias_bitmap_initialized) {
1415 ret = of_alias_get_alias_list(cdns_uart_of_match, "serial",
1416 alias_bitmap, MAX_UART_INSTANCES);
1417 if (ret && ret != -EOVERFLOW) {
1418 mutex_unlock(&bitmap_lock);
1419 return ret;
1420 }
1421
1422 alias_bitmap_initialized++;
1423 }
1424
1425
1426 bitmap_or(bitmap, bitmap, alias_bitmap, MAX_UART_INSTANCES);
1427
1428 dev_dbg(&pdev->dev, "Alias bitmap: %*pb\n",
1429 MAX_UART_INSTANCES, bitmap);
1430
1431
1432 id = of_alias_get_id(pdev->dev.of_node, "serial");
1433 if (id < 0) {
1434 dev_warn(&pdev->dev,
1435 "No serial alias passed. Using the first free id\n");
1436
1437
1438
1439
1440
1441
1442 id = 0;
1443
1444 for (;;) {
1445 dev_info(&pdev->dev, "Checking id %d\n", id);
1446 id = find_next_zero_bit(bitmap, MAX_UART_INSTANCES, id);
1447
1448
1449 if (id == MAX_UART_INSTANCES) {
1450 dev_err(&pdev->dev, "No free ID\n");
1451 mutex_unlock(&bitmap_lock);
1452 return -EINVAL;
1453 }
1454
1455 dev_dbg(&pdev->dev, "The empty id is %d\n", id);
1456
1457 if (!test_and_set_bit(id, bitmap)) {
1458
1459 dev_dbg(&pdev->dev,
1460 "Selected ID %d allocation passed\n",
1461 id);
1462 break;
1463 }
1464 dev_dbg(&pdev->dev,
1465 "Selected ID %d allocation failed\n", id);
1466
1467 id++;
1468 }
1469 }
1470
1471 mutex_unlock(&bitmap_lock);
1472
1473 return id;
1474}
1475
1476
1477
1478
1479
1480
1481
1482static int cdns_uart_probe(struct platform_device *pdev)
1483{
1484 int rc, irq;
1485 struct uart_port *port;
1486 struct resource *res;
1487 struct cdns_uart *cdns_uart_data;
1488 const struct of_device_id *match;
1489 struct uart_driver *cdns_uart_uart_driver;
1490 char *driver_name;
1491#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1492 struct console *cdns_uart_console;
1493#endif
1494
1495 cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data),
1496 GFP_KERNEL);
1497 if (!cdns_uart_data)
1498 return -ENOMEM;
1499 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
1500 if (!port)
1501 return -ENOMEM;
1502
1503 cdns_uart_uart_driver = devm_kzalloc(&pdev->dev,
1504 sizeof(*cdns_uart_uart_driver),
1505 GFP_KERNEL);
1506 if (!cdns_uart_uart_driver)
1507 return -ENOMEM;
1508
1509 cdns_uart_data->id = cdns_get_id(pdev);
1510 if (cdns_uart_data->id < 0)
1511 return cdns_uart_data->id;
1512
1513
1514 driver_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s%d",
1515 CDNS_UART_NAME, cdns_uart_data->id);
1516 if (!driver_name) {
1517 rc = -ENOMEM;
1518 goto err_out_id;
1519 }
1520
1521 cdns_uart_uart_driver->owner = THIS_MODULE;
1522 cdns_uart_uart_driver->driver_name = driver_name;
1523 cdns_uart_uart_driver->dev_name = CDNS_UART_TTY_NAME;
1524 cdns_uart_uart_driver->major = uartps_major;
1525 cdns_uart_uart_driver->minor = cdns_uart_data->id;
1526 cdns_uart_uart_driver->nr = 1;
1527
1528#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1529 cdns_uart_console = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_console),
1530 GFP_KERNEL);
1531 if (!cdns_uart_console) {
1532 rc = -ENOMEM;
1533 goto err_out_id;
1534 }
1535
1536 strncpy(cdns_uart_console->name, CDNS_UART_TTY_NAME,
1537 sizeof(cdns_uart_console->name));
1538 cdns_uart_console->index = cdns_uart_data->id;
1539 cdns_uart_console->write = cdns_uart_console_write;
1540 cdns_uart_console->device = uart_console_device;
1541 cdns_uart_console->setup = cdns_uart_console_setup;
1542 cdns_uart_console->flags = CON_PRINTBUFFER;
1543 cdns_uart_console->data = cdns_uart_uart_driver;
1544 cdns_uart_uart_driver->cons = cdns_uart_console;
1545#endif
1546
1547 rc = uart_register_driver(cdns_uart_uart_driver);
1548 if (rc < 0) {
1549 dev_err(&pdev->dev, "Failed to register driver\n");
1550 goto err_out_id;
1551 }
1552
1553 uartps_major = cdns_uart_uart_driver->tty_driver->major;
1554 cdns_uart_data->cdns_uart_driver = cdns_uart_uart_driver;
1555
1556
1557
1558
1559
1560
1561 cdns_uart_uart_driver->tty_driver->name_base = cdns_uart_data->id;
1562
1563 match = of_match_node(cdns_uart_of_match, pdev->dev.of_node);
1564 if (match && match->data) {
1565 const struct cdns_platform_data *data = match->data;
1566
1567 cdns_uart_data->quirks = data->quirks;
1568 }
1569
1570 cdns_uart_data->pclk = devm_clk_get(&pdev->dev, "pclk");
1571 if (PTR_ERR(cdns_uart_data->pclk) == -EPROBE_DEFER) {
1572 rc = PTR_ERR(cdns_uart_data->pclk);
1573 goto err_out_unregister_driver;
1574 }
1575
1576 if (IS_ERR(cdns_uart_data->pclk)) {
1577 cdns_uart_data->pclk = devm_clk_get(&pdev->dev, "aper_clk");
1578 if (IS_ERR(cdns_uart_data->pclk)) {
1579 rc = PTR_ERR(cdns_uart_data->pclk);
1580 goto err_out_unregister_driver;
1581 }
1582 dev_err(&pdev->dev, "clock name 'aper_clk' is deprecated.\n");
1583 }
1584
1585 cdns_uart_data->uartclk = devm_clk_get(&pdev->dev, "uart_clk");
1586 if (PTR_ERR(cdns_uart_data->uartclk) == -EPROBE_DEFER) {
1587 rc = PTR_ERR(cdns_uart_data->uartclk);
1588 goto err_out_unregister_driver;
1589 }
1590
1591 if (IS_ERR(cdns_uart_data->uartclk)) {
1592 cdns_uart_data->uartclk = devm_clk_get(&pdev->dev, "ref_clk");
1593 if (IS_ERR(cdns_uart_data->uartclk)) {
1594 rc = PTR_ERR(cdns_uart_data->uartclk);
1595 goto err_out_unregister_driver;
1596 }
1597 dev_err(&pdev->dev, "clock name 'ref_clk' is deprecated.\n");
1598 }
1599
1600 rc = clk_prepare_enable(cdns_uart_data->pclk);
1601 if (rc) {
1602 dev_err(&pdev->dev, "Unable to enable pclk clock.\n");
1603 goto err_out_unregister_driver;
1604 }
1605 rc = clk_prepare_enable(cdns_uart_data->uartclk);
1606 if (rc) {
1607 dev_err(&pdev->dev, "Unable to enable device clock.\n");
1608 goto err_out_clk_dis_pclk;
1609 }
1610
1611 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1612 if (!res) {
1613 rc = -ENODEV;
1614 goto err_out_clk_disable;
1615 }
1616
1617 irq = platform_get_irq(pdev, 0);
1618 if (irq <= 0) {
1619 rc = -ENXIO;
1620 goto err_out_clk_disable;
1621 }
1622
1623#ifdef CONFIG_COMMON_CLK
1624 cdns_uart_data->clk_rate_change_nb.notifier_call =
1625 cdns_uart_clk_notifier_cb;
1626 if (clk_notifier_register(cdns_uart_data->uartclk,
1627 &cdns_uart_data->clk_rate_change_nb))
1628 dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
1629#endif
1630
1631
1632 spin_lock_init(&port->lock);
1633 port->type = PORT_UNKNOWN;
1634 port->iotype = UPIO_MEM32;
1635 port->flags = UPF_BOOT_AUTOCONF;
1636 port->ops = &cdns_uart_ops;
1637 port->fifosize = CDNS_UART_FIFO_SIZE;
1638
1639
1640
1641
1642
1643
1644 port->mapbase = res->start;
1645 port->irq = irq;
1646 port->dev = &pdev->dev;
1647 port->uartclk = clk_get_rate(cdns_uart_data->uartclk);
1648 port->private_data = cdns_uart_data;
1649 cdns_uart_data->port = port;
1650 platform_set_drvdata(pdev, port);
1651
1652 pm_runtime_use_autosuspend(&pdev->dev);
1653 pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT);
1654 pm_runtime_set_active(&pdev->dev);
1655 pm_runtime_enable(&pdev->dev);
1656 device_init_wakeup(port->dev, true);
1657
1658#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1659
1660
1661
1662
1663
1664
1665 if (!console_port)
1666 console_port = port;
1667#endif
1668
1669 rc = uart_add_one_port(cdns_uart_uart_driver, port);
1670 if (rc) {
1671 dev_err(&pdev->dev,
1672 "uart_add_one_port() failed; err=%i\n", rc);
1673 goto err_out_pm_disable;
1674 }
1675
1676#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1677
1678 if (console_port == port &&
1679 !(cdns_uart_uart_driver->cons->flags & CON_ENABLED))
1680 console_port = NULL;
1681#endif
1682
1683 cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,
1684 "cts-override");
1685 return 0;
1686
1687err_out_pm_disable:
1688 pm_runtime_disable(&pdev->dev);
1689 pm_runtime_set_suspended(&pdev->dev);
1690 pm_runtime_dont_use_autosuspend(&pdev->dev);
1691#ifdef CONFIG_COMMON_CLK
1692 clk_notifier_unregister(cdns_uart_data->uartclk,
1693 &cdns_uart_data->clk_rate_change_nb);
1694#endif
1695err_out_clk_disable:
1696 clk_disable_unprepare(cdns_uart_data->uartclk);
1697err_out_clk_dis_pclk:
1698 clk_disable_unprepare(cdns_uart_data->pclk);
1699err_out_unregister_driver:
1700 uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1701err_out_id:
1702 mutex_lock(&bitmap_lock);
1703 if (cdns_uart_data->id < MAX_UART_INSTANCES)
1704 clear_bit(cdns_uart_data->id, bitmap);
1705 mutex_unlock(&bitmap_lock);
1706 return rc;
1707}
1708
1709
1710
1711
1712
1713
1714
1715static int cdns_uart_remove(struct platform_device *pdev)
1716{
1717 struct uart_port *port = platform_get_drvdata(pdev);
1718 struct cdns_uart *cdns_uart_data = port->private_data;
1719 int rc;
1720
1721
1722#ifdef CONFIG_COMMON_CLK
1723 clk_notifier_unregister(cdns_uart_data->uartclk,
1724 &cdns_uart_data->clk_rate_change_nb);
1725#endif
1726 rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port);
1727 port->mapbase = 0;
1728 mutex_lock(&bitmap_lock);
1729 if (cdns_uart_data->id < MAX_UART_INSTANCES)
1730 clear_bit(cdns_uart_data->id, bitmap);
1731 mutex_unlock(&bitmap_lock);
1732 clk_disable_unprepare(cdns_uart_data->uartclk);
1733 clk_disable_unprepare(cdns_uart_data->pclk);
1734 pm_runtime_disable(&pdev->dev);
1735 pm_runtime_set_suspended(&pdev->dev);
1736 pm_runtime_dont_use_autosuspend(&pdev->dev);
1737 device_init_wakeup(&pdev->dev, false);
1738
1739#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1740 if (console_port == port)
1741 console_port = NULL;
1742#endif
1743
1744 uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1745 return rc;
1746}
1747
1748static struct platform_driver cdns_uart_platform_driver = {
1749 .probe = cdns_uart_probe,
1750 .remove = cdns_uart_remove,
1751 .driver = {
1752 .name = CDNS_UART_NAME,
1753 .of_match_table = cdns_uart_of_match,
1754 .pm = &cdns_uart_dev_pm_ops,
1755 .suppress_bind_attrs = IS_BUILTIN(CONFIG_SERIAL_XILINX_PS_UART),
1756 },
1757};
1758
1759static int __init cdns_uart_init(void)
1760{
1761
1762 return platform_driver_register(&cdns_uart_platform_driver);
1763}
1764
1765static void __exit cdns_uart_exit(void)
1766{
1767
1768 platform_driver_unregister(&cdns_uart_platform_driver);
1769}
1770
1771arch_initcall(cdns_uart_init);
1772module_exit(cdns_uart_exit);
1773
1774MODULE_DESCRIPTION("Driver for Cadence UART");
1775MODULE_AUTHOR("Xilinx Inc.");
1776MODULE_LICENSE("GPL");
1777