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6
7#include <linux/clk.h>
8#include <linux/clk/at91_pmc.h>
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/interrupt.h>
12#include <linux/io.h>
13#include <linux/slab.h>
14#include <linux/device.h>
15#include <linux/dma-mapping.h>
16#include <linux/list.h>
17#include <linux/mfd/syscon.h>
18#include <linux/platform_device.h>
19#include <linux/regmap.h>
20#include <linux/ctype.h>
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
23#include <linux/delay.h>
24#include <linux/of.h>
25#include <linux/irq.h>
26#include <linux/gpio/consumer.h>
27
28#include "atmel_usba_udc.h"
29#define USBA_VBUS_IRQFLAGS (IRQF_ONESHOT \
30 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING)
31
32#ifdef CONFIG_USB_GADGET_DEBUG_FS
33#include <linux/debugfs.h>
34#include <linux/uaccess.h>
35
36static int queue_dbg_open(struct inode *inode, struct file *file)
37{
38 struct usba_ep *ep = inode->i_private;
39 struct usba_request *req, *req_copy;
40 struct list_head *queue_data;
41
42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
43 if (!queue_data)
44 return -ENOMEM;
45 INIT_LIST_HEAD(queue_data);
46
47 spin_lock_irq(&ep->udc->lock);
48 list_for_each_entry(req, &ep->queue, queue) {
49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
50 if (!req_copy)
51 goto fail;
52 list_add_tail(&req_copy->queue, queue_data);
53 }
54 spin_unlock_irq(&ep->udc->lock);
55
56 file->private_data = queue_data;
57 return 0;
58
59fail:
60 spin_unlock_irq(&ep->udc->lock);
61 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
62 list_del(&req->queue);
63 kfree(req);
64 }
65 kfree(queue_data);
66 return -ENOMEM;
67}
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83static ssize_t queue_dbg_read(struct file *file, char __user *buf,
84 size_t nbytes, loff_t *ppos)
85{
86 struct list_head *queue = file->private_data;
87 struct usba_request *req, *tmp_req;
88 size_t len, remaining, actual = 0;
89 char tmpbuf[38];
90
91 if (!access_ok(buf, nbytes))
92 return -EFAULT;
93
94 inode_lock(file_inode(file));
95 list_for_each_entry_safe(req, tmp_req, queue, queue) {
96 len = snprintf(tmpbuf, sizeof(tmpbuf),
97 "%8p %08x %c%c%c %5d %c%c%c\n",
98 req->req.buf, req->req.length,
99 req->req.no_interrupt ? 'i' : 'I',
100 req->req.zero ? 'Z' : 'z',
101 req->req.short_not_ok ? 's' : 'S',
102 req->req.status,
103 req->submitted ? 'F' : 'f',
104 req->using_dma ? 'D' : 'd',
105 req->last_transaction ? 'L' : 'l');
106 len = min(len, sizeof(tmpbuf));
107 if (len > nbytes)
108 break;
109
110 list_del(&req->queue);
111 kfree(req);
112
113 remaining = __copy_to_user(buf, tmpbuf, len);
114 actual += len - remaining;
115 if (remaining)
116 break;
117
118 nbytes -= len;
119 buf += len;
120 }
121 inode_unlock(file_inode(file));
122
123 return actual;
124}
125
126static int queue_dbg_release(struct inode *inode, struct file *file)
127{
128 struct list_head *queue_data = file->private_data;
129 struct usba_request *req, *tmp_req;
130
131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
132 list_del(&req->queue);
133 kfree(req);
134 }
135 kfree(queue_data);
136 return 0;
137}
138
139static int regs_dbg_open(struct inode *inode, struct file *file)
140{
141 struct usba_udc *udc;
142 unsigned int i;
143 u32 *data;
144 int ret = -ENOMEM;
145
146 inode_lock(inode);
147 udc = inode->i_private;
148 data = kmalloc(inode->i_size, GFP_KERNEL);
149 if (!data)
150 goto out;
151
152 spin_lock_irq(&udc->lock);
153 for (i = 0; i < inode->i_size / 4; i++)
154 data[i] = readl_relaxed(udc->regs + i * 4);
155 spin_unlock_irq(&udc->lock);
156
157 file->private_data = data;
158 ret = 0;
159
160out:
161 inode_unlock(inode);
162
163 return ret;
164}
165
166static ssize_t regs_dbg_read(struct file *file, char __user *buf,
167 size_t nbytes, loff_t *ppos)
168{
169 struct inode *inode = file_inode(file);
170 int ret;
171
172 inode_lock(inode);
173 ret = simple_read_from_buffer(buf, nbytes, ppos,
174 file->private_data,
175 file_inode(file)->i_size);
176 inode_unlock(inode);
177
178 return ret;
179}
180
181static int regs_dbg_release(struct inode *inode, struct file *file)
182{
183 kfree(file->private_data);
184 return 0;
185}
186
187const struct file_operations queue_dbg_fops = {
188 .owner = THIS_MODULE,
189 .open = queue_dbg_open,
190 .llseek = no_llseek,
191 .read = queue_dbg_read,
192 .release = queue_dbg_release,
193};
194
195const struct file_operations regs_dbg_fops = {
196 .owner = THIS_MODULE,
197 .open = regs_dbg_open,
198 .llseek = generic_file_llseek,
199 .read = regs_dbg_read,
200 .release = regs_dbg_release,
201};
202
203static void usba_ep_init_debugfs(struct usba_udc *udc,
204 struct usba_ep *ep)
205{
206 struct dentry *ep_root;
207
208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
209 ep->debugfs_dir = ep_root;
210
211 debugfs_create_file("queue", 0400, ep_root, ep, &queue_dbg_fops);
212 if (ep->can_dma)
213 debugfs_create_u32("dma_status", 0400, ep_root,
214 &ep->last_dma_status);
215 if (ep_is_control(ep))
216 debugfs_create_u32("state", 0400, ep_root, &ep->state);
217}
218
219static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
220{
221 debugfs_remove_recursive(ep->debugfs_dir);
222}
223
224static void usba_init_debugfs(struct usba_udc *udc)
225{
226 struct dentry *root;
227 struct resource *regs_resource;
228
229 root = debugfs_create_dir(udc->gadget.name, NULL);
230 udc->debugfs_root = root;
231
232 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
233 CTRL_IOMEM_ID);
234
235 if (regs_resource) {
236 debugfs_create_file_size("regs", 0400, root, udc,
237 ®s_dbg_fops,
238 resource_size(regs_resource));
239 }
240
241 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
242}
243
244static void usba_cleanup_debugfs(struct usba_udc *udc)
245{
246 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
247 debugfs_remove_recursive(udc->debugfs_root);
248}
249#else
250static inline void usba_ep_init_debugfs(struct usba_udc *udc,
251 struct usba_ep *ep)
252{
253
254}
255
256static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
257{
258
259}
260
261static inline void usba_init_debugfs(struct usba_udc *udc)
262{
263
264}
265
266static inline void usba_cleanup_debugfs(struct usba_udc *udc)
267{
268
269}
270#endif
271
272static ushort fifo_mode;
273
274module_param(fifo_mode, ushort, 0x0);
275MODULE_PARM_DESC(fifo_mode, "Endpoint configuration mode");
276
277
278
279
280static struct usba_fifo_cfg mode_1_cfg[] = {
281{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
282{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
283{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 1, },
284{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 1, },
285{ .hw_ep_num = 4, .fifo_size = 1024, .nr_banks = 1, },
286{ .hw_ep_num = 5, .fifo_size = 1024, .nr_banks = 1, },
287{ .hw_ep_num = 6, .fifo_size = 1024, .nr_banks = 1, },
288};
289
290
291static struct usba_fifo_cfg mode_2_cfg[] = {
292{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
293{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 3, },
294{ .hw_ep_num = 2, .fifo_size = 1024, .nr_banks = 2, },
295{ .hw_ep_num = 3, .fifo_size = 1024, .nr_banks = 2, },
296};
297
298
299static struct usba_fifo_cfg mode_3_cfg[] = {
300{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
301{ .hw_ep_num = 1, .fifo_size = 1024, .nr_banks = 2, },
302{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
303{ .hw_ep_num = 3, .fifo_size = 512, .nr_banks = 2, },
304{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
305{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
306{ .hw_ep_num = 6, .fifo_size = 512, .nr_banks = 2, },
307};
308
309
310static struct usba_fifo_cfg mode_4_cfg[] = {
311{ .hw_ep_num = 0, .fifo_size = 64, .nr_banks = 1, },
312{ .hw_ep_num = 1, .fifo_size = 512, .nr_banks = 2, },
313{ .hw_ep_num = 2, .fifo_size = 512, .nr_banks = 2, },
314{ .hw_ep_num = 3, .fifo_size = 8, .nr_banks = 2, },
315{ .hw_ep_num = 4, .fifo_size = 512, .nr_banks = 2, },
316{ .hw_ep_num = 5, .fifo_size = 512, .nr_banks = 2, },
317{ .hw_ep_num = 6, .fifo_size = 16, .nr_banks = 2, },
318{ .hw_ep_num = 7, .fifo_size = 8, .nr_banks = 2, },
319{ .hw_ep_num = 8, .fifo_size = 8, .nr_banks = 2, },
320};
321
322
323static int usba_config_fifo_table(struct usba_udc *udc)
324{
325 int n;
326
327 switch (fifo_mode) {
328 default:
329 fifo_mode = 0;
330 case 0:
331 udc->fifo_cfg = NULL;
332 n = 0;
333 break;
334 case 1:
335 udc->fifo_cfg = mode_1_cfg;
336 n = ARRAY_SIZE(mode_1_cfg);
337 break;
338 case 2:
339 udc->fifo_cfg = mode_2_cfg;
340 n = ARRAY_SIZE(mode_2_cfg);
341 break;
342 case 3:
343 udc->fifo_cfg = mode_3_cfg;
344 n = ARRAY_SIZE(mode_3_cfg);
345 break;
346 case 4:
347 udc->fifo_cfg = mode_4_cfg;
348 n = ARRAY_SIZE(mode_4_cfg);
349 break;
350 }
351 DBG(DBG_HW, "Setup fifo_mode %d\n", fifo_mode);
352
353 return n;
354}
355
356static inline u32 usba_int_enb_get(struct usba_udc *udc)
357{
358 return udc->int_enb_cache;
359}
360
361static inline void usba_int_enb_set(struct usba_udc *udc, u32 mask)
362{
363 u32 val;
364
365 val = udc->int_enb_cache | mask;
366 usba_writel(udc, INT_ENB, val);
367 udc->int_enb_cache = val;
368}
369
370static inline void usba_int_enb_clear(struct usba_udc *udc, u32 mask)
371{
372 u32 val;
373
374 val = udc->int_enb_cache & ~mask;
375 usba_writel(udc, INT_ENB, val);
376 udc->int_enb_cache = val;
377}
378
379static int vbus_is_present(struct usba_udc *udc)
380{
381 if (udc->vbus_pin)
382 return gpiod_get_value(udc->vbus_pin);
383
384
385 return 1;
386}
387
388static void toggle_bias(struct usba_udc *udc, int is_on)
389{
390 if (udc->errata && udc->errata->toggle_bias)
391 udc->errata->toggle_bias(udc, is_on);
392}
393
394static void generate_bias_pulse(struct usba_udc *udc)
395{
396 if (!udc->bias_pulse_needed)
397 return;
398
399 if (udc->errata && udc->errata->pulse_bias)
400 udc->errata->pulse_bias(udc);
401
402 udc->bias_pulse_needed = false;
403}
404
405static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
406{
407 unsigned int transaction_len;
408
409 transaction_len = req->req.length - req->req.actual;
410 req->last_transaction = 1;
411 if (transaction_len > ep->ep.maxpacket) {
412 transaction_len = ep->ep.maxpacket;
413 req->last_transaction = 0;
414 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
415 req->last_transaction = 0;
416
417 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
418 ep->ep.name, req, transaction_len,
419 req->last_transaction ? ", done" : "");
420
421 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
422 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
423 req->req.actual += transaction_len;
424}
425
426static void submit_request(struct usba_ep *ep, struct usba_request *req)
427{
428 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
429 ep->ep.name, req, req->req.length);
430
431 req->req.actual = 0;
432 req->submitted = 1;
433
434 if (req->using_dma) {
435 if (req->req.length == 0) {
436 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
437 return;
438 }
439
440 if (req->req.zero)
441 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
442 else
443 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
444
445 usba_dma_writel(ep, ADDRESS, req->req.dma);
446 usba_dma_writel(ep, CONTROL, req->ctrl);
447 } else {
448 next_fifo_transaction(ep, req);
449 if (req->last_transaction) {
450 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
451 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
452 } else {
453 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
454 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
455 }
456 }
457}
458
459static void submit_next_request(struct usba_ep *ep)
460{
461 struct usba_request *req;
462
463 if (list_empty(&ep->queue)) {
464 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
465 return;
466 }
467
468 req = list_entry(ep->queue.next, struct usba_request, queue);
469 if (!req->submitted)
470 submit_request(ep, req);
471}
472
473static void send_status(struct usba_udc *udc, struct usba_ep *ep)
474{
475 ep->state = STATUS_STAGE_IN;
476 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
477 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
478}
479
480static void receive_data(struct usba_ep *ep)
481{
482 struct usba_udc *udc = ep->udc;
483 struct usba_request *req;
484 unsigned long status;
485 unsigned int bytecount, nr_busy;
486 int is_complete = 0;
487
488 status = usba_ep_readl(ep, STA);
489 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
490
491 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
492
493 while (nr_busy > 0) {
494 if (list_empty(&ep->queue)) {
495 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
496 break;
497 }
498 req = list_entry(ep->queue.next,
499 struct usba_request, queue);
500
501 bytecount = USBA_BFEXT(BYTE_COUNT, status);
502
503 if (status & (1 << 31))
504 is_complete = 1;
505 if (req->req.actual + bytecount >= req->req.length) {
506 is_complete = 1;
507 bytecount = req->req.length - req->req.actual;
508 }
509
510 memcpy_fromio(req->req.buf + req->req.actual,
511 ep->fifo, bytecount);
512 req->req.actual += bytecount;
513
514 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
515
516 if (is_complete) {
517 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
518 req->req.status = 0;
519 list_del_init(&req->queue);
520 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
521 spin_unlock(&udc->lock);
522 usb_gadget_giveback_request(&ep->ep, &req->req);
523 spin_lock(&udc->lock);
524 }
525
526 status = usba_ep_readl(ep, STA);
527 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
528
529 if (is_complete && ep_is_control(ep)) {
530 send_status(udc, ep);
531 break;
532 }
533 }
534}
535
536static void
537request_complete(struct usba_ep *ep, struct usba_request *req, int status)
538{
539 struct usba_udc *udc = ep->udc;
540
541 WARN_ON(!list_empty(&req->queue));
542
543 if (req->req.status == -EINPROGRESS)
544 req->req.status = status;
545
546 if (req->using_dma)
547 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
548
549 DBG(DBG_GADGET | DBG_REQ,
550 "%s: req %p complete: status %d, actual %u\n",
551 ep->ep.name, req, req->req.status, req->req.actual);
552
553 spin_unlock(&udc->lock);
554 usb_gadget_giveback_request(&ep->ep, &req->req);
555 spin_lock(&udc->lock);
556}
557
558static void
559request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
560{
561 struct usba_request *req, *tmp_req;
562
563 list_for_each_entry_safe(req, tmp_req, list, queue) {
564 list_del_init(&req->queue);
565 request_complete(ep, req, status);
566 }
567}
568
569static int
570usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
571{
572 struct usba_ep *ep = to_usba_ep(_ep);
573 struct usba_udc *udc = ep->udc;
574 unsigned long flags, maxpacket;
575 unsigned int nr_trans;
576
577 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
578
579 maxpacket = usb_endpoint_maxp(desc);
580
581 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
582 || ep->index == 0
583 || desc->bDescriptorType != USB_DT_ENDPOINT
584 || maxpacket == 0
585 || maxpacket > ep->fifo_size) {
586 DBG(DBG_ERR, "ep_enable: Invalid argument");
587 return -EINVAL;
588 }
589
590 ep->is_isoc = 0;
591 ep->is_in = 0;
592
593 DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
594 ep->ep.name, ep->ept_cfg, maxpacket);
595
596 if (usb_endpoint_dir_in(desc)) {
597 ep->is_in = 1;
598 ep->ept_cfg |= USBA_EPT_DIR_IN;
599 }
600
601 switch (usb_endpoint_type(desc)) {
602 case USB_ENDPOINT_XFER_CONTROL:
603 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
604 break;
605 case USB_ENDPOINT_XFER_ISOC:
606 if (!ep->can_isoc) {
607 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
608 ep->ep.name);
609 return -EINVAL;
610 }
611
612
613
614
615
616 nr_trans = usb_endpoint_maxp_mult(desc);
617 if (nr_trans > 3)
618 return -EINVAL;
619
620 ep->is_isoc = 1;
621 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
622 ep->ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
623
624 break;
625 case USB_ENDPOINT_XFER_BULK:
626 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
627 break;
628 case USB_ENDPOINT_XFER_INT:
629 ep->ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
630 break;
631 }
632
633 spin_lock_irqsave(&ep->udc->lock, flags);
634
635 ep->ep.desc = desc;
636 ep->ep.maxpacket = maxpacket;
637
638 usba_ep_writel(ep, CFG, ep->ept_cfg);
639 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
640
641 if (ep->can_dma) {
642 u32 ctrl;
643
644 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index) |
645 USBA_BF(DMA_INT, 1 << ep->index));
646 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
647 usba_ep_writel(ep, CTL_ENB, ctrl);
648 } else {
649 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1 << ep->index));
650 }
651
652 spin_unlock_irqrestore(&udc->lock, flags);
653
654 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
655 (unsigned long)usba_ep_readl(ep, CFG));
656 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
657 (unsigned long)usba_int_enb_get(udc));
658
659 return 0;
660}
661
662static int usba_ep_disable(struct usb_ep *_ep)
663{
664 struct usba_ep *ep = to_usba_ep(_ep);
665 struct usba_udc *udc = ep->udc;
666 LIST_HEAD(req_list);
667 unsigned long flags;
668
669 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
670
671 spin_lock_irqsave(&udc->lock, flags);
672
673 if (!ep->ep.desc) {
674 spin_unlock_irqrestore(&udc->lock, flags);
675
676
677
678
679 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
680 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
681 ep->ep.name);
682 return -EINVAL;
683 }
684 ep->ep.desc = NULL;
685
686 list_splice_init(&ep->queue, &req_list);
687 if (ep->can_dma) {
688 usba_dma_writel(ep, CONTROL, 0);
689 usba_dma_writel(ep, ADDRESS, 0);
690 usba_dma_readl(ep, STATUS);
691 }
692 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
693 usba_int_enb_clear(udc, USBA_BF(EPT_INT, 1 << ep->index));
694
695 request_complete_list(ep, &req_list, -ESHUTDOWN);
696
697 spin_unlock_irqrestore(&udc->lock, flags);
698
699 return 0;
700}
701
702static struct usb_request *
703usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
704{
705 struct usba_request *req;
706
707 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
708
709 req = kzalloc(sizeof(*req), gfp_flags);
710 if (!req)
711 return NULL;
712
713 INIT_LIST_HEAD(&req->queue);
714
715 return &req->req;
716}
717
718static void
719usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
720{
721 struct usba_request *req = to_usba_req(_req);
722
723 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
724
725 kfree(req);
726}
727
728static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
729 struct usba_request *req, gfp_t gfp_flags)
730{
731 unsigned long flags;
732 int ret;
733
734 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
735 ep->ep.name, req->req.length, &req->req.dma,
736 req->req.zero ? 'Z' : 'z',
737 req->req.short_not_ok ? 'S' : 's',
738 req->req.no_interrupt ? 'I' : 'i');
739
740 if (req->req.length > 0x10000) {
741
742 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
743 return -EINVAL;
744 }
745
746 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
747 if (ret)
748 return ret;
749
750 req->using_dma = 1;
751 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
752 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
753 | USBA_DMA_END_BUF_EN;
754
755 if (!ep->is_in)
756 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
757
758
759
760
761
762
763 ret = -ESHUTDOWN;
764 spin_lock_irqsave(&udc->lock, flags);
765 if (ep->ep.desc) {
766 if (list_empty(&ep->queue))
767 submit_request(ep, req);
768
769 list_add_tail(&req->queue, &ep->queue);
770 ret = 0;
771 }
772 spin_unlock_irqrestore(&udc->lock, flags);
773
774 return ret;
775}
776
777static int
778usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
779{
780 struct usba_request *req = to_usba_req(_req);
781 struct usba_ep *ep = to_usba_ep(_ep);
782 struct usba_udc *udc = ep->udc;
783 unsigned long flags;
784 int ret;
785
786 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
787 ep->ep.name, req, _req->length);
788
789 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
790 !ep->ep.desc)
791 return -ESHUTDOWN;
792
793 req->submitted = 0;
794 req->using_dma = 0;
795 req->last_transaction = 0;
796
797 _req->status = -EINPROGRESS;
798 _req->actual = 0;
799
800 if (ep->can_dma)
801 return queue_dma(udc, ep, req, gfp_flags);
802
803
804 ret = -ESHUTDOWN;
805 spin_lock_irqsave(&udc->lock, flags);
806 if (ep->ep.desc) {
807 list_add_tail(&req->queue, &ep->queue);
808
809 if ((!ep_is_control(ep) && ep->is_in) ||
810 (ep_is_control(ep)
811 && (ep->state == DATA_STAGE_IN
812 || ep->state == STATUS_STAGE_IN)))
813 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
814 else
815 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
816 ret = 0;
817 }
818 spin_unlock_irqrestore(&udc->lock, flags);
819
820 return ret;
821}
822
823static void
824usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
825{
826 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
827}
828
829static int stop_dma(struct usba_ep *ep, u32 *pstatus)
830{
831 unsigned int timeout;
832 u32 status;
833
834
835
836
837
838 usba_dma_writel(ep, CONTROL, 0);
839
840
841 for (timeout = 40; timeout; --timeout) {
842 status = usba_dma_readl(ep, STATUS);
843 if (!(status & USBA_DMA_CH_EN))
844 break;
845 udelay(1);
846 }
847
848 if (pstatus)
849 *pstatus = status;
850
851 if (timeout == 0) {
852 dev_err(&ep->udc->pdev->dev,
853 "%s: timed out waiting for DMA FIFO to empty\n",
854 ep->ep.name);
855 return -ETIMEDOUT;
856 }
857
858 return 0;
859}
860
861static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
862{
863 struct usba_ep *ep = to_usba_ep(_ep);
864 struct usba_udc *udc = ep->udc;
865 struct usba_request *req;
866 unsigned long flags;
867 u32 status;
868
869 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
870 ep->ep.name, req);
871
872 spin_lock_irqsave(&udc->lock, flags);
873
874 list_for_each_entry(req, &ep->queue, queue) {
875 if (&req->req == _req)
876 break;
877 }
878
879 if (&req->req != _req) {
880 spin_unlock_irqrestore(&udc->lock, flags);
881 return -EINVAL;
882 }
883
884 if (req->using_dma) {
885
886
887
888
889 if (ep->queue.next == &req->queue) {
890 status = usba_dma_readl(ep, STATUS);
891 if (status & USBA_DMA_CH_EN)
892 stop_dma(ep, &status);
893
894#ifdef CONFIG_USB_GADGET_DEBUG_FS
895 ep->last_dma_status = status;
896#endif
897
898 usba_writel(udc, EPT_RST, 1 << ep->index);
899
900 usba_update_req(ep, req, status);
901 }
902 }
903
904
905
906
907
908 list_del_init(&req->queue);
909
910 request_complete(ep, req, -ECONNRESET);
911
912
913 submit_next_request(ep);
914 spin_unlock_irqrestore(&udc->lock, flags);
915
916 return 0;
917}
918
919static int usba_ep_set_halt(struct usb_ep *_ep, int value)
920{
921 struct usba_ep *ep = to_usba_ep(_ep);
922 struct usba_udc *udc = ep->udc;
923 unsigned long flags;
924 int ret = 0;
925
926 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
927 value ? "set" : "clear");
928
929 if (!ep->ep.desc) {
930 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
931 ep->ep.name);
932 return -ENODEV;
933 }
934 if (ep->is_isoc) {
935 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
936 ep->ep.name);
937 return -ENOTTY;
938 }
939
940 spin_lock_irqsave(&udc->lock, flags);
941
942
943
944
945
946 if (!list_empty(&ep->queue)
947 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
948 & USBA_BF(BUSY_BANKS, -1L))))) {
949 ret = -EAGAIN;
950 } else {
951 if (value)
952 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
953 else
954 usba_ep_writel(ep, CLR_STA,
955 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
956 usba_ep_readl(ep, STA);
957 }
958
959 spin_unlock_irqrestore(&udc->lock, flags);
960
961 return ret;
962}
963
964static int usba_ep_fifo_status(struct usb_ep *_ep)
965{
966 struct usba_ep *ep = to_usba_ep(_ep);
967
968 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
969}
970
971static void usba_ep_fifo_flush(struct usb_ep *_ep)
972{
973 struct usba_ep *ep = to_usba_ep(_ep);
974 struct usba_udc *udc = ep->udc;
975
976 usba_writel(udc, EPT_RST, 1 << ep->index);
977}
978
979static const struct usb_ep_ops usba_ep_ops = {
980 .enable = usba_ep_enable,
981 .disable = usba_ep_disable,
982 .alloc_request = usba_ep_alloc_request,
983 .free_request = usba_ep_free_request,
984 .queue = usba_ep_queue,
985 .dequeue = usba_ep_dequeue,
986 .set_halt = usba_ep_set_halt,
987 .fifo_status = usba_ep_fifo_status,
988 .fifo_flush = usba_ep_fifo_flush,
989};
990
991static int usba_udc_get_frame(struct usb_gadget *gadget)
992{
993 struct usba_udc *udc = to_usba_udc(gadget);
994
995 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
996}
997
998static int usba_udc_wakeup(struct usb_gadget *gadget)
999{
1000 struct usba_udc *udc = to_usba_udc(gadget);
1001 unsigned long flags;
1002 u32 ctrl;
1003 int ret = -EINVAL;
1004
1005 spin_lock_irqsave(&udc->lock, flags);
1006 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
1007 ctrl = usba_readl(udc, CTRL);
1008 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
1009 ret = 0;
1010 }
1011 spin_unlock_irqrestore(&udc->lock, flags);
1012
1013 return ret;
1014}
1015
1016static int
1017usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1018{
1019 struct usba_udc *udc = to_usba_udc(gadget);
1020 unsigned long flags;
1021
1022 gadget->is_selfpowered = (is_selfpowered != 0);
1023 spin_lock_irqsave(&udc->lock, flags);
1024 if (is_selfpowered)
1025 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1026 else
1027 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1028 spin_unlock_irqrestore(&udc->lock, flags);
1029
1030 return 0;
1031}
1032
1033static int atmel_usba_start(struct usb_gadget *gadget,
1034 struct usb_gadget_driver *driver);
1035static int atmel_usba_stop(struct usb_gadget *gadget);
1036
1037static struct usb_ep *atmel_usba_match_ep(struct usb_gadget *gadget,
1038 struct usb_endpoint_descriptor *desc,
1039 struct usb_ss_ep_comp_descriptor *ep_comp)
1040{
1041 struct usb_ep *_ep;
1042 struct usba_ep *ep;
1043
1044
1045 list_for_each_entry(_ep, &gadget->ep_list, ep_list) {
1046 if (usb_gadget_ep_match_desc(gadget, _ep, desc, ep_comp))
1047 goto found_ep;
1048 }
1049
1050 return NULL;
1051
1052found_ep:
1053
1054 if (fifo_mode == 0) {
1055
1056 ep = to_usba_ep(_ep);
1057
1058 switch (usb_endpoint_type(desc)) {
1059 case USB_ENDPOINT_XFER_CONTROL:
1060 break;
1061
1062 case USB_ENDPOINT_XFER_ISOC:
1063 ep->fifo_size = 1024;
1064 ep->nr_banks = 2;
1065 break;
1066
1067 case USB_ENDPOINT_XFER_BULK:
1068 ep->fifo_size = 512;
1069 ep->nr_banks = 1;
1070 break;
1071
1072 case USB_ENDPOINT_XFER_INT:
1073 if (desc->wMaxPacketSize == 0)
1074 ep->fifo_size =
1075 roundup_pow_of_two(_ep->maxpacket_limit);
1076 else
1077 ep->fifo_size =
1078 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1079 ep->nr_banks = 1;
1080 break;
1081 }
1082
1083
1084 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1085
1086
1087 if (ep->fifo_size <= 8)
1088 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
1089 else
1090
1091 ep->ept_cfg =
1092 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
1093
1094 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1095
1096 ep->udc->configured_ep++;
1097 }
1098
1099 return _ep;
1100}
1101
1102static const struct usb_gadget_ops usba_udc_ops = {
1103 .get_frame = usba_udc_get_frame,
1104 .wakeup = usba_udc_wakeup,
1105 .set_selfpowered = usba_udc_set_selfpowered,
1106 .udc_start = atmel_usba_start,
1107 .udc_stop = atmel_usba_stop,
1108 .match_ep = atmel_usba_match_ep,
1109};
1110
1111static struct usb_endpoint_descriptor usba_ep0_desc = {
1112 .bLength = USB_DT_ENDPOINT_SIZE,
1113 .bDescriptorType = USB_DT_ENDPOINT,
1114 .bEndpointAddress = 0,
1115 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1116 .wMaxPacketSize = cpu_to_le16(64),
1117
1118 .bInterval = 1,
1119};
1120
1121static struct usb_gadget usba_gadget_template = {
1122 .ops = &usba_udc_ops,
1123 .max_speed = USB_SPEED_HIGH,
1124 .name = "atmel_usba_udc",
1125};
1126
1127
1128
1129
1130static void reset_all_endpoints(struct usba_udc *udc)
1131{
1132 struct usba_ep *ep;
1133 struct usba_request *req, *tmp_req;
1134
1135 usba_writel(udc, EPT_RST, ~0UL);
1136
1137 ep = to_usba_ep(udc->gadget.ep0);
1138 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1139 list_del_init(&req->queue);
1140 request_complete(ep, req, -ECONNRESET);
1141 }
1142}
1143
1144static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1145{
1146 struct usba_ep *ep;
1147
1148 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1149 return to_usba_ep(udc->gadget.ep0);
1150
1151 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1152 u8 bEndpointAddress;
1153
1154 if (!ep->ep.desc)
1155 continue;
1156 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1157 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1158 continue;
1159 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1160 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1161 return ep;
1162 }
1163
1164 return NULL;
1165}
1166
1167
1168static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1169{
1170 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1171 ep->state = WAIT_FOR_SETUP;
1172}
1173
1174static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1175{
1176 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1177 return 1;
1178 return 0;
1179}
1180
1181static inline void set_address(struct usba_udc *udc, unsigned int addr)
1182{
1183 u32 regval;
1184
1185 DBG(DBG_BUS, "setting address %u...\n", addr);
1186 regval = usba_readl(udc, CTRL);
1187 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1188 usba_writel(udc, CTRL, regval);
1189}
1190
1191static int do_test_mode(struct usba_udc *udc)
1192{
1193 static const char test_packet_buffer[] = {
1194
1195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1196
1197 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1198
1199 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1200
1201 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1202 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1203
1204 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1205
1206 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1207 };
1208 struct usba_ep *ep;
1209 struct device *dev = &udc->pdev->dev;
1210 int test_mode;
1211
1212 test_mode = udc->test_mode;
1213
1214
1215 reset_all_endpoints(udc);
1216
1217 switch (test_mode) {
1218 case 0x0100:
1219
1220 usba_writel(udc, TST, USBA_TST_J_MODE);
1221 dev_info(dev, "Entering Test_J mode...\n");
1222 break;
1223 case 0x0200:
1224
1225 usba_writel(udc, TST, USBA_TST_K_MODE);
1226 dev_info(dev, "Entering Test_K mode...\n");
1227 break;
1228 case 0x0300:
1229
1230
1231
1232
1233 ep = &udc->usba_ep[0];
1234 usba_writel(udc, TST,
1235 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1236 usba_ep_writel(ep, CFG,
1237 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1238 | USBA_EPT_DIR_IN
1239 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1240 | USBA_BF(BK_NUMBER, 1));
1241 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1242 set_protocol_stall(udc, ep);
1243 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1244 } else {
1245 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1246 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1247 }
1248 break;
1249 case 0x0400:
1250
1251 ep = &udc->usba_ep[0];
1252 usba_ep_writel(ep, CFG,
1253 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1254 | USBA_EPT_DIR_IN
1255 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1256 | USBA_BF(BK_NUMBER, 1));
1257 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1258 set_protocol_stall(udc, ep);
1259 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1260 } else {
1261 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1262 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1263 memcpy_toio(ep->fifo, test_packet_buffer,
1264 sizeof(test_packet_buffer));
1265 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1266 dev_info(dev, "Entering Test_Packet mode...\n");
1267 }
1268 break;
1269 default:
1270 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1271 return -EINVAL;
1272 }
1273
1274 return 0;
1275}
1276
1277
1278static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1279{
1280 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1281 return true;
1282 return false;
1283}
1284
1285static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1286{
1287 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1288 return true;
1289 return false;
1290}
1291
1292static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1293{
1294 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1295 return true;
1296 return false;
1297}
1298
1299static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1300 struct usb_ctrlrequest *crq)
1301{
1302 int retval = 0;
1303
1304 switch (crq->bRequest) {
1305 case USB_REQ_GET_STATUS: {
1306 u16 status;
1307
1308 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1309 status = cpu_to_le16(udc->devstatus);
1310 } else if (crq->bRequestType
1311 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1312 status = cpu_to_le16(0);
1313 } else if (crq->bRequestType
1314 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1315 struct usba_ep *target;
1316
1317 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1318 if (!target)
1319 goto stall;
1320
1321 status = 0;
1322 if (is_stalled(udc, target))
1323 status |= cpu_to_le16(1);
1324 } else
1325 goto delegate;
1326
1327
1328 if (crq->wLength != cpu_to_le16(sizeof(status)))
1329 goto stall;
1330 ep->state = DATA_STAGE_IN;
1331 writew_relaxed(status, ep->fifo);
1332 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1333 break;
1334 }
1335
1336 case USB_REQ_CLEAR_FEATURE: {
1337 if (crq->bRequestType == USB_RECIP_DEVICE) {
1338 if (feature_is_dev_remote_wakeup(crq))
1339 udc->devstatus
1340 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1341 else
1342
1343 goto stall;
1344 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1345 struct usba_ep *target;
1346
1347 if (crq->wLength != cpu_to_le16(0)
1348 || !feature_is_ep_halt(crq))
1349 goto stall;
1350 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1351 if (!target)
1352 goto stall;
1353
1354 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1355 if (target->index != 0)
1356 usba_ep_writel(target, CLR_STA,
1357 USBA_TOGGLE_CLR);
1358 } else {
1359 goto delegate;
1360 }
1361
1362 send_status(udc, ep);
1363 break;
1364 }
1365
1366 case USB_REQ_SET_FEATURE: {
1367 if (crq->bRequestType == USB_RECIP_DEVICE) {
1368 if (feature_is_dev_test_mode(crq)) {
1369 send_status(udc, ep);
1370 ep->state = STATUS_STAGE_TEST;
1371 udc->test_mode = le16_to_cpu(crq->wIndex);
1372 return 0;
1373 } else if (feature_is_dev_remote_wakeup(crq)) {
1374 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1375 } else {
1376 goto stall;
1377 }
1378 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1379 struct usba_ep *target;
1380
1381 if (crq->wLength != cpu_to_le16(0)
1382 || !feature_is_ep_halt(crq))
1383 goto stall;
1384
1385 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1386 if (!target)
1387 goto stall;
1388
1389 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1390 } else
1391 goto delegate;
1392
1393 send_status(udc, ep);
1394 break;
1395 }
1396
1397 case USB_REQ_SET_ADDRESS:
1398 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1399 goto delegate;
1400
1401 set_address(udc, le16_to_cpu(crq->wValue));
1402 send_status(udc, ep);
1403 ep->state = STATUS_STAGE_ADDR;
1404 break;
1405
1406 default:
1407delegate:
1408 spin_unlock(&udc->lock);
1409 retval = udc->driver->setup(&udc->gadget, crq);
1410 spin_lock(&udc->lock);
1411 }
1412
1413 return retval;
1414
1415stall:
1416 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1417 "halting endpoint...\n",
1418 ep->ep.name, crq->bRequestType, crq->bRequest,
1419 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1420 le16_to_cpu(crq->wLength));
1421 set_protocol_stall(udc, ep);
1422 return -1;
1423}
1424
1425static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1426{
1427 struct usba_request *req;
1428 u32 epstatus;
1429 u32 epctrl;
1430
1431restart:
1432 epstatus = usba_ep_readl(ep, STA);
1433 epctrl = usba_ep_readl(ep, CTL);
1434
1435 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1436 ep->ep.name, ep->state, epstatus, epctrl);
1437
1438 req = NULL;
1439 if (!list_empty(&ep->queue))
1440 req = list_entry(ep->queue.next,
1441 struct usba_request, queue);
1442
1443 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1444 if (req->submitted)
1445 next_fifo_transaction(ep, req);
1446 else
1447 submit_request(ep, req);
1448
1449 if (req->last_transaction) {
1450 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1451 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1452 }
1453 goto restart;
1454 }
1455 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1456 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1457
1458 switch (ep->state) {
1459 case DATA_STAGE_IN:
1460 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1461 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1462 ep->state = STATUS_STAGE_OUT;
1463 break;
1464 case STATUS_STAGE_ADDR:
1465
1466 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1467 | USBA_FADDR_EN));
1468 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1469 ep->state = WAIT_FOR_SETUP;
1470 break;
1471 case STATUS_STAGE_IN:
1472 if (req) {
1473 list_del_init(&req->queue);
1474 request_complete(ep, req, 0);
1475 submit_next_request(ep);
1476 }
1477 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1478 ep->state = WAIT_FOR_SETUP;
1479 break;
1480 case STATUS_STAGE_TEST:
1481 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1482 ep->state = WAIT_FOR_SETUP;
1483 if (do_test_mode(udc))
1484 set_protocol_stall(udc, ep);
1485 break;
1486 default:
1487 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1488 "halting endpoint...\n",
1489 ep->ep.name, ep->state);
1490 set_protocol_stall(udc, ep);
1491 break;
1492 }
1493
1494 goto restart;
1495 }
1496 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1497 switch (ep->state) {
1498 case STATUS_STAGE_OUT:
1499 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1500 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1501
1502 if (req) {
1503 list_del_init(&req->queue);
1504 request_complete(ep, req, 0);
1505 }
1506 ep->state = WAIT_FOR_SETUP;
1507 break;
1508
1509 case DATA_STAGE_OUT:
1510 receive_data(ep);
1511 break;
1512
1513 default:
1514 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1515 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1516 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1517 "halting endpoint...\n",
1518 ep->ep.name, ep->state);
1519 set_protocol_stall(udc, ep);
1520 break;
1521 }
1522
1523 goto restart;
1524 }
1525 if (epstatus & USBA_RX_SETUP) {
1526 union {
1527 struct usb_ctrlrequest crq;
1528 unsigned long data[2];
1529 } crq;
1530 unsigned int pkt_len;
1531 int ret;
1532
1533 if (ep->state != WAIT_FOR_SETUP) {
1534
1535
1536
1537
1538
1539 int status = -EPROTO;
1540
1541
1542
1543
1544
1545
1546 if (ep->state == STATUS_STAGE_OUT
1547 || ep->state == STATUS_STAGE_IN) {
1548 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1549 status = 0;
1550 }
1551
1552 if (req) {
1553 list_del_init(&req->queue);
1554 request_complete(ep, req, status);
1555 }
1556 }
1557
1558 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1559 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1560 if (pkt_len != sizeof(crq)) {
1561 pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1562 pkt_len, sizeof(crq));
1563 set_protocol_stall(udc, ep);
1564 return;
1565 }
1566
1567 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1568 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1569
1570
1571
1572 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1573
1574
1575
1576
1577
1578 if (crq.crq.bRequestType & USB_DIR_IN) {
1579
1580
1581
1582
1583
1584
1585 ep->state = DATA_STAGE_IN;
1586 } else {
1587 if (crq.crq.wLength != cpu_to_le16(0))
1588 ep->state = DATA_STAGE_OUT;
1589 else
1590 ep->state = STATUS_STAGE_IN;
1591 }
1592
1593 ret = -1;
1594 if (ep->index == 0)
1595 ret = handle_ep0_setup(udc, ep, &crq.crq);
1596 else {
1597 spin_unlock(&udc->lock);
1598 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1599 spin_lock(&udc->lock);
1600 }
1601
1602 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1603 crq.crq.bRequestType, crq.crq.bRequest,
1604 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1605
1606 if (ret < 0) {
1607
1608 set_protocol_stall(udc, ep);
1609 }
1610 }
1611}
1612
1613static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1614{
1615 struct usba_request *req;
1616 u32 epstatus;
1617 u32 epctrl;
1618
1619 epstatus = usba_ep_readl(ep, STA);
1620 epctrl = usba_ep_readl(ep, CTL);
1621
1622 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1623
1624 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1625 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1626
1627 if (list_empty(&ep->queue)) {
1628 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1629 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1630 return;
1631 }
1632
1633 req = list_entry(ep->queue.next, struct usba_request, queue);
1634
1635 if (req->using_dma) {
1636
1637 usba_ep_writel(ep, SET_STA,
1638 USBA_TX_PK_RDY);
1639 usba_ep_writel(ep, CTL_DIS,
1640 USBA_TX_PK_RDY);
1641 list_del_init(&req->queue);
1642 submit_next_request(ep);
1643 request_complete(ep, req, 0);
1644 } else {
1645 if (req->submitted)
1646 next_fifo_transaction(ep, req);
1647 else
1648 submit_request(ep, req);
1649
1650 if (req->last_transaction) {
1651 list_del_init(&req->queue);
1652 submit_next_request(ep);
1653 request_complete(ep, req, 0);
1654 }
1655 }
1656
1657 epstatus = usba_ep_readl(ep, STA);
1658 epctrl = usba_ep_readl(ep, CTL);
1659 }
1660 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1661 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1662 receive_data(ep);
1663 }
1664}
1665
1666static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1667{
1668 struct usba_request *req;
1669 u32 status, control, pending;
1670
1671 status = usba_dma_readl(ep, STATUS);
1672 control = usba_dma_readl(ep, CONTROL);
1673#ifdef CONFIG_USB_GADGET_DEBUG_FS
1674 ep->last_dma_status = status;
1675#endif
1676 pending = status & control;
1677 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1678
1679 if (status & USBA_DMA_CH_EN) {
1680 dev_err(&udc->pdev->dev,
1681 "DMA_CH_EN is set after transfer is finished!\n");
1682 dev_err(&udc->pdev->dev,
1683 "status=%#08x, pending=%#08x, control=%#08x\n",
1684 status, pending, control);
1685
1686
1687
1688
1689
1690 }
1691
1692 if (list_empty(&ep->queue))
1693
1694 return;
1695
1696 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1697 req = list_entry(ep->queue.next, struct usba_request, queue);
1698 usba_update_req(ep, req, status);
1699
1700 list_del_init(&req->queue);
1701 submit_next_request(ep);
1702 request_complete(ep, req, 0);
1703 }
1704}
1705
1706static int start_clock(struct usba_udc *udc);
1707static void stop_clock(struct usba_udc *udc);
1708
1709static irqreturn_t usba_udc_irq(int irq, void *devid)
1710{
1711 struct usba_udc *udc = devid;
1712 u32 status, int_enb;
1713 u32 dma_status;
1714 u32 ep_status;
1715
1716 spin_lock(&udc->lock);
1717
1718 int_enb = usba_int_enb_get(udc);
1719 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
1720 DBG(DBG_INT, "irq, status=%#08x\n", status);
1721
1722 if (status & USBA_DET_SUSPEND) {
1723 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND|USBA_WAKE_UP);
1724 usba_int_enb_set(udc, USBA_WAKE_UP);
1725 usba_int_enb_clear(udc, USBA_DET_SUSPEND);
1726 udc->suspended = true;
1727 toggle_bias(udc, 0);
1728 udc->bias_pulse_needed = true;
1729 stop_clock(udc);
1730 DBG(DBG_BUS, "Suspend detected\n");
1731 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1732 && udc->driver && udc->driver->suspend) {
1733 spin_unlock(&udc->lock);
1734 udc->driver->suspend(&udc->gadget);
1735 spin_lock(&udc->lock);
1736 }
1737 }
1738
1739 if (status & USBA_WAKE_UP) {
1740 start_clock(udc);
1741 toggle_bias(udc, 1);
1742 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1743 DBG(DBG_BUS, "Wake Up CPU detected\n");
1744 }
1745
1746 if (status & USBA_END_OF_RESUME) {
1747 udc->suspended = false;
1748 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1749 usba_int_enb_clear(udc, USBA_WAKE_UP);
1750 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1751 generate_bias_pulse(udc);
1752 DBG(DBG_BUS, "Resume detected\n");
1753 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1754 && udc->driver && udc->driver->resume) {
1755 spin_unlock(&udc->lock);
1756 udc->driver->resume(&udc->gadget);
1757 spin_lock(&udc->lock);
1758 }
1759 }
1760
1761 dma_status = USBA_BFEXT(DMA_INT, status);
1762 if (dma_status) {
1763 int i;
1764
1765 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1766
1767 for (i = 1; i <= USBA_NR_DMAS; i++)
1768 if (dma_status & (1 << i))
1769 usba_dma_irq(udc, &udc->usba_ep[i]);
1770 }
1771
1772 ep_status = USBA_BFEXT(EPT_INT, status);
1773 if (ep_status) {
1774 int i;
1775
1776 usba_int_enb_set(udc, USBA_DET_SUSPEND);
1777
1778 for (i = 0; i < udc->num_ep; i++)
1779 if (ep_status & (1 << i)) {
1780 if (ep_is_control(&udc->usba_ep[i]))
1781 usba_control_irq(udc, &udc->usba_ep[i]);
1782 else
1783 usba_ep_irq(udc, &udc->usba_ep[i]);
1784 }
1785 }
1786
1787 if (status & USBA_END_OF_RESET) {
1788 struct usba_ep *ep0, *ep;
1789 int i, n;
1790
1791 usba_writel(udc, INT_CLR,
1792 USBA_END_OF_RESET|USBA_END_OF_RESUME
1793 |USBA_DET_SUSPEND|USBA_WAKE_UP);
1794 generate_bias_pulse(udc);
1795 reset_all_endpoints(udc);
1796
1797 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1798 udc->gadget.speed = USB_SPEED_UNKNOWN;
1799 spin_unlock(&udc->lock);
1800 usb_gadget_udc_reset(&udc->gadget, udc->driver);
1801 spin_lock(&udc->lock);
1802 }
1803
1804 if (status & USBA_HIGH_SPEED)
1805 udc->gadget.speed = USB_SPEED_HIGH;
1806 else
1807 udc->gadget.speed = USB_SPEED_FULL;
1808 DBG(DBG_BUS, "%s bus reset detected\n",
1809 usb_speed_string(udc->gadget.speed));
1810
1811 ep0 = &udc->usba_ep[0];
1812 ep0->ep.desc = &usba_ep0_desc;
1813 ep0->state = WAIT_FOR_SETUP;
1814 usba_ep_writel(ep0, CFG,
1815 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1816 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1817 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1818 usba_ep_writel(ep0, CTL_ENB,
1819 USBA_EPT_ENABLE | USBA_RX_SETUP);
1820
1821
1822 udc->suspended = false;
1823 usba_int_enb_clear(udc, USBA_WAKE_UP);
1824
1825 usba_int_enb_set(udc, USBA_BF(EPT_INT, 1) |
1826 USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1827
1828
1829
1830
1831
1832 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1833 dev_err(&udc->pdev->dev,
1834 "ODD: EP0 configuration is invalid!\n");
1835
1836
1837 n = fifo_mode ? udc->num_ep : udc->configured_ep;
1838 for (i = 1; i < n; i++) {
1839 ep = &udc->usba_ep[i];
1840 usba_ep_writel(ep, CFG, ep->ept_cfg);
1841 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1842 dev_err(&udc->pdev->dev,
1843 "ODD: EP%d configuration is invalid!\n", i);
1844 }
1845 }
1846
1847 spin_unlock(&udc->lock);
1848
1849 return IRQ_HANDLED;
1850}
1851
1852static int start_clock(struct usba_udc *udc)
1853{
1854 int ret;
1855
1856 if (udc->clocked)
1857 return 0;
1858
1859 pm_stay_awake(&udc->pdev->dev);
1860
1861 ret = clk_prepare_enable(udc->pclk);
1862 if (ret)
1863 return ret;
1864 ret = clk_prepare_enable(udc->hclk);
1865 if (ret) {
1866 clk_disable_unprepare(udc->pclk);
1867 return ret;
1868 }
1869
1870 udc->clocked = true;
1871 return 0;
1872}
1873
1874static void stop_clock(struct usba_udc *udc)
1875{
1876 if (!udc->clocked)
1877 return;
1878
1879 clk_disable_unprepare(udc->hclk);
1880 clk_disable_unprepare(udc->pclk);
1881
1882 udc->clocked = false;
1883
1884 pm_relax(&udc->pdev->dev);
1885}
1886
1887static int usba_start(struct usba_udc *udc)
1888{
1889 unsigned long flags;
1890 int ret;
1891
1892 ret = start_clock(udc);
1893 if (ret)
1894 return ret;
1895
1896 if (udc->suspended)
1897 return 0;
1898
1899 spin_lock_irqsave(&udc->lock, flags);
1900 toggle_bias(udc, 1);
1901 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1902
1903 usba_writel(udc, INT_ENB, 0);
1904 udc->int_enb_cache = 0;
1905 usba_writel(udc, INT_CLR,
1906 USBA_END_OF_RESET|USBA_END_OF_RESUME
1907 |USBA_DET_SUSPEND|USBA_WAKE_UP);
1908
1909 usba_int_enb_set(udc, USBA_END_OF_RESET);
1910 spin_unlock_irqrestore(&udc->lock, flags);
1911
1912 return 0;
1913}
1914
1915static void usba_stop(struct usba_udc *udc)
1916{
1917 unsigned long flags;
1918
1919 if (udc->suspended)
1920 return;
1921
1922 spin_lock_irqsave(&udc->lock, flags);
1923 udc->gadget.speed = USB_SPEED_UNKNOWN;
1924 reset_all_endpoints(udc);
1925
1926
1927 toggle_bias(udc, 0);
1928 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1929 spin_unlock_irqrestore(&udc->lock, flags);
1930
1931 stop_clock(udc);
1932}
1933
1934static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
1935{
1936 struct usba_udc *udc = devid;
1937 int vbus;
1938
1939
1940 udelay(10);
1941
1942 mutex_lock(&udc->vbus_mutex);
1943
1944 vbus = vbus_is_present(udc);
1945 if (vbus != udc->vbus_prev) {
1946 if (vbus) {
1947 usba_start(udc);
1948 } else {
1949 udc->suspended = false;
1950 usba_stop(udc);
1951
1952 if (udc->driver->disconnect)
1953 udc->driver->disconnect(&udc->gadget);
1954 }
1955 udc->vbus_prev = vbus;
1956 }
1957
1958 mutex_unlock(&udc->vbus_mutex);
1959 return IRQ_HANDLED;
1960}
1961
1962static int atmel_usba_start(struct usb_gadget *gadget,
1963 struct usb_gadget_driver *driver)
1964{
1965 int ret;
1966 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1967 unsigned long flags;
1968
1969 spin_lock_irqsave(&udc->lock, flags);
1970 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1971 udc->driver = driver;
1972 spin_unlock_irqrestore(&udc->lock, flags);
1973
1974 mutex_lock(&udc->vbus_mutex);
1975
1976 if (udc->vbus_pin)
1977 enable_irq(gpiod_to_irq(udc->vbus_pin));
1978
1979
1980 udc->vbus_prev = vbus_is_present(udc);
1981 if (udc->vbus_prev) {
1982 ret = usba_start(udc);
1983 if (ret)
1984 goto err;
1985 }
1986
1987 mutex_unlock(&udc->vbus_mutex);
1988 return 0;
1989
1990err:
1991 if (udc->vbus_pin)
1992 disable_irq(gpiod_to_irq(udc->vbus_pin));
1993
1994 mutex_unlock(&udc->vbus_mutex);
1995
1996 spin_lock_irqsave(&udc->lock, flags);
1997 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1998 udc->driver = NULL;
1999 spin_unlock_irqrestore(&udc->lock, flags);
2000 return ret;
2001}
2002
2003static int atmel_usba_stop(struct usb_gadget *gadget)
2004{
2005 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
2006
2007 if (udc->vbus_pin)
2008 disable_irq(gpiod_to_irq(udc->vbus_pin));
2009
2010 if (fifo_mode == 0)
2011 udc->configured_ep = 1;
2012
2013 udc->suspended = false;
2014 usba_stop(udc);
2015
2016 udc->driver = NULL;
2017
2018 return 0;
2019}
2020
2021static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
2022{
2023 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2024 is_on ? AT91_PMC_BIASEN : 0);
2025}
2026
2027static void at91sam9g45_pulse_bias(struct usba_udc *udc)
2028{
2029 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
2030 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
2031 AT91_PMC_BIASEN);
2032}
2033
2034static const struct usba_udc_errata at91sam9rl_errata = {
2035 .toggle_bias = at91sam9rl_toggle_bias,
2036};
2037
2038static const struct usba_udc_errata at91sam9g45_errata = {
2039 .pulse_bias = at91sam9g45_pulse_bias,
2040};
2041
2042static const struct of_device_id atmel_udc_dt_ids[] = {
2043 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
2044 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
2045 { .compatible = "atmel,sama5d3-udc" },
2046 { }
2047};
2048
2049MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
2050
2051static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2052 struct usba_udc *udc)
2053{
2054 u32 val;
2055 struct device_node *np = pdev->dev.of_node;
2056 const struct of_device_id *match;
2057 struct device_node *pp;
2058 int i, ret;
2059 struct usba_ep *eps, *ep;
2060
2061 match = of_match_node(atmel_udc_dt_ids, np);
2062 if (!match)
2063 return ERR_PTR(-EINVAL);
2064
2065 udc->errata = match->data;
2066 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2067 if (IS_ERR(udc->pmc))
2068 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2069 if (IS_ERR(udc->pmc))
2070 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2071 if (udc->errata && IS_ERR(udc->pmc))
2072 return ERR_CAST(udc->pmc);
2073
2074 udc->num_ep = 0;
2075
2076 udc->vbus_pin = devm_gpiod_get_optional(&pdev->dev, "atmel,vbus",
2077 GPIOD_IN);
2078
2079 if (fifo_mode == 0) {
2080 pp = NULL;
2081 while ((pp = of_get_next_child(np, pp)))
2082 udc->num_ep++;
2083 udc->configured_ep = 1;
2084 } else {
2085 udc->num_ep = usba_config_fifo_table(udc);
2086 }
2087
2088 eps = devm_kcalloc(&pdev->dev, udc->num_ep, sizeof(struct usba_ep),
2089 GFP_KERNEL);
2090 if (!eps)
2091 return ERR_PTR(-ENOMEM);
2092
2093 udc->gadget.ep0 = &eps[0].ep;
2094
2095 INIT_LIST_HEAD(&eps[0].ep.ep_list);
2096
2097 pp = NULL;
2098 i = 0;
2099 while ((pp = of_get_next_child(np, pp)) && i < udc->num_ep) {
2100 ep = &eps[i];
2101
2102 ret = of_property_read_u32(pp, "reg", &val);
2103 if (ret) {
2104 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
2105 goto err;
2106 }
2107 ep->index = fifo_mode ? udc->fifo_cfg[i].hw_ep_num : val;
2108
2109 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
2110 if (ret) {
2111 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
2112 goto err;
2113 }
2114 if (fifo_mode) {
2115 if (val < udc->fifo_cfg[i].fifo_size) {
2116 dev_warn(&pdev->dev,
2117 "Using max fifo-size value from DT\n");
2118 ep->fifo_size = val;
2119 } else {
2120 ep->fifo_size = udc->fifo_cfg[i].fifo_size;
2121 }
2122 } else {
2123 ep->fifo_size = val;
2124 }
2125
2126 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
2127 if (ret) {
2128 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
2129 goto err;
2130 }
2131 if (fifo_mode) {
2132 if (val < udc->fifo_cfg[i].nr_banks) {
2133 dev_warn(&pdev->dev,
2134 "Using max nb-banks value from DT\n");
2135 ep->nr_banks = val;
2136 } else {
2137 ep->nr_banks = udc->fifo_cfg[i].nr_banks;
2138 }
2139 } else {
2140 ep->nr_banks = val;
2141 }
2142
2143 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
2144 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
2145
2146 sprintf(ep->name, "ep%d", ep->index);
2147 ep->ep.name = ep->name;
2148
2149 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2150 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2151 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2152 ep->ep.ops = &usba_ep_ops;
2153 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2154 ep->udc = udc;
2155 INIT_LIST_HEAD(&ep->queue);
2156
2157 if (ep->index == 0) {
2158 ep->ep.caps.type_control = true;
2159 } else {
2160 ep->ep.caps.type_iso = ep->can_isoc;
2161 ep->ep.caps.type_bulk = true;
2162 ep->ep.caps.type_int = true;
2163 }
2164
2165 ep->ep.caps.dir_in = true;
2166 ep->ep.caps.dir_out = true;
2167
2168 if (fifo_mode != 0) {
2169
2170
2171
2172
2173 if (ep->fifo_size <= 8)
2174 ep->ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
2175 else
2176
2177 ep->ept_cfg =
2178 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
2179
2180 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
2181 }
2182
2183 if (i)
2184 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2185
2186 i++;
2187 }
2188
2189 if (i == 0) {
2190 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2191 ret = -EINVAL;
2192 goto err;
2193 }
2194
2195 return eps;
2196err:
2197 return ERR_PTR(ret);
2198}
2199
2200static int usba_udc_probe(struct platform_device *pdev)
2201{
2202 struct resource *res;
2203 struct clk *pclk, *hclk;
2204 struct usba_udc *udc;
2205 int irq, ret, i;
2206
2207 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2208 if (!udc)
2209 return -ENOMEM;
2210
2211 udc->gadget = usba_gadget_template;
2212 INIT_LIST_HEAD(&udc->gadget.ep_list);
2213
2214 res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2215 udc->regs = devm_ioremap_resource(&pdev->dev, res);
2216 if (IS_ERR(udc->regs))
2217 return PTR_ERR(udc->regs);
2218 dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n",
2219 res, udc->regs);
2220
2221 res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2222 udc->fifo = devm_ioremap_resource(&pdev->dev, res);
2223 if (IS_ERR(udc->fifo))
2224 return PTR_ERR(udc->fifo);
2225 dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo);
2226
2227 irq = platform_get_irq(pdev, 0);
2228 if (irq < 0)
2229 return irq;
2230
2231 pclk = devm_clk_get(&pdev->dev, "pclk");
2232 if (IS_ERR(pclk))
2233 return PTR_ERR(pclk);
2234 hclk = devm_clk_get(&pdev->dev, "hclk");
2235 if (IS_ERR(hclk))
2236 return PTR_ERR(hclk);
2237
2238 spin_lock_init(&udc->lock);
2239 mutex_init(&udc->vbus_mutex);
2240 udc->pdev = pdev;
2241 udc->pclk = pclk;
2242 udc->hclk = hclk;
2243
2244 platform_set_drvdata(pdev, udc);
2245
2246
2247 ret = clk_prepare_enable(pclk);
2248 if (ret) {
2249 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2250 return ret;
2251 }
2252
2253 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2254 clk_disable_unprepare(pclk);
2255
2256 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2257
2258 toggle_bias(udc, 0);
2259
2260 if (IS_ERR(udc->usba_ep))
2261 return PTR_ERR(udc->usba_ep);
2262
2263 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2264 "atmel_usba_udc", udc);
2265 if (ret) {
2266 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2267 irq, ret);
2268 return ret;
2269 }
2270 udc->irq = irq;
2271
2272 if (udc->vbus_pin) {
2273 irq_set_status_flags(gpiod_to_irq(udc->vbus_pin), IRQ_NOAUTOEN);
2274 ret = devm_request_threaded_irq(&pdev->dev,
2275 gpiod_to_irq(udc->vbus_pin), NULL,
2276 usba_vbus_irq_thread, USBA_VBUS_IRQFLAGS,
2277 "atmel_usba_udc", udc);
2278 if (ret) {
2279 udc->vbus_pin = NULL;
2280 dev_warn(&udc->pdev->dev,
2281 "failed to request vbus irq; "
2282 "assuming always on\n");
2283 }
2284 }
2285
2286 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2287 if (ret)
2288 return ret;
2289 device_init_wakeup(&pdev->dev, 1);
2290
2291 usba_init_debugfs(udc);
2292 for (i = 1; i < udc->num_ep; i++)
2293 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2294
2295 return 0;
2296}
2297
2298static int usba_udc_remove(struct platform_device *pdev)
2299{
2300 struct usba_udc *udc;
2301 int i;
2302
2303 udc = platform_get_drvdata(pdev);
2304
2305 device_init_wakeup(&pdev->dev, 0);
2306 usb_del_gadget_udc(&udc->gadget);
2307
2308 for (i = 1; i < udc->num_ep; i++)
2309 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2310 usba_cleanup_debugfs(udc);
2311
2312 return 0;
2313}
2314
2315#ifdef CONFIG_PM_SLEEP
2316static int usba_udc_suspend(struct device *dev)
2317{
2318 struct usba_udc *udc = dev_get_drvdata(dev);
2319
2320
2321 if (!udc->driver)
2322 return 0;
2323
2324 mutex_lock(&udc->vbus_mutex);
2325
2326 if (!device_may_wakeup(dev)) {
2327 udc->suspended = false;
2328 usba_stop(udc);
2329 goto out;
2330 }
2331
2332
2333
2334
2335
2336 if (udc->vbus_pin) {
2337
2338 usba_stop(udc);
2339 enable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2340 }
2341
2342 enable_irq_wake(udc->irq);
2343
2344out:
2345 mutex_unlock(&udc->vbus_mutex);
2346 return 0;
2347}
2348
2349static int usba_udc_resume(struct device *dev)
2350{
2351 struct usba_udc *udc = dev_get_drvdata(dev);
2352
2353
2354 if (!udc->driver)
2355 return 0;
2356
2357 if (device_may_wakeup(dev)) {
2358 if (udc->vbus_pin)
2359 disable_irq_wake(gpiod_to_irq(udc->vbus_pin));
2360
2361 disable_irq_wake(udc->irq);
2362 }
2363
2364
2365 mutex_lock(&udc->vbus_mutex);
2366 udc->vbus_prev = vbus_is_present(udc);
2367 if (udc->vbus_prev)
2368 usba_start(udc);
2369 mutex_unlock(&udc->vbus_mutex);
2370
2371 return 0;
2372}
2373#endif
2374
2375static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2376
2377static struct platform_driver udc_driver = {
2378 .remove = usba_udc_remove,
2379 .driver = {
2380 .name = "atmel_usba_udc",
2381 .pm = &usba_udc_pm_ops,
2382 .of_match_table = atmel_udc_dt_ids,
2383 },
2384};
2385
2386module_platform_driver_probe(udc_driver, usba_udc_probe);
2387
2388MODULE_DESCRIPTION("Atmel USBA UDC driver");
2389MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2390MODULE_LICENSE("GPL");
2391MODULE_ALIAS("platform:atmel_usba_udc");
2392
