linux/drivers/usb/musb/musb_core.h
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * MUSB OTG driver defines
   4 *
   5 * Copyright 2005 Mentor Graphics Corporation
   6 * Copyright (C) 2005-2006 by Texas Instruments
   7 * Copyright (C) 2006-2007 Nokia Corporation
   8 */
   9
  10#ifndef __MUSB_CORE_H__
  11#define __MUSB_CORE_H__
  12
  13#include <linux/slab.h>
  14#include <linux/list.h>
  15#include <linux/interrupt.h>
  16#include <linux/errno.h>
  17#include <linux/timer.h>
  18#include <linux/device.h>
  19#include <linux/usb/ch9.h>
  20#include <linux/usb/gadget.h>
  21#include <linux/usb.h>
  22#include <linux/usb/otg.h>
  23#include <linux/usb/musb.h>
  24#include <linux/phy/phy.h>
  25#include <linux/workqueue.h>
  26
  27struct musb;
  28struct musb_hw_ep;
  29struct musb_ep;
  30
  31/* Helper defines for struct musb->hwvers */
  32#define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  33#define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  34#define MUSB_HWVERS_RC          0x8000
  35#define MUSB_HWVERS_1300        0x52C
  36#define MUSB_HWVERS_1400        0x590
  37#define MUSB_HWVERS_1800        0x720
  38#define MUSB_HWVERS_1900        0x784
  39#define MUSB_HWVERS_2000        0x800
  40
  41#include "musb_debug.h"
  42#include "musb_dma.h"
  43
  44#include "musb_io.h"
  45
  46#include "musb_gadget.h"
  47#include <linux/usb/hcd.h>
  48#include "musb_host.h"
  49
  50/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  51 * OTG or host-only go to A_IDLE when ID is sensed.
  52 */
  53#define is_peripheral_active(m)         (!(m)->is_host)
  54#define is_host_active(m)               ((m)->is_host)
  55
  56/****************************** CONSTANTS ********************************/
  57
  58#ifndef MUSB_C_NUM_EPS
  59#define MUSB_C_NUM_EPS ((u8)16)
  60#endif
  61
  62#ifndef MUSB_MAX_END0_PACKET
  63#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  64#endif
  65
  66/* host side ep0 states */
  67enum musb_h_ep0_state {
  68        MUSB_EP0_IDLE,
  69        MUSB_EP0_START,                 /* expect ack of setup */
  70        MUSB_EP0_IN,                    /* expect IN DATA */
  71        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
  72        MUSB_EP0_STATUS,                /* expect ack of STATUS */
  73} __attribute__ ((packed));
  74
  75/* peripheral side ep0 states */
  76enum musb_g_ep0_state {
  77        MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
  78        MUSB_EP0_STAGE_SETUP,           /* received SETUP */
  79        MUSB_EP0_STAGE_TX,              /* IN data */
  80        MUSB_EP0_STAGE_RX,              /* OUT data */
  81        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
  82        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
  83        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
  84} __attribute__ ((packed));
  85
  86/*
  87 * OTG protocol constants.  See USB OTG 1.3 spec,
  88 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  89 */
  90#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
  91#define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
  92#define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
  93#define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
  94
  95/****************************** FUNCTIONS ********************************/
  96
  97#define MUSB_HST_MODE(_musb)\
  98        { (_musb)->is_host = true; }
  99#define MUSB_DEV_MODE(_musb) \
 100        { (_musb)->is_host = false; }
 101
 102#define test_devctl_hst_mode(_x) \
 103        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 104
 105#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 106
 107/******************************** TYPES *************************************/
 108
 109struct musb_io;
 110
 111/**
 112 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 113 * @quirks:     flags for platform specific quirks
 114 * @enable:     enable device
 115 * @disable:    disable device
 116 * @ep_offset:  returns the end point offset
 117 * @ep_select:  selects the specified end point
 118 * @fifo_mode:  sets the fifo mode
 119 * @fifo_offset: returns the fifo offset
 120 * @readb:      read 8 bits
 121 * @writeb:     write 8 bits
 122 * @readw:      read 16 bits
 123 * @writew:     write 16 bits
 124 * @read_fifo:  reads the fifo
 125 * @write_fifo: writes to fifo
 126 * @dma_init:   platform specific dma init function
 127 * @dma_exit:   platform specific dma exit function
 128 * @init:       turns on clocks, sets up platform-specific registers, etc
 129 * @exit:       undoes @init
 130 * @set_mode:   forcefully changes operating mode
 131 * @try_idle:   tries to idle the IP
 132 * @recover:    platform-specific babble recovery
 133 * @vbus_status: returns vbus status if possible
 134 * @set_vbus:   forces vbus status
 135 * @pre_root_reset_end: called before the root usb port reset flag gets cleared
 136 * @post_root_reset_end: called after the root usb port reset flag gets cleared
 137 * @phy_callback: optional callback function for the phy to call
 138 */
 139struct musb_platform_ops {
 140
 141#define MUSB_G_NO_SKB_RESERVE   BIT(9)
 142#define MUSB_DA8XX              BIT(8)
 143#define MUSB_PRESERVE_SESSION   BIT(7)
 144#define MUSB_DMA_UX500          BIT(6)
 145#define MUSB_DMA_CPPI41         BIT(5)
 146#define MUSB_DMA_CPPI           BIT(4)
 147#define MUSB_DMA_TUSB_OMAP      BIT(3)
 148#define MUSB_DMA_INVENTRA       BIT(2)
 149#define MUSB_IN_TUSB            BIT(1)
 150#define MUSB_INDEXED_EP         BIT(0)
 151        u32     quirks;
 152
 153        int     (*init)(struct musb *musb);
 154        int     (*exit)(struct musb *musb);
 155
 156        void    (*enable)(struct musb *musb);
 157        void    (*disable)(struct musb *musb);
 158
 159        u32     (*ep_offset)(u8 epnum, u16 offset);
 160        void    (*ep_select)(void __iomem *mbase, u8 epnum);
 161        u16     fifo_mode;
 162        u32     (*fifo_offset)(u8 epnum);
 163        u32     (*busctl_offset)(u8 epnum, u16 offset);
 164        u8      (*readb)(const void __iomem *addr, unsigned offset);
 165        void    (*writeb)(void __iomem *addr, unsigned offset, u8 data);
 166        u16     (*readw)(const void __iomem *addr, unsigned offset);
 167        void    (*writew)(void __iomem *addr, unsigned offset, u16 data);
 168        void    (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
 169        void    (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
 170        struct dma_controller *
 171                (*dma_init) (struct musb *musb, void __iomem *base);
 172        void    (*dma_exit)(struct dma_controller *c);
 173        int     (*set_mode)(struct musb *musb, u8 mode);
 174        void    (*try_idle)(struct musb *musb, unsigned long timeout);
 175        int     (*recover)(struct musb *musb);
 176
 177        int     (*vbus_status)(struct musb *musb);
 178        void    (*set_vbus)(struct musb *musb, int on);
 179
 180        void    (*pre_root_reset_end)(struct musb *musb);
 181        void    (*post_root_reset_end)(struct musb *musb);
 182        int     (*phy_callback)(enum musb_vbus_id_status status);
 183        void    (*clear_ep_rxintr)(struct musb *musb, int epnum);
 184};
 185
 186/*
 187 * struct musb_hw_ep - endpoint hardware (bidirectional)
 188 *
 189 * Ordered slightly for better cacheline locality.
 190 */
 191struct musb_hw_ep {
 192        struct musb             *musb;
 193        void __iomem            *fifo;
 194        void __iomem            *regs;
 195
 196#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 197        void __iomem            *conf;
 198#endif
 199
 200        /* index in musb->endpoints[]  */
 201        u8                      epnum;
 202
 203        /* hardware configuration, possibly dynamic */
 204        bool                    is_shared_fifo;
 205        bool                    tx_double_buffered;
 206        bool                    rx_double_buffered;
 207        u16                     max_packet_sz_tx;
 208        u16                     max_packet_sz_rx;
 209
 210        struct dma_channel      *tx_channel;
 211        struct dma_channel      *rx_channel;
 212
 213#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 214        /* TUSB has "asynchronous" and "synchronous" dma modes */
 215        dma_addr_t              fifo_async;
 216        dma_addr_t              fifo_sync;
 217        void __iomem            *fifo_sync_va;
 218#endif
 219
 220        /* currently scheduled peripheral endpoint */
 221        struct musb_qh          *in_qh;
 222        struct musb_qh          *out_qh;
 223
 224        u8                      rx_reinit;
 225        u8                      tx_reinit;
 226
 227        /* peripheral side */
 228        struct musb_ep          ep_in;                  /* TX */
 229        struct musb_ep          ep_out;                 /* RX */
 230};
 231
 232static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 233{
 234        return next_request(&hw_ep->ep_in);
 235}
 236
 237static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 238{
 239        return next_request(&hw_ep->ep_out);
 240}
 241
 242struct musb_csr_regs {
 243        /* FIFO registers */
 244        u16 txmaxp, txcsr, rxmaxp, rxcsr;
 245        u16 rxfifoadd, txfifoadd;
 246        u8 txtype, txinterval, rxtype, rxinterval;
 247        u8 rxfifosz, txfifosz;
 248        u8 txfunaddr, txhubaddr, txhubport;
 249        u8 rxfunaddr, rxhubaddr, rxhubport;
 250};
 251
 252struct musb_context_registers {
 253
 254        u8 power;
 255        u8 intrusbe;
 256        u16 frame;
 257        u8 index, testmode;
 258
 259        u8 devctl, busctl, misc;
 260        u32 otg_interfsel;
 261
 262        struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 263};
 264
 265/*
 266 * struct musb - Driver instance data.
 267 */
 268struct musb {
 269        /* device lock */
 270        spinlock_t              lock;
 271        spinlock_t              list_lock;      /* resume work list lock */
 272
 273        struct musb_io          io;
 274        const struct musb_platform_ops *ops;
 275        struct musb_context_registers context;
 276
 277        irqreturn_t             (*isr)(int, void *);
 278        struct delayed_work     irq_work;
 279        struct delayed_work     deassert_reset_work;
 280        struct delayed_work     finish_resume_work;
 281        struct delayed_work     gadget_work;
 282        u16                     hwvers;
 283
 284        u16                     intrrxe;
 285        u16                     intrtxe;
 286/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 287#define MUSB_PORT_STAT_RESUME   (1 << 31)
 288
 289        u32                     port1_status;
 290
 291        unsigned long           rh_timer;
 292
 293        enum musb_h_ep0_state   ep0_stage;
 294
 295        /* bulk traffic normally dedicates endpoint hardware, and each
 296         * direction has its own ring of host side endpoints.
 297         * we try to progress the transfer at the head of each endpoint's
 298         * queue until it completes or NAKs too much; then we try the next
 299         * endpoint.
 300         */
 301        struct musb_hw_ep       *bulk_ep;
 302
 303        struct list_head        control;        /* of musb_qh */
 304        struct list_head        in_bulk;        /* of musb_qh */
 305        struct list_head        out_bulk;       /* of musb_qh */
 306        struct list_head        pending_list;   /* pending work list */
 307
 308        struct timer_list       otg_timer;
 309        struct timer_list       dev_timer;
 310        struct notifier_block   nb;
 311
 312        struct dma_controller   *dma_controller;
 313
 314        struct device           *controller;
 315        void __iomem            *ctrl_base;
 316        void __iomem            *mregs;
 317
 318#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 319        dma_addr_t              async;
 320        dma_addr_t              sync;
 321        void __iomem            *sync_va;
 322        u8                      tusb_revision;
 323#endif
 324
 325        /* passed down from chip/board specific irq handlers */
 326        u8                      int_usb;
 327        u16                     int_rx;
 328        u16                     int_tx;
 329
 330        struct usb_phy          *xceiv;
 331        struct phy              *phy;
 332
 333        int nIrq;
 334        unsigned                irq_wake:1;
 335
 336        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 337#define control_ep              endpoints
 338
 339#define VBUSERR_RETRY_COUNT     3
 340        u16                     vbuserr_retry;
 341        u16 epmask;
 342        u8 nr_endpoints;
 343
 344        int                     (*board_set_power)(int state);
 345
 346        u8                      min_power;      /* vbus for periph, in mA/2 */
 347
 348        enum musb_mode          port_mode;
 349        bool                    session;
 350        unsigned long           quirk_retries;
 351        bool                    is_host;
 352
 353        int                     a_wait_bcon;    /* VBUS timeout in msecs */
 354        unsigned long           idle_timeout;   /* Next timeout in jiffies */
 355
 356        unsigned                is_initialized:1;
 357        unsigned                is_runtime_suspended:1;
 358
 359        /* active means connected and not suspended */
 360        unsigned                is_active:1;
 361
 362        unsigned is_multipoint:1;
 363
 364        unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 365        unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 366        unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 367
 368        unsigned                bulk_split:1;
 369#define can_bulk_split(musb,type) \
 370        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 371
 372        unsigned                bulk_combine:1;
 373#define can_bulk_combine(musb,type) \
 374        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 375
 376        /* is_suspended means USB B_PERIPHERAL suspend */
 377        unsigned                is_suspended:1;
 378
 379        /* may_wakeup means remote wakeup is enabled */
 380        unsigned                may_wakeup:1;
 381
 382        /* is_self_powered is reported in device status and the
 383         * config descriptor.  is_bus_powered means B_PERIPHERAL
 384         * draws some VBUS current; both can be true.
 385         */
 386        unsigned                is_self_powered:1;
 387        unsigned                is_bus_powered:1;
 388
 389        unsigned                set_address:1;
 390        unsigned                test_mode:1;
 391        unsigned                softconnect:1;
 392
 393        unsigned                flush_irq_work:1;
 394
 395        u8                      address;
 396        u8                      test_mode_nr;
 397        u16                     ackpend;                /* ep0 */
 398        enum musb_g_ep0_state   ep0_state;
 399        struct usb_gadget       g;                      /* the gadget */
 400        struct usb_gadget_driver *gadget_driver;        /* its driver */
 401        struct usb_hcd          *hcd;                   /* the usb hcd */
 402
 403        const struct musb_hdrc_config *config;
 404
 405        int                     xceiv_old_state;
 406#ifdef CONFIG_DEBUG_FS
 407        struct dentry           *debugfs_root;
 408#endif
 409};
 410
 411/* This must be included after struct musb is defined */
 412#include "musb_regs.h"
 413
 414static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 415{
 416        return container_of(g, struct musb, g);
 417}
 418
 419static inline char *musb_ep_xfertype_string(u8 type)
 420{
 421        char *s;
 422
 423        switch (type) {
 424        case USB_ENDPOINT_XFER_CONTROL:
 425                s = "ctrl";
 426                break;
 427        case USB_ENDPOINT_XFER_ISOC:
 428                s = "iso";
 429                break;
 430        case USB_ENDPOINT_XFER_BULK:
 431                s = "bulk";
 432                break;
 433        case USB_ENDPOINT_XFER_INT:
 434                s = "int";
 435                break;
 436        default:
 437                s = "";
 438                break;
 439        }
 440        return s;
 441}
 442
 443static inline int musb_read_fifosize(struct musb *musb,
 444                struct musb_hw_ep *hw_ep, u8 epnum)
 445{
 446        void __iomem *mbase = musb->mregs;
 447        u8 reg = 0;
 448
 449        /* read from core using indexed model */
 450        reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
 451        /* 0's returned when no more endpoints */
 452        if (!reg)
 453                return -ENODEV;
 454
 455        musb->nr_endpoints++;
 456        musb->epmask |= (1 << epnum);
 457
 458        hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 459
 460        /* shared TX/RX FIFO? */
 461        if ((reg & 0xf0) == 0xf0) {
 462                hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 463                hw_ep->is_shared_fifo = true;
 464                return 0;
 465        } else {
 466                hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 467                hw_ep->is_shared_fifo = false;
 468        }
 469
 470        return 0;
 471}
 472
 473static inline void musb_configure_ep0(struct musb *musb)
 474{
 475        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 476        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 477        musb->endpoints[0].is_shared_fifo = true;
 478}
 479
 480/***************************** Glue it together *****************************/
 481
 482extern const char musb_driver_name[];
 483
 484extern void musb_stop(struct musb *musb);
 485extern void musb_start(struct musb *musb);
 486
 487extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 488extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 489
 490extern void musb_load_testpacket(struct musb *);
 491
 492extern irqreturn_t musb_interrupt(struct musb *);
 493
 494extern void musb_hnp_stop(struct musb *musb);
 495
 496int musb_queue_resume_work(struct musb *musb,
 497                           int (*callback)(struct musb *musb, void *data),
 498                           void *data);
 499
 500static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 501{
 502        if (musb->ops->set_vbus)
 503                musb->ops->set_vbus(musb, is_on);
 504}
 505
 506static inline void musb_platform_enable(struct musb *musb)
 507{
 508        if (musb->ops->enable)
 509                musb->ops->enable(musb);
 510}
 511
 512static inline void musb_platform_disable(struct musb *musb)
 513{
 514        if (musb->ops->disable)
 515                musb->ops->disable(musb);
 516}
 517
 518static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 519{
 520        if (!musb->ops->set_mode)
 521                return 0;
 522
 523        return musb->ops->set_mode(musb, mode);
 524}
 525
 526static inline void musb_platform_try_idle(struct musb *musb,
 527                unsigned long timeout)
 528{
 529        if (musb->ops->try_idle)
 530                musb->ops->try_idle(musb, timeout);
 531}
 532
 533static inline int  musb_platform_recover(struct musb *musb)
 534{
 535        if (!musb->ops->recover)
 536                return 0;
 537
 538        return musb->ops->recover(musb);
 539}
 540
 541static inline int musb_platform_get_vbus_status(struct musb *musb)
 542{
 543        if (!musb->ops->vbus_status)
 544                return -EINVAL;
 545
 546        return musb->ops->vbus_status(musb);
 547}
 548
 549static inline int musb_platform_init(struct musb *musb)
 550{
 551        if (!musb->ops->init)
 552                return -EINVAL;
 553
 554        return musb->ops->init(musb);
 555}
 556
 557static inline int musb_platform_exit(struct musb *musb)
 558{
 559        if (!musb->ops->exit)
 560                return -EINVAL;
 561
 562        return musb->ops->exit(musb);
 563}
 564
 565static inline void musb_platform_pre_root_reset_end(struct musb *musb)
 566{
 567        if (musb->ops->pre_root_reset_end)
 568                musb->ops->pre_root_reset_end(musb);
 569}
 570
 571static inline void musb_platform_post_root_reset_end(struct musb *musb)
 572{
 573        if (musb->ops->post_root_reset_end)
 574                musb->ops->post_root_reset_end(musb);
 575}
 576
 577static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum)
 578{
 579        if (musb->ops->clear_ep_rxintr)
 580                musb->ops->clear_ep_rxintr(musb, epnum);
 581}
 582
 583/*
 584 * gets the "dr_mode" property from DT and converts it into musb_mode
 585 * if the property is not found or not recognized returns MUSB_OTG
 586 */
 587extern enum musb_mode musb_get_mode(struct device *dev);
 588
 589#endif  /* __MUSB_CORE_H__ */
 590