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8#include <linux/debugfs.h>
9#include <linux/delay.h>
10#include <linux/errno.h>
11#include <linux/extcon.h>
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/mutex.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/pinctrl/consumer.h>
21#include <linux/proc_fs.h>
22#include <linux/regulator/consumer.h>
23#include <linux/sched/clock.h>
24#include <linux/seq_file.h>
25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/string.h>
28#include <linux/types.h>
29#include <linux/usb/typec.h>
30#include <linux/usb/tcpm.h>
31#include <linux/usb/pd.h>
32#include <linux/workqueue.h>
33
34#include "fusb302_reg.h"
35
36
37
38
39
40
41
42
43#define T_BC_LVL_DEBOUNCE_DELAY_MS 30
44
45enum toggling_mode {
46 TOGGLING_MODE_OFF,
47 TOGGLING_MODE_DRP,
48 TOGGLING_MODE_SNK,
49 TOGGLING_MODE_SRC,
50};
51
52enum src_current_status {
53 SRC_CURRENT_DEFAULT,
54 SRC_CURRENT_MEDIUM,
55 SRC_CURRENT_HIGH,
56};
57
58static const u8 ra_mda_value[] = {
59 [SRC_CURRENT_DEFAULT] = 4,
60 [SRC_CURRENT_MEDIUM] = 9,
61 [SRC_CURRENT_HIGH] = 18,
62};
63
64static const u8 rd_mda_value[] = {
65 [SRC_CURRENT_DEFAULT] = 38,
66 [SRC_CURRENT_MEDIUM] = 38,
67 [SRC_CURRENT_HIGH] = 61,
68};
69
70#define LOG_BUFFER_ENTRIES 1024
71#define LOG_BUFFER_ENTRY_SIZE 128
72
73struct fusb302_chip {
74 struct device *dev;
75 struct i2c_client *i2c_client;
76 struct tcpm_port *tcpm_port;
77 struct tcpc_dev tcpc_dev;
78 struct tcpc_config tcpc_config;
79
80 struct regulator *vbus;
81
82 spinlock_t irq_lock;
83 struct work_struct irq_work;
84 bool irq_suspended;
85 bool irq_while_suspended;
86 int gpio_int_n;
87 int gpio_int_n_irq;
88 struct extcon_dev *extcon;
89
90 struct workqueue_struct *wq;
91 struct delayed_work bc_lvl_handler;
92
93
94 struct mutex lock;
95
96
97 enum toggling_mode toggling_mode;
98 enum src_current_status src_current_status;
99 bool intr_togdone;
100 bool intr_bc_lvl;
101 bool intr_comp_chng;
102
103
104 bool vconn_on;
105 bool vbus_on;
106 bool charge_on;
107 bool vbus_present;
108 enum typec_cc_polarity cc_polarity;
109 enum typec_cc_status cc1;
110 enum typec_cc_status cc2;
111 u32 snk_pdo[PDO_MAX_OBJECTS];
112
113#ifdef CONFIG_DEBUG_FS
114 struct dentry *dentry;
115
116 struct mutex logbuffer_lock;
117 int logbuffer_head;
118 int logbuffer_tail;
119 u8 *logbuffer[LOG_BUFFER_ENTRIES];
120#endif
121};
122
123
124
125
126
127#ifdef CONFIG_DEBUG_FS
128static bool fusb302_log_full(struct fusb302_chip *chip)
129{
130 return chip->logbuffer_tail ==
131 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
132}
133
134__printf(2, 0)
135static void _fusb302_log(struct fusb302_chip *chip, const char *fmt,
136 va_list args)
137{
138 char tmpbuffer[LOG_BUFFER_ENTRY_SIZE];
139 u64 ts_nsec = local_clock();
140 unsigned long rem_nsec;
141
142 if (!chip->logbuffer[chip->logbuffer_head]) {
143 chip->logbuffer[chip->logbuffer_head] =
144 kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL);
145 if (!chip->logbuffer[chip->logbuffer_head])
146 return;
147 }
148
149 vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args);
150
151 mutex_lock(&chip->logbuffer_lock);
152
153 if (fusb302_log_full(chip)) {
154 chip->logbuffer_head = max(chip->logbuffer_head - 1, 0);
155 strlcpy(tmpbuffer, "overflow", sizeof(tmpbuffer));
156 }
157
158 if (chip->logbuffer_head < 0 ||
159 chip->logbuffer_head >= LOG_BUFFER_ENTRIES) {
160 dev_warn(chip->dev,
161 "Bad log buffer index %d\n", chip->logbuffer_head);
162 goto abort;
163 }
164
165 if (!chip->logbuffer[chip->logbuffer_head]) {
166 dev_warn(chip->dev,
167 "Log buffer index %d is NULL\n", chip->logbuffer_head);
168 goto abort;
169 }
170
171 rem_nsec = do_div(ts_nsec, 1000000000);
172 scnprintf(chip->logbuffer[chip->logbuffer_head],
173 LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s",
174 (unsigned long)ts_nsec, rem_nsec / 1000,
175 tmpbuffer);
176 chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
177
178abort:
179 mutex_unlock(&chip->logbuffer_lock);
180}
181
182static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...)
183{
184 va_list args;
185
186 va_start(args, fmt);
187 _fusb302_log(chip, fmt, args);
188 va_end(args);
189}
190
191static int fusb302_debug_show(struct seq_file *s, void *v)
192{
193 struct fusb302_chip *chip = (struct fusb302_chip *)s->private;
194 int tail;
195
196 mutex_lock(&chip->logbuffer_lock);
197 tail = chip->logbuffer_tail;
198 while (tail != chip->logbuffer_head) {
199 seq_printf(s, "%s\n", chip->logbuffer[tail]);
200 tail = (tail + 1) % LOG_BUFFER_ENTRIES;
201 }
202 if (!seq_has_overflowed(s))
203 chip->logbuffer_tail = tail;
204 mutex_unlock(&chip->logbuffer_lock);
205
206 return 0;
207}
208DEFINE_SHOW_ATTRIBUTE(fusb302_debug);
209
210static struct dentry *rootdir;
211
212static void fusb302_debugfs_init(struct fusb302_chip *chip)
213{
214 mutex_init(&chip->logbuffer_lock);
215 if (!rootdir)
216 rootdir = debugfs_create_dir("fusb302", NULL);
217
218 chip->dentry = debugfs_create_file(dev_name(chip->dev),
219 S_IFREG | 0444, rootdir,
220 chip, &fusb302_debug_fops);
221}
222
223static void fusb302_debugfs_exit(struct fusb302_chip *chip)
224{
225 debugfs_remove(chip->dentry);
226 debugfs_remove(rootdir);
227}
228
229#else
230
231static void fusb302_log(const struct fusb302_chip *chip,
232 const char *fmt, ...) { }
233static void fusb302_debugfs_init(const struct fusb302_chip *chip) { }
234static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { }
235
236#endif
237
238static int fusb302_i2c_write(struct fusb302_chip *chip,
239 u8 address, u8 data)
240{
241 int ret = 0;
242
243 ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data);
244 if (ret < 0)
245 fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d",
246 data, address, ret);
247
248 return ret;
249}
250
251static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
252 u8 length, const u8 *data)
253{
254 int ret = 0;
255
256 if (length <= 0)
257 return ret;
258
259 ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address,
260 length, data);
261 if (ret < 0)
262 fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d",
263 address, length, ret);
264
265 return ret;
266}
267
268static int fusb302_i2c_read(struct fusb302_chip *chip,
269 u8 address, u8 *data)
270{
271 int ret = 0;
272
273 ret = i2c_smbus_read_byte_data(chip->i2c_client, address);
274 *data = (u8)ret;
275 if (ret < 0)
276 fusb302_log(chip, "cannot read %02x, ret=%d", address, ret);
277
278 return ret;
279}
280
281static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
282 u8 length, u8 *data)
283{
284 int ret = 0;
285
286 if (length <= 0)
287 return ret;
288
289 ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address,
290 length, data);
291 if (ret < 0) {
292 fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d",
293 address, length, ret);
294 goto done;
295 }
296 if (ret != length) {
297 fusb302_log(chip, "only read %d/%d bytes from 0x%02x",
298 ret, length, address);
299 ret = -EIO;
300 }
301
302done:
303 return ret;
304}
305
306static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
307 u8 mask, u8 value)
308{
309 int ret = 0;
310 u8 data;
311
312 ret = fusb302_i2c_read(chip, address, &data);
313 if (ret < 0)
314 return ret;
315 data &= ~mask;
316 data |= value;
317 ret = fusb302_i2c_write(chip, address, data);
318 if (ret < 0)
319 return ret;
320
321 return ret;
322}
323
324static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
325 u8 set_bits)
326{
327 return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
328}
329
330static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
331 u8 clear_bits)
332{
333 return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
334}
335
336static int fusb302_sw_reset(struct fusb302_chip *chip)
337{
338 int ret = 0;
339
340 ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
341 FUSB_REG_RESET_SW_RESET);
342 if (ret < 0)
343 fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret);
344 else
345 fusb302_log(chip, "sw reset");
346
347 return ret;
348}
349
350static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip)
351{
352 int ret = 0;
353
354 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
355 FUSB_REG_CONTROL3_N_RETRIES_3 |
356 FUSB_REG_CONTROL3_AUTO_RETRY);
357
358 return ret;
359}
360
361
362
363
364
365static int fusb302_init_interrupt(struct fusb302_chip *chip)
366{
367 int ret = 0;
368
369 ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
370 0xFF & ~FUSB_REG_MASK_VBUSOK);
371 if (ret < 0)
372 return ret;
373 ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
374 if (ret < 0)
375 return ret;
376 ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
377 if (ret < 0)
378 return ret;
379 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
380 FUSB_REG_CONTROL0_INT_MASK);
381 if (ret < 0)
382 return ret;
383
384 return ret;
385}
386
387static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
388{
389 int ret = 0;
390
391 ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
392
393 return ret;
394}
395
396static int tcpm_init(struct tcpc_dev *dev)
397{
398 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
399 tcpc_dev);
400 int ret = 0;
401 u8 data;
402
403 ret = fusb302_sw_reset(chip);
404 if (ret < 0)
405 return ret;
406 ret = fusb302_enable_tx_auto_retries(chip);
407 if (ret < 0)
408 return ret;
409 ret = fusb302_init_interrupt(chip);
410 if (ret < 0)
411 return ret;
412 ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
413 if (ret < 0)
414 return ret;
415 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
416 if (ret < 0)
417 return ret;
418 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
419 ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
420 if (ret < 0)
421 return ret;
422 fusb302_log(chip, "fusb302 device ID: 0x%02x", data);
423
424 return ret;
425}
426
427static int tcpm_get_vbus(struct tcpc_dev *dev)
428{
429 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
430 tcpc_dev);
431 int ret = 0;
432
433 mutex_lock(&chip->lock);
434 ret = chip->vbus_present ? 1 : 0;
435 mutex_unlock(&chip->lock);
436
437 return ret;
438}
439
440static int tcpm_get_current_limit(struct tcpc_dev *dev)
441{
442 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
443 tcpc_dev);
444 int current_limit = 0;
445 unsigned long timeout;
446
447 if (!chip->extcon)
448 return 0;
449
450
451
452
453
454 timeout = jiffies + msecs_to_jiffies(800);
455 do {
456 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
457 current_limit = 500;
458
459 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
460 extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
461 current_limit = 1500;
462
463 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
464 current_limit = 2000;
465
466 msleep(50);
467 } while (current_limit == 0 && time_before(jiffies, timeout));
468
469 return current_limit;
470}
471
472static int fusb302_set_src_current(struct fusb302_chip *chip,
473 enum src_current_status status)
474{
475 int ret = 0;
476
477 chip->src_current_status = status;
478 switch (status) {
479 case SRC_CURRENT_DEFAULT:
480 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
481 FUSB_REG_CONTROL0_HOST_CUR_MASK,
482 FUSB_REG_CONTROL0_HOST_CUR_DEF);
483 break;
484 case SRC_CURRENT_MEDIUM:
485 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
486 FUSB_REG_CONTROL0_HOST_CUR_MASK,
487 FUSB_REG_CONTROL0_HOST_CUR_MED);
488 break;
489 case SRC_CURRENT_HIGH:
490 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
491 FUSB_REG_CONTROL0_HOST_CUR_MASK,
492 FUSB_REG_CONTROL0_HOST_CUR_HIGH);
493 break;
494 default:
495 break;
496 }
497
498 return ret;
499}
500
501static int fusb302_set_toggling(struct fusb302_chip *chip,
502 enum toggling_mode mode)
503{
504 int ret = 0;
505
506
507 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
508 FUSB_REG_CONTROL2_TOGGLE);
509 if (ret < 0)
510 return ret;
511
512 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
513 FUSB_REG_MASK_BC_LVL |
514 FUSB_REG_MASK_COMP_CHNG);
515 if (ret < 0)
516 return ret;
517 chip->intr_bc_lvl = false;
518 chip->intr_comp_chng = false;
519
520 switch (mode) {
521 case TOGGLING_MODE_OFF:
522 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
523 FUSB_REG_CONTROL2_MODE_MASK,
524 FUSB_REG_CONTROL2_MODE_NONE);
525 if (ret < 0)
526 return ret;
527 break;
528 case TOGGLING_MODE_SNK:
529 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
530 FUSB_REG_CONTROL2_MODE_MASK,
531 FUSB_REG_CONTROL2_MODE_UFP);
532 if (ret < 0)
533 return ret;
534 break;
535 case TOGGLING_MODE_SRC:
536 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
537 FUSB_REG_CONTROL2_MODE_MASK,
538 FUSB_REG_CONTROL2_MODE_DFP);
539 if (ret < 0)
540 return ret;
541 break;
542 case TOGGLING_MODE_DRP:
543 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
544 FUSB_REG_CONTROL2_MODE_MASK,
545 FUSB_REG_CONTROL2_MODE_DRP);
546 if (ret < 0)
547 return ret;
548 break;
549 default:
550 break;
551 }
552
553 if (mode == TOGGLING_MODE_OFF) {
554
555 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
556 FUSB_REG_MASKA_TOGDONE);
557 if (ret < 0)
558 return ret;
559 chip->intr_togdone = false;
560 } else {
561
562 WARN(chip->vconn_on, "Vconn is on during toggle start");
563
564 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
565 FUSB_REG_MASKA_TOGDONE);
566 if (ret < 0)
567 return ret;
568 chip->intr_togdone = true;
569
570 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
571 FUSB_REG_CONTROL2_TOGGLE);
572 if (ret < 0)
573 return ret;
574
575 chip->cc1 = TYPEC_CC_OPEN;
576 chip->cc2 = TYPEC_CC_OPEN;
577 }
578 chip->toggling_mode = mode;
579
580 return ret;
581}
582
583static const char * const typec_cc_status_name[] = {
584 [TYPEC_CC_OPEN] = "Open",
585 [TYPEC_CC_RA] = "Ra",
586 [TYPEC_CC_RD] = "Rd",
587 [TYPEC_CC_RP_DEF] = "Rp-def",
588 [TYPEC_CC_RP_1_5] = "Rp-1.5",
589 [TYPEC_CC_RP_3_0] = "Rp-3.0",
590};
591
592static const enum src_current_status cc_src_current[] = {
593 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
594 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
595 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
596 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
597 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
598 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
599};
600
601static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
602{
603 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
604 tcpc_dev);
605 u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
606 FUSB_REG_SWITCHES0_CC2_PU_EN |
607 FUSB_REG_SWITCHES0_CC1_PD_EN |
608 FUSB_REG_SWITCHES0_CC2_PD_EN;
609 u8 rd_mda, switches0_data = 0x00;
610 int ret = 0;
611
612 mutex_lock(&chip->lock);
613 switch (cc) {
614 case TYPEC_CC_OPEN:
615 break;
616 case TYPEC_CC_RD:
617 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
618 FUSB_REG_SWITCHES0_CC2_PD_EN;
619 break;
620 case TYPEC_CC_RP_DEF:
621 case TYPEC_CC_RP_1_5:
622 case TYPEC_CC_RP_3_0:
623 switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
624 FUSB_REG_SWITCHES0_CC1_PU_EN :
625 FUSB_REG_SWITCHES0_CC2_PU_EN;
626 break;
627 default:
628 fusb302_log(chip, "unsupported cc value %s",
629 typec_cc_status_name[cc]);
630 ret = -EINVAL;
631 goto done;
632 }
633
634 fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]);
635
636 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
637 if (ret < 0) {
638 fusb302_log(chip, "cannot set toggling mode, ret=%d", ret);
639 goto done;
640 }
641
642 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
643 switches0_mask, switches0_data);
644 if (ret < 0) {
645 fusb302_log(chip, "cannot set pull-up/-down, ret = %d", ret);
646 goto done;
647 }
648
649 chip->cc1 = TYPEC_CC_OPEN;
650 chip->cc2 = TYPEC_CC_OPEN;
651
652
653 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
654 if (ret < 0) {
655 fusb302_log(chip, "cannot set src current %s, ret=%d",
656 typec_cc_status_name[cc], ret);
657 goto done;
658 }
659
660
661 switch (cc) {
662 case TYPEC_CC_RP_DEF:
663 case TYPEC_CC_RP_1_5:
664 case TYPEC_CC_RP_3_0:
665 rd_mda = rd_mda_value[cc_src_current[cc]];
666 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
667 if (ret < 0) {
668 fusb302_log(chip,
669 "cannot set SRC measure value, ret=%d",
670 ret);
671 goto done;
672 }
673 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
674 FUSB_REG_MASK_BC_LVL |
675 FUSB_REG_MASK_COMP_CHNG,
676 FUSB_REG_MASK_COMP_CHNG);
677 if (ret < 0) {
678 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
679 ret);
680 goto done;
681 }
682 chip->intr_comp_chng = true;
683 break;
684 case TYPEC_CC_RD:
685 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
686 FUSB_REG_MASK_BC_LVL |
687 FUSB_REG_MASK_COMP_CHNG,
688 FUSB_REG_MASK_BC_LVL);
689 if (ret < 0) {
690 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
691 ret);
692 goto done;
693 }
694 chip->intr_bc_lvl = true;
695 break;
696 default:
697 break;
698 }
699done:
700 mutex_unlock(&chip->lock);
701
702 return ret;
703}
704
705static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
706 enum typec_cc_status *cc2)
707{
708 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
709 tcpc_dev);
710
711 mutex_lock(&chip->lock);
712 *cc1 = chip->cc1;
713 *cc2 = chip->cc2;
714 fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1],
715 typec_cc_status_name[*cc2]);
716 mutex_unlock(&chip->lock);
717
718 return 0;
719}
720
721static int tcpm_set_polarity(struct tcpc_dev *dev,
722 enum typec_cc_polarity polarity)
723{
724 return 0;
725}
726
727static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
728{
729 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
730 tcpc_dev);
731 int ret = 0;
732 u8 switches0_data = 0x00;
733 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
734 FUSB_REG_SWITCHES0_VCONN_CC2;
735
736 mutex_lock(&chip->lock);
737 if (chip->vconn_on == on) {
738 fusb302_log(chip, "vconn is already %s", on ? "On" : "Off");
739 goto done;
740 }
741 if (on) {
742 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
743 FUSB_REG_SWITCHES0_VCONN_CC2 :
744 FUSB_REG_SWITCHES0_VCONN_CC1;
745 }
746 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
747 switches0_mask, switches0_data);
748 if (ret < 0)
749 goto done;
750 chip->vconn_on = on;
751 fusb302_log(chip, "vconn := %s", on ? "On" : "Off");
752done:
753 mutex_unlock(&chip->lock);
754
755 return ret;
756}
757
758static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
759{
760 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
761 tcpc_dev);
762 int ret = 0;
763
764 mutex_lock(&chip->lock);
765 if (chip->vbus_on == on) {
766 fusb302_log(chip, "vbus is already %s", on ? "On" : "Off");
767 } else {
768 if (on)
769 ret = regulator_enable(chip->vbus);
770 else
771 ret = regulator_disable(chip->vbus);
772 if (ret < 0) {
773 fusb302_log(chip, "cannot %s vbus regulator, ret=%d",
774 on ? "enable" : "disable", ret);
775 goto done;
776 }
777 chip->vbus_on = on;
778 fusb302_log(chip, "vbus := %s", on ? "On" : "Off");
779 }
780 if (chip->charge_on == charge)
781 fusb302_log(chip, "charge is already %s",
782 charge ? "On" : "Off");
783 else
784 chip->charge_on = charge;
785
786done:
787 mutex_unlock(&chip->lock);
788
789 return ret;
790}
791
792static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
793{
794 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
795 FUSB_REG_CONTROL0_TX_FLUSH);
796}
797
798static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
799{
800 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
801 FUSB_REG_CONTROL1_RX_FLUSH);
802}
803
804static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
805{
806 if (on)
807 return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
808 FUSB_REG_SWITCHES1_AUTO_GCRC);
809 return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
810 FUSB_REG_SWITCHES1_AUTO_GCRC);
811}
812
813static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
814{
815 int ret = 0;
816 u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
817 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
818 FUSB_REG_MASKA_HARDSENT |
819 FUSB_REG_MASKA_TX_SUCCESS |
820 FUSB_REG_MASKA_HARDRESET;
821 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
822
823 ret = on ?
824 fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
825 fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
826 if (ret < 0)
827 return ret;
828 ret = on ?
829 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
830 fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
831 if (ret < 0)
832 return ret;
833 ret = on ?
834 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
835 fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
836 return ret;
837}
838
839static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
840{
841 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
842 tcpc_dev);
843 int ret = 0;
844
845 mutex_lock(&chip->lock);
846 ret = fusb302_pd_rx_flush(chip);
847 if (ret < 0) {
848 fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret);
849 goto done;
850 }
851 ret = fusb302_pd_tx_flush(chip);
852 if (ret < 0) {
853 fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret);
854 goto done;
855 }
856 ret = fusb302_pd_set_auto_goodcrc(chip, on);
857 if (ret < 0) {
858 fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d",
859 on ? "on" : "off", ret);
860 goto done;
861 }
862 ret = fusb302_pd_set_interrupts(chip, on);
863 if (ret < 0) {
864 fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d",
865 on ? "on" : "off", ret);
866 goto done;
867 }
868 fusb302_log(chip, "pd := %s", on ? "on" : "off");
869done:
870 mutex_unlock(&chip->lock);
871
872 return ret;
873}
874
875static const char * const typec_role_name[] = {
876 [TYPEC_SINK] = "Sink",
877 [TYPEC_SOURCE] = "Source",
878};
879
880static const char * const typec_data_role_name[] = {
881 [TYPEC_DEVICE] = "Device",
882 [TYPEC_HOST] = "Host",
883};
884
885static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
886 enum typec_role pwr, enum typec_data_role data)
887{
888 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
889 tcpc_dev);
890 int ret = 0;
891 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
892 FUSB_REG_SWITCHES1_DATAROLE;
893 u8 switches1_data = 0x00;
894
895 mutex_lock(&chip->lock);
896 if (pwr == TYPEC_SOURCE)
897 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
898 if (data == TYPEC_HOST)
899 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
900 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
901 switches1_mask, switches1_data);
902 if (ret < 0) {
903 fusb302_log(chip, "unable to set pd header %s, %s, ret=%d",
904 typec_role_name[pwr], typec_data_role_name[data],
905 ret);
906 goto done;
907 }
908 fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr],
909 typec_data_role_name[data]);
910done:
911 mutex_unlock(&chip->lock);
912
913 return ret;
914}
915
916static int tcpm_start_toggling(struct tcpc_dev *dev,
917 enum typec_port_type port_type,
918 enum typec_cc_status cc)
919{
920 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
921 tcpc_dev);
922 enum toggling_mode mode = TOGGLING_MODE_OFF;
923 int ret = 0;
924
925 switch (port_type) {
926 case TYPEC_PORT_SRC:
927 mode = TOGGLING_MODE_SRC;
928 break;
929 case TYPEC_PORT_SNK:
930 mode = TOGGLING_MODE_SNK;
931 break;
932 case TYPEC_PORT_DRP:
933 mode = TOGGLING_MODE_DRP;
934 break;
935 }
936
937 mutex_lock(&chip->lock);
938 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
939 if (ret < 0) {
940 fusb302_log(chip, "unable to set src current %s, ret=%d",
941 typec_cc_status_name[cc], ret);
942 goto done;
943 }
944 ret = fusb302_set_toggling(chip, mode);
945 if (ret < 0) {
946 fusb302_log(chip,
947 "unable to start drp toggling, ret=%d", ret);
948 goto done;
949 }
950 fusb302_log(chip, "start drp toggling");
951done:
952 mutex_unlock(&chip->lock);
953
954 return ret;
955}
956
957static int fusb302_pd_send_message(struct fusb302_chip *chip,
958 const struct pd_message *msg)
959{
960 int ret = 0;
961 u8 buf[40];
962 u8 pos = 0;
963 int len;
964
965
966 buf[pos++] = FUSB302_TKN_SYNC1;
967 buf[pos++] = FUSB302_TKN_SYNC1;
968 buf[pos++] = FUSB302_TKN_SYNC1;
969 buf[pos++] = FUSB302_TKN_SYNC2;
970
971 len = pd_header_cnt_le(msg->header) * 4;
972
973 len += 2;
974 if (len > 0x1F) {
975 fusb302_log(chip,
976 "PD message too long %d (incl. header)", len);
977 return -EINVAL;
978 }
979
980 buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
981 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
982 pos += sizeof(msg->header);
983
984 len -= 2;
985 memcpy(&buf[pos], msg->payload, len);
986 pos += len;
987
988
989 buf[pos++] = FUSB302_TKN_JAMCRC;
990
991 buf[pos++] = FUSB302_TKN_EOP;
992
993 buf[pos++] = FUSB302_TKN_TXOFF;
994
995 buf[pos++] = FUSB302_TKN_TXON;
996
997 ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
998 if (ret < 0)
999 return ret;
1000 fusb302_log(chip, "sending PD message header: %x", msg->header);
1001 fusb302_log(chip, "sending PD message len: %d", len);
1002
1003 return ret;
1004}
1005
1006static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
1007{
1008 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
1009 FUSB_REG_CONTROL3_SEND_HARDRESET);
1010}
1011
1012static const char * const transmit_type_name[] = {
1013 [TCPC_TX_SOP] = "SOP",
1014 [TCPC_TX_SOP_PRIME] = "SOP'",
1015 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
1016 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
1017 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
1018 [TCPC_TX_HARD_RESET] = "HARD_RESET",
1019 [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
1020 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
1021};
1022
1023static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
1024 const struct pd_message *msg)
1025{
1026 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
1027 tcpc_dev);
1028 int ret = 0;
1029
1030 mutex_lock(&chip->lock);
1031 switch (type) {
1032 case TCPC_TX_SOP:
1033 ret = fusb302_pd_send_message(chip, msg);
1034 if (ret < 0)
1035 fusb302_log(chip,
1036 "cannot send PD message, ret=%d", ret);
1037 break;
1038 case TCPC_TX_HARD_RESET:
1039 ret = fusb302_pd_send_hardreset(chip);
1040 if (ret < 0)
1041 fusb302_log(chip,
1042 "cannot send hardreset, ret=%d", ret);
1043 break;
1044 default:
1045 fusb302_log(chip, "type %s not supported",
1046 transmit_type_name[type]);
1047 ret = -EINVAL;
1048 }
1049 mutex_unlock(&chip->lock);
1050
1051 return ret;
1052}
1053
1054static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
1055{
1056 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
1057 return TYPEC_CC_RP_3_0;
1058 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
1059 return TYPEC_CC_RP_1_5;
1060 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
1061 return TYPEC_CC_RP_DEF;
1062 return TYPEC_CC_OPEN;
1063}
1064
1065static void fusb302_bc_lvl_handler_work(struct work_struct *work)
1066{
1067 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1068 bc_lvl_handler.work);
1069 int ret = 0;
1070 u8 status0;
1071 u8 bc_lvl;
1072 enum typec_cc_status cc_status;
1073
1074 mutex_lock(&chip->lock);
1075 if (!chip->intr_bc_lvl) {
1076 fusb302_log(chip, "BC_LVL interrupt is turned off, abort");
1077 goto done;
1078 }
1079 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1080 if (ret < 0)
1081 goto done;
1082 fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0);
1083 if (status0 & FUSB_REG_STATUS0_ACTIVITY) {
1084 fusb302_log(chip, "CC activities detected, delay handling");
1085 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1086 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1087 goto done;
1088 }
1089 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1090 cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
1091 if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
1092 if (chip->cc1 != cc_status) {
1093 fusb302_log(chip, "cc1: %s -> %s",
1094 typec_cc_status_name[chip->cc1],
1095 typec_cc_status_name[cc_status]);
1096 chip->cc1 = cc_status;
1097 tcpm_cc_change(chip->tcpm_port);
1098 }
1099 } else {
1100 if (chip->cc2 != cc_status) {
1101 fusb302_log(chip, "cc2: %s -> %s",
1102 typec_cc_status_name[chip->cc2],
1103 typec_cc_status_name[cc_status]);
1104 chip->cc2 = cc_status;
1105 tcpm_cc_change(chip->tcpm_port);
1106 }
1107 }
1108
1109done:
1110 mutex_unlock(&chip->lock);
1111}
1112
1113#define PDO_FIXED_FLAGS \
1114 (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)
1115
1116static const u32 src_pdo[] = {
1117 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS),
1118};
1119
1120static const struct tcpc_config fusb302_tcpc_config = {
1121 .src_pdo = src_pdo,
1122 .nr_src_pdo = ARRAY_SIZE(src_pdo),
1123 .operating_snk_mw = 2500,
1124 .type = TYPEC_PORT_DRP,
1125 .data = TYPEC_PORT_DRD,
1126 .default_role = TYPEC_SINK,
1127 .alt_modes = NULL,
1128};
1129
1130static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
1131{
1132 fusb302_tcpc_dev->init = tcpm_init;
1133 fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
1134 fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
1135 fusb302_tcpc_dev->set_cc = tcpm_set_cc;
1136 fusb302_tcpc_dev->get_cc = tcpm_get_cc;
1137 fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
1138 fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
1139 fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
1140 fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
1141 fusb302_tcpc_dev->set_roles = tcpm_set_roles;
1142 fusb302_tcpc_dev->start_toggling = tcpm_start_toggling;
1143 fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
1144}
1145
1146static const char * const cc_polarity_name[] = {
1147 [TYPEC_POLARITY_CC1] = "Polarity_CC1",
1148 [TYPEC_POLARITY_CC2] = "Polarity_CC2",
1149};
1150
1151static int fusb302_set_cc_polarity_and_pull(struct fusb302_chip *chip,
1152 enum typec_cc_polarity cc_polarity,
1153 bool pull_up, bool pull_down)
1154{
1155 int ret = 0;
1156 u8 switches0_data = 0x00;
1157 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
1158 FUSB_REG_SWITCHES1_TXCC2_EN;
1159 u8 switches1_data = 0x00;
1160
1161 if (pull_down)
1162 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
1163 FUSB_REG_SWITCHES0_CC2_PD_EN;
1164
1165 if (cc_polarity == TYPEC_POLARITY_CC1) {
1166 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
1167 if (chip->vconn_on)
1168 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
1169 if (pull_up)
1170 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
1171 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
1172 } else {
1173 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
1174 if (chip->vconn_on)
1175 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
1176 if (pull_up)
1177 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
1178 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
1179 }
1180 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1181 if (ret < 0)
1182 return ret;
1183 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
1184 switches1_mask, switches1_data);
1185 if (ret < 0)
1186 return ret;
1187 chip->cc_polarity = cc_polarity;
1188
1189 return ret;
1190}
1191
1192static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
1193 u8 togdone_result)
1194{
1195 int ret = 0;
1196 u8 status0;
1197 u8 bc_lvl;
1198 enum typec_cc_polarity cc_polarity;
1199 enum typec_cc_status cc_status_active, cc1, cc2;
1200
1201
1202 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
1203 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1204 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true);
1205 if (ret < 0) {
1206 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1207 cc_polarity_name[cc_polarity], ret);
1208 return ret;
1209 }
1210
1211 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1212 if (ret < 0)
1213 return ret;
1214 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1215 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
1216
1217 if (cc_status_active == TYPEC_CC_OPEN) {
1218 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1219 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1220 return ret;
1221 }
1222
1223 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1224 cc_status_active : TYPEC_CC_OPEN;
1225 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1226 cc_status_active : TYPEC_CC_OPEN;
1227 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1228 chip->cc1 = cc1;
1229 chip->cc2 = cc2;
1230 tcpm_cc_change(chip->tcpm_port);
1231 }
1232
1233 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1234 if (ret < 0) {
1235 fusb302_log(chip,
1236 "cannot set toggling mode off, ret=%d", ret);
1237 return ret;
1238 }
1239
1240 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
1241 if (ret < 0) {
1242 fusb302_log(chip,
1243 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1244 return ret;
1245 }
1246 chip->intr_bc_lvl = true;
1247 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1248 typec_cc_status_name[cc1],
1249 typec_cc_status_name[cc2]);
1250
1251 return ret;
1252}
1253
1254
1255static int fusb302_get_src_cc_status(struct fusb302_chip *chip,
1256 enum typec_cc_polarity cc_polarity,
1257 enum typec_cc_status *cc)
1258{
1259 u8 ra_mda = ra_mda_value[chip->src_current_status];
1260 u8 rd_mda = rd_mda_value[chip->src_current_status];
1261 u8 switches0_data, status0;
1262 int ret;
1263
1264
1265 switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
1266 FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
1267 FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
1268 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1269 if (ret < 0)
1270 return ret;
1271
1272 fusb302_i2c_read(chip, FUSB_REG_SWITCHES0, &status0);
1273 fusb302_log(chip, "get_src_cc_status switches: 0x%0x", status0);
1274
1275
1276 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1277 if (ret < 0)
1278 return ret;
1279
1280 usleep_range(50, 100);
1281 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1282 if (ret < 0)
1283 return ret;
1284
1285 fusb302_log(chip, "get_src_cc_status rd_mda status0: 0x%0x", status0);
1286 if (status0 & FUSB_REG_STATUS0_COMP) {
1287 *cc = TYPEC_CC_OPEN;
1288 return 0;
1289 }
1290
1291
1292 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
1293 if (ret < 0)
1294 return ret;
1295
1296 usleep_range(50, 100);
1297 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1298 if (ret < 0)
1299 return ret;
1300
1301 fusb302_log(chip, "get_src_cc_status ra_mda status0: 0x%0x", status0);
1302 if (status0 & FUSB_REG_STATUS0_COMP)
1303 *cc = TYPEC_CC_RD;
1304 else
1305 *cc = TYPEC_CC_RA;
1306
1307 return 0;
1308}
1309
1310static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
1311 u8 togdone_result)
1312{
1313
1314
1315
1316
1317
1318
1319 int ret = 0;
1320 u8 rd_mda = rd_mda_value[chip->src_current_status];
1321 enum toggling_mode toggling_mode = chip->toggling_mode;
1322 enum typec_cc_polarity cc_polarity;
1323 enum typec_cc_status cc1, cc2;
1324
1325
1326
1327
1328
1329
1330 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1331 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1332 else
1333 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1334 if (ret < 0)
1335 return ret;
1336
1337 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1338 if (ret < 0) {
1339 fusb302_log(chip, "cannot set toggling mode off, ret=%d", ret);
1340 return ret;
1341 }
1342
1343 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1344 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1345 else
1346 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1347 if (ret < 0)
1348 return ret;
1349
1350
1351 if (cc1 == TYPEC_CC_RD &&
1352 (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
1353 cc_polarity = TYPEC_POLARITY_CC1;
1354 } else if (cc2 == TYPEC_CC_RD &&
1355 (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
1356 cc_polarity = TYPEC_POLARITY_CC2;
1357 } else {
1358 fusb302_log(chip, "unexpected CC status cc1=%s, cc2=%s, restarting toggling",
1359 typec_cc_status_name[cc1],
1360 typec_cc_status_name[cc2]);
1361 return fusb302_set_toggling(chip, toggling_mode);
1362 }
1363
1364 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false);
1365 if (ret < 0) {
1366 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1367 cc_polarity_name[cc_polarity], ret);
1368 return ret;
1369 }
1370
1371 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1372 chip->cc1 = cc1;
1373 chip->cc2 = cc2;
1374 tcpm_cc_change(chip->tcpm_port);
1375 }
1376
1377 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1378 if (ret < 0)
1379 return ret;
1380
1381 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
1382 FUSB_REG_MASK_COMP_CHNG);
1383 if (ret < 0) {
1384 fusb302_log(chip,
1385 "cannot unmask comp_chng interrupt, ret=%d", ret);
1386 return ret;
1387 }
1388 chip->intr_comp_chng = true;
1389 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1390 typec_cc_status_name[cc1],
1391 typec_cc_status_name[cc2]);
1392
1393 return ret;
1394}
1395
1396static int fusb302_handle_togdone(struct fusb302_chip *chip)
1397{
1398 int ret = 0;
1399 u8 status1a;
1400 u8 togdone_result;
1401
1402 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
1403 if (ret < 0)
1404 return ret;
1405 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1406 FUSB_REG_STATUS1A_TOGSS_MASK;
1407 switch (togdone_result) {
1408 case FUSB_REG_STATUS1A_TOGSS_SNK1:
1409 case FUSB_REG_STATUS1A_TOGSS_SNK2:
1410 return fusb302_handle_togdone_snk(chip, togdone_result);
1411 case FUSB_REG_STATUS1A_TOGSS_SRC1:
1412 case FUSB_REG_STATUS1A_TOGSS_SRC2:
1413 return fusb302_handle_togdone_src(chip, togdone_result);
1414 case FUSB_REG_STATUS1A_TOGSS_AA:
1415
1416 fusb302_log(chip, "AudioAccessory not supported");
1417 fusb302_set_toggling(chip, chip->toggling_mode);
1418 break;
1419 default:
1420 fusb302_log(chip, "TOGDONE with an invalid state: %d",
1421 togdone_result);
1422 fusb302_set_toggling(chip, chip->toggling_mode);
1423 break;
1424 }
1425 return ret;
1426}
1427
1428static int fusb302_pd_reset(struct fusb302_chip *chip)
1429{
1430 return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
1431 FUSB_REG_RESET_PD_RESET);
1432}
1433
1434static int fusb302_pd_read_message(struct fusb302_chip *chip,
1435 struct pd_message *msg)
1436{
1437 int ret = 0;
1438 u8 token;
1439 u8 crc[4];
1440 int len;
1441
1442
1443 ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
1444 if (ret < 0)
1445 return ret;
1446 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
1447 (u8 *)&msg->header);
1448 if (ret < 0)
1449 return ret;
1450 len = pd_header_cnt_le(msg->header) * 4;
1451
1452 if (len > PD_MAX_PAYLOAD * 4) {
1453 fusb302_log(chip, "PD message too long %d", len);
1454 return -EINVAL;
1455 }
1456 if (len > 0) {
1457 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
1458 (u8 *)msg->payload);
1459 if (ret < 0)
1460 return ret;
1461 }
1462
1463 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
1464 if (ret < 0)
1465 return ret;
1466 fusb302_log(chip, "PD message header: %x", msg->header);
1467 fusb302_log(chip, "PD message len: %d", len);
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479 if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1480 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1481 else
1482 tcpm_pd_receive(chip->tcpm_port, msg);
1483
1484 return ret;
1485}
1486
1487static irqreturn_t fusb302_irq_intn(int irq, void *dev_id)
1488{
1489 struct fusb302_chip *chip = dev_id;
1490 unsigned long flags;
1491
1492
1493 disable_irq_nosync(chip->gpio_int_n_irq);
1494
1495 spin_lock_irqsave(&chip->irq_lock, flags);
1496 if (chip->irq_suspended)
1497 chip->irq_while_suspended = true;
1498 else
1499 schedule_work(&chip->irq_work);
1500 spin_unlock_irqrestore(&chip->irq_lock, flags);
1501
1502 return IRQ_HANDLED;
1503}
1504
1505static void fusb302_irq_work(struct work_struct *work)
1506{
1507 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1508 irq_work);
1509 int ret = 0;
1510 u8 interrupt;
1511 u8 interrupta;
1512 u8 interruptb;
1513 u8 status0;
1514 bool vbus_present;
1515 bool comp_result;
1516 bool intr_togdone;
1517 bool intr_bc_lvl;
1518 bool intr_comp_chng;
1519 struct pd_message pd_msg;
1520
1521 mutex_lock(&chip->lock);
1522
1523 intr_togdone = chip->intr_togdone;
1524 intr_bc_lvl = chip->intr_bc_lvl;
1525 intr_comp_chng = chip->intr_comp_chng;
1526
1527 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
1528 if (ret < 0)
1529 goto done;
1530 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
1531 if (ret < 0)
1532 goto done;
1533 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
1534 if (ret < 0)
1535 goto done;
1536 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1537 if (ret < 0)
1538 goto done;
1539 fusb302_log(chip,
1540 "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x",
1541 interrupt, interrupta, interruptb, status0);
1542
1543 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1544 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1545 fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s",
1546 vbus_present ? "On" : "Off");
1547 if (vbus_present != chip->vbus_present) {
1548 chip->vbus_present = vbus_present;
1549 tcpm_vbus_change(chip->tcpm_port);
1550 }
1551 }
1552
1553 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1554 fusb302_log(chip, "IRQ: TOGDONE");
1555 ret = fusb302_handle_togdone(chip);
1556 if (ret < 0) {
1557 fusb302_log(chip,
1558 "handle togdone error, ret=%d", ret);
1559 goto done;
1560 }
1561 }
1562
1563 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1564 fusb302_log(chip, "IRQ: BC_LVL, handler pending");
1565
1566
1567
1568
1569
1570 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1571 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1572 }
1573
1574 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1575 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1576 fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s",
1577 comp_result ? "true" : "false");
1578 if (comp_result) {
1579
1580 chip->cc1 = TYPEC_CC_OPEN;
1581 chip->cc2 = TYPEC_CC_OPEN;
1582 tcpm_cc_change(chip->tcpm_port);
1583 }
1584 }
1585
1586 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1587 fusb302_log(chip, "IRQ: PD collision");
1588 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1589 }
1590
1591 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1592 fusb302_log(chip, "IRQ: PD retry failed");
1593 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1594 }
1595
1596 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1597 fusb302_log(chip, "IRQ: PD hardreset sent");
1598 ret = fusb302_pd_reset(chip);
1599 if (ret < 0) {
1600 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1601 goto done;
1602 }
1603 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1604 }
1605
1606 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1607 fusb302_log(chip, "IRQ: PD tx success");
1608 ret = fusb302_pd_read_message(chip, &pd_msg);
1609 if (ret < 0) {
1610 fusb302_log(chip,
1611 "cannot read in PD message, ret=%d", ret);
1612 goto done;
1613 }
1614 }
1615
1616 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1617 fusb302_log(chip, "IRQ: PD received hardreset");
1618 ret = fusb302_pd_reset(chip);
1619 if (ret < 0) {
1620 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1621 goto done;
1622 }
1623 tcpm_pd_hard_reset(chip->tcpm_port);
1624 }
1625
1626 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1627 fusb302_log(chip, "IRQ: PD sent good CRC");
1628 ret = fusb302_pd_read_message(chip, &pd_msg);
1629 if (ret < 0) {
1630 fusb302_log(chip,
1631 "cannot read in PD message, ret=%d", ret);
1632 goto done;
1633 }
1634 }
1635done:
1636 mutex_unlock(&chip->lock);
1637 enable_irq(chip->gpio_int_n_irq);
1638}
1639
1640static int init_gpio(struct fusb302_chip *chip)
1641{
1642 struct device_node *node;
1643 int ret = 0;
1644
1645 node = chip->dev->of_node;
1646 chip->gpio_int_n = of_get_named_gpio(node, "fcs,int_n", 0);
1647 if (!gpio_is_valid(chip->gpio_int_n)) {
1648 ret = chip->gpio_int_n;
1649 dev_err(chip->dev, "cannot get named GPIO Int_N, ret=%d", ret);
1650 return ret;
1651 }
1652 ret = devm_gpio_request(chip->dev, chip->gpio_int_n, "fcs,int_n");
1653 if (ret < 0) {
1654 dev_err(chip->dev, "cannot request GPIO Int_N, ret=%d", ret);
1655 return ret;
1656 }
1657 ret = gpio_direction_input(chip->gpio_int_n);
1658 if (ret < 0) {
1659 dev_err(chip->dev,
1660 "cannot set GPIO Int_N to input, ret=%d", ret);
1661 return ret;
1662 }
1663 ret = gpio_to_irq(chip->gpio_int_n);
1664 if (ret < 0) {
1665 dev_err(chip->dev,
1666 "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1667 return ret;
1668 }
1669 chip->gpio_int_n_irq = ret;
1670 return 0;
1671}
1672
1673static int fusb302_composite_snk_pdo_array(struct fusb302_chip *chip)
1674{
1675 struct device *dev = chip->dev;
1676 u32 max_uv, max_ua;
1677
1678 chip->snk_pdo[0] = PDO_FIXED(5000, 400, PDO_FIXED_FLAGS);
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688 if (device_property_read_u32(dev, "fcs,max-sink-microvolt", &max_uv) ||
1689 device_property_read_u32(dev, "fcs,max-sink-microamp", &max_ua))
1690 return 1;
1691
1692 chip->snk_pdo[1] = PDO_VAR(5000, max_uv / 1000, max_ua / 1000);
1693 return 2;
1694}
1695
1696static int fusb302_probe(struct i2c_client *client,
1697 const struct i2c_device_id *id)
1698{
1699 struct fusb302_chip *chip;
1700 struct i2c_adapter *adapter = client->adapter;
1701 struct device *dev = &client->dev;
1702 const char *name;
1703 int ret = 0;
1704 u32 v;
1705
1706 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1707 dev_err(&client->dev,
1708 "I2C/SMBus block functionality not supported!\n");
1709 return -ENODEV;
1710 }
1711 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1712 if (!chip)
1713 return -ENOMEM;
1714
1715 chip->i2c_client = client;
1716 chip->dev = &client->dev;
1717 chip->tcpc_config = fusb302_tcpc_config;
1718 chip->tcpc_dev.config = &chip->tcpc_config;
1719 mutex_init(&chip->lock);
1720
1721 chip->tcpc_dev.fwnode =
1722 device_get_named_child_node(dev, "connector");
1723
1724 if (!device_property_read_u32(dev, "fcs,operating-sink-microwatt", &v))
1725 chip->tcpc_config.operating_snk_mw = v / 1000;
1726
1727
1728 chip->tcpc_config.nr_snk_pdo = fusb302_composite_snk_pdo_array(chip);
1729 chip->tcpc_config.snk_pdo = chip->snk_pdo;
1730
1731
1732
1733
1734
1735
1736
1737
1738 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) {
1739 chip->extcon = extcon_get_extcon_dev(name);
1740 if (!chip->extcon)
1741 return -EPROBE_DEFER;
1742 }
1743
1744 chip->vbus = devm_regulator_get(chip->dev, "vbus");
1745 if (IS_ERR(chip->vbus))
1746 return PTR_ERR(chip->vbus);
1747
1748 chip->wq = create_singlethread_workqueue(dev_name(chip->dev));
1749 if (!chip->wq)
1750 return -ENOMEM;
1751
1752 spin_lock_init(&chip->irq_lock);
1753 INIT_WORK(&chip->irq_work, fusb302_irq_work);
1754 INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work);
1755 init_tcpc_dev(&chip->tcpc_dev);
1756
1757 if (client->irq) {
1758 chip->gpio_int_n_irq = client->irq;
1759 } else {
1760 ret = init_gpio(chip);
1761 if (ret < 0)
1762 goto destroy_workqueue;
1763 }
1764
1765 chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev);
1766 if (IS_ERR(chip->tcpm_port)) {
1767 ret = PTR_ERR(chip->tcpm_port);
1768 if (ret != -EPROBE_DEFER)
1769 dev_err(dev, "cannot register tcpm port, ret=%d", ret);
1770 goto destroy_workqueue;
1771 }
1772
1773 ret = request_irq(chip->gpio_int_n_irq, fusb302_irq_intn,
1774 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
1775 "fsc_interrupt_int_n", chip);
1776 if (ret < 0) {
1777 dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1778 goto tcpm_unregister_port;
1779 }
1780 enable_irq_wake(chip->gpio_int_n_irq);
1781 fusb302_debugfs_init(chip);
1782 i2c_set_clientdata(client, chip);
1783
1784 return ret;
1785
1786tcpm_unregister_port:
1787 tcpm_unregister_port(chip->tcpm_port);
1788destroy_workqueue:
1789 destroy_workqueue(chip->wq);
1790
1791 return ret;
1792}
1793
1794static int fusb302_remove(struct i2c_client *client)
1795{
1796 struct fusb302_chip *chip = i2c_get_clientdata(client);
1797
1798 disable_irq_wake(chip->gpio_int_n_irq);
1799 free_irq(chip->gpio_int_n_irq, chip);
1800 cancel_work_sync(&chip->irq_work);
1801 cancel_delayed_work_sync(&chip->bc_lvl_handler);
1802 tcpm_unregister_port(chip->tcpm_port);
1803 destroy_workqueue(chip->wq);
1804 fusb302_debugfs_exit(chip);
1805
1806 return 0;
1807}
1808
1809static int fusb302_pm_suspend(struct device *dev)
1810{
1811 struct fusb302_chip *chip = dev->driver_data;
1812 unsigned long flags;
1813
1814 spin_lock_irqsave(&chip->irq_lock, flags);
1815 chip->irq_suspended = true;
1816 spin_unlock_irqrestore(&chip->irq_lock, flags);
1817
1818
1819 flush_work(&chip->irq_work);
1820 return 0;
1821}
1822
1823static int fusb302_pm_resume(struct device *dev)
1824{
1825 struct fusb302_chip *chip = dev->driver_data;
1826 unsigned long flags;
1827
1828 spin_lock_irqsave(&chip->irq_lock, flags);
1829 if (chip->irq_while_suspended) {
1830 schedule_work(&chip->irq_work);
1831 chip->irq_while_suspended = false;
1832 }
1833 chip->irq_suspended = false;
1834 spin_unlock_irqrestore(&chip->irq_lock, flags);
1835
1836 return 0;
1837}
1838
1839static const struct of_device_id fusb302_dt_match[] = {
1840 {.compatible = "fcs,fusb302"},
1841 {},
1842};
1843MODULE_DEVICE_TABLE(of, fusb302_dt_match);
1844
1845static const struct i2c_device_id fusb302_i2c_device_id[] = {
1846 {"typec_fusb302", 0},
1847 {},
1848};
1849MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id);
1850
1851static const struct dev_pm_ops fusb302_pm_ops = {
1852 .suspend = fusb302_pm_suspend,
1853 .resume = fusb302_pm_resume,
1854};
1855
1856static struct i2c_driver fusb302_driver = {
1857 .driver = {
1858 .name = "typec_fusb302",
1859 .pm = &fusb302_pm_ops,
1860 .of_match_table = of_match_ptr(fusb302_dt_match),
1861 },
1862 .probe = fusb302_probe,
1863 .remove = fusb302_remove,
1864 .id_table = fusb302_i2c_device_id,
1865};
1866module_i2c_driver(fusb302_driver);
1867
1868MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>");
1869MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver");
1870MODULE_LICENSE("GPL");
1871
