linux/drivers/video/fbdev/controlfb.c
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   1/*
   2 *  controlfb.c -- frame buffer device for the PowerMac 'control' display
   3 *
   4 *  Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
   5 *  Copyright (C) 1998 Dan Jacobowitz
   6 *  Copyright (C) 2001 Takashi Oe
   7 *
   8 *  Mmap code by Michel Lanners <mlan@cpu.lu>
   9 *
  10 *  Frame buffer structure from:
  11 *    drivers/video/chipsfb.c -- frame buffer device for
  12 *    Chips & Technologies 65550 chip.
  13 *
  14 *    Copyright (C) 1998 Paul Mackerras
  15 *
  16 *    This file is derived from the Powermac "chips" driver:
  17 *    Copyright (C) 1997 Fabio Riccardi.
  18 *    And from the frame buffer device for Open Firmware-initialized devices:
  19 *    Copyright (C) 1997 Geert Uytterhoeven.
  20 *
  21 *  Hardware information from:
  22 *    control.c: Console support for PowerMac "control" display adaptor.
  23 *    Copyright (C) 1996 Paul Mackerras
  24 *
  25 *  Updated to 2.5 framebuffer API by Ben Herrenschmidt
  26 *  <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
  27 *  and James Simmons <jsimmons@infradead.org>.
  28 *
  29 *  This file is subject to the terms and conditions of the GNU General Public
  30 *  License. See the file COPYING in the main directory of this archive for
  31 *  more details.
  32 */
  33
  34#include <linux/module.h>
  35#include <linux/kernel.h>
  36#include <linux/errno.h>
  37#include <linux/string.h>
  38#include <linux/mm.h>
  39#include <linux/slab.h>
  40#include <linux/vmalloc.h>
  41#include <linux/delay.h>
  42#include <linux/interrupt.h>
  43#include <linux/of.h>
  44#include <linux/of_address.h>
  45#include <linux/fb.h>
  46#include <linux/init.h>
  47#include <linux/pci.h>
  48#include <linux/nvram.h>
  49#include <linux/adb.h>
  50#include <linux/cuda.h>
  51#include <asm/prom.h>
  52#include <asm/btext.h>
  53
  54#include "macmodes.h"
  55#include "controlfb.h"
  56
  57struct fb_par_control {
  58        int     vmode, cmode;
  59        int     xres, yres;
  60        int     vxres, vyres;
  61        int     xoffset, yoffset;
  62        int     pitch;
  63        struct control_regvals  regvals;
  64        unsigned long sync;
  65        unsigned char ctrl;
  66};
  67
  68#define DIRTY(z) ((x)->z != (y)->z)
  69#define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
  70static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
  71{
  72        int i, results;
  73
  74        results = 1;
  75        for (i = 0; i < 3; i++)
  76                results &= !DIRTY(regvals.clock_params[i]);
  77        if (!results)
  78                return 0;
  79        for (i = 0; i < 16; i++)
  80                results &= !DIRTY(regvals.regs[i]);
  81        if (!results)
  82                return 0;
  83        return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
  84                && !DIRTY(vxres) && !DIRTY(vyres));
  85}
  86static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
  87{
  88        return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
  89                && !DIRTY(yres) && !DIRTY(xres_virtual)
  90                && !DIRTY(yres_virtual)
  91                && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
  92}
  93
  94struct fb_info_control {
  95        struct fb_info          info;
  96        struct fb_par_control   par;
  97        u32                     pseudo_palette[16];
  98                
  99        struct cmap_regs        __iomem *cmap_regs;
 100        unsigned long           cmap_regs_phys;
 101        
 102        struct control_regs     __iomem *control_regs;
 103        unsigned long           control_regs_phys;
 104        unsigned long           control_regs_size;
 105        
 106        __u8                    __iomem *frame_buffer;
 107        unsigned long           frame_buffer_phys;
 108        unsigned long           fb_orig_base;
 109        unsigned long           fb_orig_size;
 110
 111        int                     control_use_bank2;
 112        unsigned long           total_vram;
 113        unsigned char           vram_attr;
 114};
 115
 116/* control register access macro */
 117#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
 118
 119
 120/******************** Prototypes for exported functions ********************/
 121/*
 122 * struct fb_ops
 123 */
 124static int controlfb_pan_display(struct fb_var_screeninfo *var,
 125        struct fb_info *info);
 126static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 127        u_int transp, struct fb_info *info);
 128static int controlfb_blank(int blank_mode, struct fb_info *info);
 129static int controlfb_mmap(struct fb_info *info,
 130        struct vm_area_struct *vma);
 131static int controlfb_set_par (struct fb_info *info);
 132static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
 133
 134/******************** Prototypes for internal functions **********************/
 135
 136static void set_control_clock(unsigned char *params);
 137static int init_control(struct fb_info_control *p);
 138static void control_set_hardware(struct fb_info_control *p,
 139        struct fb_par_control *par);
 140static int control_of_init(struct device_node *dp);
 141static void find_vram_size(struct fb_info_control *p);
 142static int read_control_sense(struct fb_info_control *p);
 143static int calc_clock_params(unsigned long clk, unsigned char *param);
 144static int control_var_to_par(struct fb_var_screeninfo *var,
 145        struct fb_par_control *par, const struct fb_info *fb_info);
 146static inline void control_par_to_var(struct fb_par_control *par,
 147        struct fb_var_screeninfo *var);
 148static void control_init_info(struct fb_info *info, struct fb_info_control *p);
 149static void control_cleanup(void);
 150
 151
 152/************************** Internal variables *******************************/
 153
 154static struct fb_info_control *control_fb;
 155
 156static int default_vmode __initdata = VMODE_NVRAM;
 157static int default_cmode __initdata = CMODE_NVRAM;
 158
 159
 160static struct fb_ops controlfb_ops = {
 161        .owner          = THIS_MODULE,
 162        .fb_check_var   = controlfb_check_var,
 163        .fb_set_par     = controlfb_set_par,
 164        .fb_setcolreg   = controlfb_setcolreg,
 165        .fb_pan_display = controlfb_pan_display,
 166        .fb_blank       = controlfb_blank,
 167        .fb_mmap        = controlfb_mmap,
 168        .fb_fillrect    = cfb_fillrect,
 169        .fb_copyarea    = cfb_copyarea,
 170        .fb_imageblit   = cfb_imageblit,
 171};
 172
 173
 174/********************  The functions for controlfb_ops ********************/
 175
 176#ifdef MODULE
 177MODULE_LICENSE("GPL");
 178
 179int init_module(void)
 180{
 181        struct device_node *dp;
 182        int ret = -ENXIO;
 183
 184        dp = of_find_node_by_name(NULL, "control");
 185        if (dp && !control_of_init(dp))
 186                ret = 0;
 187        of_node_put(dp);
 188
 189        return ret;
 190}
 191
 192void cleanup_module(void)
 193{
 194        control_cleanup();
 195}
 196#endif
 197
 198/*
 199 * Checks a var structure
 200 */
 201static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
 202{
 203        struct fb_par_control par;
 204        int err;
 205
 206        err = control_var_to_par(var, &par, info);
 207        if (err)
 208                return err;     
 209        control_par_to_var(&par, var);
 210
 211        return 0;
 212}
 213
 214/*
 215 * Applies current var to display
 216 */
 217static int controlfb_set_par (struct fb_info *info)
 218{
 219        struct fb_info_control *p =
 220                container_of(info, struct fb_info_control, info);
 221        struct fb_par_control par;
 222        int err;
 223
 224        if((err = control_var_to_par(&info->var, &par, info))) {
 225                printk (KERN_ERR "controlfb_set_par: error calling"
 226                                 " control_var_to_par: %d.\n", err);
 227                return err;
 228        }
 229        
 230        control_set_hardware(p, &par);
 231
 232        info->fix.visual = (p->par.cmode == CMODE_8) ?
 233                FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
 234        info->fix.line_length = p->par.pitch;
 235        info->fix.xpanstep = 32 >> p->par.cmode;
 236        info->fix.ypanstep = 1;
 237
 238        return 0;
 239}
 240
 241/*
 242 * Set screen start address according to var offset values
 243 */
 244static inline void set_screen_start(int xoffset, int yoffset,
 245        struct fb_info_control *p)
 246{
 247        struct fb_par_control *par = &p->par;
 248
 249        par->xoffset = xoffset;
 250        par->yoffset = yoffset;
 251        out_le32(CNTRL_REG(p,start_addr),
 252                 par->yoffset * par->pitch + (par->xoffset << par->cmode));
 253}
 254
 255
 256static int controlfb_pan_display(struct fb_var_screeninfo *var,
 257                                 struct fb_info *info)
 258{
 259        unsigned int xoffset, hstep;
 260        struct fb_info_control *p =
 261                container_of(info, struct fb_info_control, info);
 262        struct fb_par_control *par = &p->par;
 263
 264        /*
 265         * make sure start addr will be 32-byte aligned
 266         */
 267        hstep = 0x1f >> par->cmode;
 268        xoffset = (var->xoffset + hstep) & ~hstep;
 269
 270        if (xoffset+par->xres > par->vxres ||
 271            var->yoffset+par->yres > par->vyres)
 272                return -EINVAL;
 273
 274        set_screen_start(xoffset, var->yoffset, p);
 275
 276        return 0;
 277}
 278
 279
 280/*
 281 * Private mmap since we want to have a different caching on the framebuffer
 282 * for controlfb.
 283 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
 284 */
 285static int controlfb_mmap(struct fb_info *info,
 286                       struct vm_area_struct *vma)
 287{
 288        unsigned long mmio_pgoff;
 289        unsigned long start;
 290        u32 len;
 291
 292        start = info->fix.smem_start;
 293        len = info->fix.smem_len;
 294        mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT;
 295        if (vma->vm_pgoff >= mmio_pgoff) {
 296                if (info->var.accel_flags)
 297                        return -EINVAL;
 298                vma->vm_pgoff -= mmio_pgoff;
 299                start = info->fix.mmio_start;
 300                len = info->fix.mmio_len;
 301                vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 302        } else {
 303                /* framebuffer */
 304                vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot);
 305        }
 306
 307        return vm_iomap_memory(vma, start, len);
 308}
 309
 310static int controlfb_blank(int blank_mode, struct fb_info *info)
 311{
 312        struct fb_info_control *p =
 313                container_of(info, struct fb_info_control, info);
 314        unsigned ctrl;
 315
 316        ctrl = le32_to_cpup(CNTRL_REG(p,ctrl));
 317        if (blank_mode > 0)
 318                switch (blank_mode) {
 319                case FB_BLANK_VSYNC_SUSPEND:
 320                        ctrl &= ~3;
 321                        break;
 322                case FB_BLANK_HSYNC_SUSPEND:
 323                        ctrl &= ~0x30;
 324                        break;
 325                case FB_BLANK_POWERDOWN:
 326                        ctrl &= ~0x33;
 327                        /* fall through */
 328                case FB_BLANK_NORMAL:
 329                        ctrl |= 0x400;
 330                        break;
 331                default:
 332                        break;
 333                }
 334        else {
 335                ctrl &= ~0x400;
 336                ctrl |= 0x33;
 337        }
 338        out_le32(CNTRL_REG(p,ctrl), ctrl);
 339
 340        return 0;
 341}
 342
 343static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 344                             u_int transp, struct fb_info *info)
 345{
 346        struct fb_info_control *p =
 347                container_of(info, struct fb_info_control, info);
 348        __u8 r, g, b;
 349
 350        if (regno > 255)
 351                return 1;
 352
 353        r = red >> 8;
 354        g = green >> 8;
 355        b = blue >> 8;
 356
 357        out_8(&p->cmap_regs->addr, regno);      /* tell clut what addr to fill  */
 358        out_8(&p->cmap_regs->lut, r);           /* send one color channel at    */
 359        out_8(&p->cmap_regs->lut, g);           /* a time...                    */
 360        out_8(&p->cmap_regs->lut, b);
 361
 362        if (regno < 16) {
 363                int i;
 364                switch (p->par.cmode) {
 365                case CMODE_16:
 366                        p->pseudo_palette[regno] =
 367                            (regno << 10) | (regno << 5) | regno;
 368                        break;
 369                case CMODE_32:
 370                        i = (regno << 8) | regno;
 371                        p->pseudo_palette[regno] = (i << 16) | i;
 372                        break;
 373                }
 374        }
 375
 376        return 0;
 377}
 378
 379
 380/********************  End of controlfb_ops implementation  ******************/
 381
 382
 383
 384static void set_control_clock(unsigned char *params)
 385{
 386#ifdef CONFIG_ADB_CUDA
 387        struct adb_request req;
 388        int i;
 389
 390        for (i = 0; i < 3; ++i) {
 391                cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
 392                             0x50, i + 1, params[i]);
 393                while (!req.complete)
 394                        cuda_poll();
 395        }
 396#endif  
 397}
 398
 399
 400/*
 401 * finish off the driver initialization and register
 402 */
 403static int __init init_control(struct fb_info_control *p)
 404{
 405        int full, sense, vmode, cmode, vyres;
 406        struct fb_var_screeninfo var;
 407        int rc;
 408        
 409        printk(KERN_INFO "controlfb: ");
 410
 411        full = p->total_vram == 0x400000;
 412
 413        /* Try to pick a video mode out of NVRAM if we have one. */
 414        cmode = default_cmode;
 415        if (IS_REACHABLE(CONFIG_NVRAM) && cmode == CMODE_NVRAM)
 416                cmode = nvram_read_byte(NV_CMODE);
 417        if (cmode < CMODE_8 || cmode > CMODE_32)
 418                cmode = CMODE_8;
 419
 420        vmode = default_vmode;
 421        if (IS_REACHABLE(CONFIG_NVRAM) && vmode == VMODE_NVRAM)
 422                vmode = nvram_read_byte(NV_VMODE);
 423        if (vmode < 1 || vmode > VMODE_MAX ||
 424            control_mac_modes[vmode - 1].m[full] < cmode) {
 425                sense = read_control_sense(p);
 426                printk(KERN_CONT "Monitor sense value = 0x%x, ", sense);
 427                vmode = mac_map_monitor_sense(sense);
 428                if (control_mac_modes[vmode - 1].m[full] < 0)
 429                        vmode = VMODE_640_480_60;
 430                cmode = min(cmode, control_mac_modes[vmode - 1].m[full]);
 431        }
 432
 433        /* Initialize info structure */
 434        control_init_info(&p->info, p);
 435
 436        /* Setup default var */
 437        if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
 438                /* This shouldn't happen! */
 439                printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
 440try_again:
 441                vmode = VMODE_640_480_60;
 442                cmode = CMODE_8;
 443                if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
 444                        printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
 445                        return -ENXIO;
 446                }
 447                printk(KERN_INFO "controlfb: ");
 448        }
 449        printk("using video mode %d and color mode %d.\n", vmode, cmode);
 450
 451        vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
 452        if (vyres > var.yres)
 453                var.yres_virtual = vyres;
 454
 455        /* Apply default var */
 456        var.activate = FB_ACTIVATE_NOW;
 457        rc = fb_set_var(&p->info, &var);
 458        if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
 459                goto try_again;
 460
 461        /* Register with fbdev layer */
 462        if (register_framebuffer(&p->info) < 0)
 463                return -ENXIO;
 464
 465        fb_info(&p->info, "control display adapter\n");
 466
 467        return 0;
 468}
 469
 470#define RADACAL_WRITE(a,d) \
 471        out_8(&p->cmap_regs->addr, (a)); \
 472        out_8(&p->cmap_regs->dat,   (d))
 473
 474/* Now how about actually saying, Make it so! */
 475/* Some things in here probably don't need to be done each time. */
 476static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
 477{
 478        struct control_regvals  *r;
 479        volatile struct preg    __iomem *rp;
 480        int                     i, cmode;
 481
 482        if (PAR_EQUAL(&p->par, par)) {
 483                /*
 484                 * check if only xoffset or yoffset differs.
 485                 * this prevents flickers in typical VT switch case.
 486                 */
 487                if (p->par.xoffset != par->xoffset ||
 488                    p->par.yoffset != par->yoffset)
 489                        set_screen_start(par->xoffset, par->yoffset, p);
 490                        
 491                return;
 492        }
 493        
 494        p->par = *par;
 495        cmode = p->par.cmode;
 496        r = &par->regvals;
 497        
 498        /* Turn off display */
 499        out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
 500        
 501        set_control_clock(r->clock_params);
 502        
 503        RADACAL_WRITE(0x20, r->radacal_ctrl);
 504        RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
 505        RADACAL_WRITE(0x10, 0);
 506        RADACAL_WRITE(0x11, 0);
 507
 508        rp = &p->control_regs->vswin;
 509        for (i = 0; i < 16; ++i, ++rp)
 510                out_le32(&rp->r, r->regs[i]);
 511        
 512        out_le32(CNTRL_REG(p,pitch), par->pitch);
 513        out_le32(CNTRL_REG(p,mode), r->mode);
 514        out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
 515        out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
 516                 + (par->xoffset << cmode));
 517        out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
 518        out_le32(CNTRL_REG(p,intr_ena), 0);
 519
 520        /* Turn on display */
 521        out_le32(CNTRL_REG(p,ctrl), par->ctrl);
 522
 523#ifdef CONFIG_BOOTX_TEXT
 524        btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
 525                             p->par.xres, p->par.yres,
 526                             (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
 527                             p->par.pitch);
 528#endif /* CONFIG_BOOTX_TEXT */
 529}
 530
 531
 532/*
 533 * Parse user specified options (`video=controlfb:')
 534 */
 535static void __init control_setup(char *options)
 536{
 537        char *this_opt;
 538
 539        if (!options || !*options)
 540                return;
 541
 542        while ((this_opt = strsep(&options, ",")) != NULL) {
 543                if (!strncmp(this_opt, "vmode:", 6)) {
 544                        int vmode = simple_strtoul(this_opt+6, NULL, 0);
 545                        if (vmode > 0 && vmode <= VMODE_MAX &&
 546                            control_mac_modes[vmode - 1].m[1] >= 0)
 547                                default_vmode = vmode;
 548                } else if (!strncmp(this_opt, "cmode:", 6)) {
 549                        int depth = simple_strtoul(this_opt+6, NULL, 0);
 550                        switch (depth) {
 551                         case CMODE_8:
 552                         case CMODE_16:
 553                         case CMODE_32:
 554                                default_cmode = depth;
 555                                break;
 556                         case 8:
 557                                default_cmode = CMODE_8;
 558                                break;
 559                         case 15:
 560                         case 16:
 561                                default_cmode = CMODE_16;
 562                                break;
 563                         case 24:
 564                         case 32:
 565                                default_cmode = CMODE_32;
 566                                break;
 567                        }
 568                }
 569        }
 570}
 571
 572static int __init control_init(void)
 573{
 574        struct device_node *dp;
 575        char *option = NULL;
 576        int ret = -ENXIO;
 577
 578        if (fb_get_options("controlfb", &option))
 579                return -ENODEV;
 580        control_setup(option);
 581
 582        dp = of_find_node_by_name(NULL, "control");
 583        if (dp && !control_of_init(dp))
 584                ret = 0;
 585        of_node_put(dp);
 586
 587        return ret;
 588}
 589
 590module_init(control_init);
 591
 592/* Work out which banks of VRAM we have installed. */
 593/* danj: I guess the card just ignores writes to nonexistant VRAM... */
 594
 595static void __init find_vram_size(struct fb_info_control *p)
 596{
 597        int bank1, bank2;
 598
 599        /*
 600         * Set VRAM in 2MB (bank 1) mode
 601         * VRAM Bank 2 will be accessible through offset 0x600000 if present
 602         * and VRAM Bank 1 will not respond at that offset even if present
 603         */
 604        out_le32(CNTRL_REG(p,vram_attr), 0x31);
 605
 606        out_8(&p->frame_buffer[0x600000], 0xb3);
 607        out_8(&p->frame_buffer[0x600001], 0x71);
 608        asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
 609                                        : "memory" );
 610        mb();
 611        asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
 612                                        : "memory" );
 613        mb();
 614
 615        bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
 616                && (in_8(&p->frame_buffer[0x600001]) == 0x71);
 617
 618        /*
 619         * Set VRAM in 2MB (bank 2) mode
 620         * VRAM Bank 1 will be accessible through offset 0x000000 if present
 621         * and VRAM Bank 2 will not respond at that offset even if present
 622         */
 623        out_le32(CNTRL_REG(p,vram_attr), 0x39);
 624
 625        out_8(&p->frame_buffer[0], 0x5a);
 626        out_8(&p->frame_buffer[1], 0xc7);
 627        asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
 628                                        : "memory" );
 629        mb();
 630        asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
 631                                        : "memory" );
 632        mb();
 633
 634        bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
 635                && (in_8(&p->frame_buffer[1]) == 0xc7);
 636
 637        if (bank2) {
 638                if (!bank1) {
 639                        /*
 640                         * vram bank 2 only
 641                         */
 642                        p->control_use_bank2 = 1;
 643                        p->vram_attr = 0x39;
 644                        p->frame_buffer += 0x600000;
 645                        p->frame_buffer_phys += 0x600000;
 646                } else {
 647                        /*
 648                         * 4 MB vram
 649                         */
 650                        p->vram_attr = 0x51;
 651                }
 652        } else {
 653                /*
 654                 * vram bank 1 only
 655                 */
 656                p->vram_attr = 0x31;
 657        }
 658
 659        p->total_vram = (bank1 + bank2) * 0x200000;
 660
 661        printk(KERN_INFO "controlfb: VRAM Total = %dMB "
 662                        "(%dMB @ bank 1, %dMB @ bank 2)\n",
 663                        (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
 664}
 665
 666
 667/*
 668 * find "control" and initialize
 669 */
 670static int __init control_of_init(struct device_node *dp)
 671{
 672        struct fb_info_control  *p;
 673        struct resource         fb_res, reg_res;
 674
 675        if (control_fb) {
 676                printk(KERN_ERR "controlfb: only one control is supported\n");
 677                return -ENXIO;
 678        }
 679
 680        if (of_pci_address_to_resource(dp, 2, &fb_res) ||
 681            of_pci_address_to_resource(dp, 1, &reg_res)) {
 682                printk(KERN_ERR "can't get 2 addresses for control\n");
 683                return -ENXIO;
 684        }
 685        p = kzalloc(sizeof(*p), GFP_KERNEL);
 686        if (!p)
 687                return -ENOMEM;
 688        control_fb = p; /* save it for cleanups */
 689
 690        /* Map in frame buffer and registers */
 691        p->fb_orig_base = fb_res.start;
 692        p->fb_orig_size = resource_size(&fb_res);
 693        /* use the big-endian aperture (??) */
 694        p->frame_buffer_phys = fb_res.start + 0x800000;
 695        p->control_regs_phys = reg_res.start;
 696        p->control_regs_size = resource_size(&reg_res);
 697
 698        if (!p->fb_orig_base ||
 699            !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
 700                p->fb_orig_base = 0;
 701                goto error_out;
 702        }
 703        /* map at most 8MB for the frame buffer */
 704        p->frame_buffer = ioremap_wt(p->frame_buffer_phys, 0x800000);
 705
 706        if (!p->control_regs_phys ||
 707            !request_mem_region(p->control_regs_phys, p->control_regs_size,
 708            "controlfb regs")) {
 709                p->control_regs_phys = 0;
 710                goto error_out;
 711        }
 712        p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
 713
 714        p->cmap_regs_phys = 0xf301b000;  /* XXX not in prom? */
 715        if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
 716                p->cmap_regs_phys = 0;
 717                goto error_out;
 718        }
 719        p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
 720
 721        if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
 722                goto error_out;
 723
 724        find_vram_size(p);
 725        if (!p->total_vram)
 726                goto error_out;
 727
 728        if (init_control(p) < 0)
 729                goto error_out;
 730
 731        return 0;
 732
 733error_out:
 734        control_cleanup();
 735        return -ENXIO;
 736}
 737
 738/*
 739 * Get the monitor sense value.
 740 * Note that this can be called before calibrate_delay,
 741 * so we can't use udelay.
 742 */
 743static int read_control_sense(struct fb_info_control *p)
 744{
 745        int sense;
 746
 747        out_le32(CNTRL_REG(p,mon_sense), 7);    /* drive all lines high */
 748        __delay(200);
 749        out_le32(CNTRL_REG(p,mon_sense), 077);  /* turn off drivers */
 750        __delay(2000);
 751        sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
 752
 753        /* drive each sense line low in turn and collect the other 2 */
 754        out_le32(CNTRL_REG(p,mon_sense), 033);  /* drive A low */
 755        __delay(2000);
 756        sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
 757        out_le32(CNTRL_REG(p,mon_sense), 055);  /* drive B low */
 758        __delay(2000);
 759        sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
 760                | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
 761        out_le32(CNTRL_REG(p,mon_sense), 066);  /* drive C low */
 762        __delay(2000);
 763        sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
 764
 765        out_le32(CNTRL_REG(p,mon_sense), 077);  /* turn off drivers */
 766        
 767        return sense;
 768}
 769
 770/**********************  Various translation functions  **********************/
 771
 772#define CONTROL_PIXCLOCK_BASE   256016
 773#define CONTROL_PIXCLOCK_MIN    5000    /* ~ 200 MHz dot clock */
 774
 775/*
 776 * calculate the clock paramaters to be sent to CUDA according to given
 777 * pixclock in pico second.
 778 */
 779static int calc_clock_params(unsigned long clk, unsigned char *param)
 780{
 781        unsigned long p0, p1, p2, k, l, m, n, min;
 782
 783        if (clk > (CONTROL_PIXCLOCK_BASE << 3))
 784                return 1;
 785
 786        p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
 787        l = clk << p2;
 788        p0 = 0;
 789        p1 = 0;
 790        for (k = 1, min = l; k < 32; k++) {
 791                unsigned long rem;
 792
 793                m = CONTROL_PIXCLOCK_BASE * k;
 794                n = m / l;
 795                rem = m % l;
 796                if (n && (n < 128) && rem < min) {
 797                        p0 = k;
 798                        p1 = n;
 799                        min = rem;
 800                }
 801        }
 802        if (!p0 || !p1)
 803                return 1;
 804
 805        param[0] = p0;
 806        param[1] = p1;
 807        param[2] = p2;
 808
 809        return 0;
 810}
 811
 812
 813/*
 814 * This routine takes a user-supplied var, and picks the best vmode/cmode
 815 * from it.
 816 */
 817
 818static int control_var_to_par(struct fb_var_screeninfo *var,
 819        struct fb_par_control *par, const struct fb_info *fb_info)
 820{
 821        int cmode, piped_diff, hstep;
 822        unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
 823                 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
 824        unsigned long pixclock;
 825        struct fb_info_control *p =
 826                container_of(fb_info, struct fb_info_control, info);
 827        struct control_regvals *r = &par->regvals;
 828
 829        switch (var->bits_per_pixel) {
 830        case 8:
 831                par->cmode = CMODE_8;
 832                if (p->total_vram > 0x200000) {
 833                        r->mode = 3;
 834                        r->radacal_ctrl = 0x20;
 835                        piped_diff = 13;
 836                } else {
 837                        r->mode = 2;
 838                        r->radacal_ctrl = 0x10;
 839                        piped_diff = 9;
 840                }
 841                break;
 842        case 15:
 843        case 16:
 844                par->cmode = CMODE_16;
 845                if (p->total_vram > 0x200000) {
 846                        r->mode = 2;
 847                        r->radacal_ctrl = 0x24;
 848                        piped_diff = 5;
 849                } else {
 850                        r->mode = 1;
 851                        r->radacal_ctrl = 0x14;
 852                        piped_diff = 3;
 853                }
 854                break;
 855        case 32:
 856                par->cmode = CMODE_32;
 857                if (p->total_vram > 0x200000) {
 858                        r->mode = 1;
 859                        r->radacal_ctrl = 0x28;
 860                } else {
 861                        r->mode = 0;
 862                        r->radacal_ctrl = 0x18;
 863                }
 864                piped_diff = 1;
 865                break;
 866        default:
 867                return -EINVAL;
 868        }
 869
 870        /*
 871         * adjust xres and vxres so that the corresponding memory widths are
 872         * 32-byte aligned
 873         */
 874        hstep = 31 >> par->cmode;
 875        par->xres = (var->xres + hstep) & ~hstep;
 876        par->vxres = (var->xres_virtual + hstep) & ~hstep;
 877        par->xoffset = (var->xoffset + hstep) & ~hstep;
 878        if (par->vxres < par->xres)
 879                par->vxres = par->xres;
 880        par->pitch = par->vxres << par->cmode;
 881
 882        par->yres = var->yres;
 883        par->vyres = var->yres_virtual;
 884        par->yoffset = var->yoffset;
 885        if (par->vyres < par->yres)
 886                par->vyres = par->yres;
 887
 888        par->sync = var->sync;
 889
 890        if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
 891                return -EINVAL;
 892
 893        if (par->xoffset + par->xres > par->vxres)
 894                par->xoffset = par->vxres - par->xres;
 895        if (par->yoffset + par->yres > par->vyres)
 896                par->yoffset = par->vyres - par->yres;
 897
 898        pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
 899                   var->pixclock;
 900        if (calc_clock_params(pixclock, r->clock_params))
 901                return -EINVAL;
 902
 903        hperiod = ((var->left_margin + par->xres + var->right_margin
 904                    + var->hsync_len) >> 1) - 2;
 905        hssync = hperiod + 1;
 906        hsblank = hssync - (var->right_margin >> 1);
 907        hesync = (var->hsync_len >> 1) - 1;
 908        heblank = (var->left_margin >> 1) + hesync;
 909        piped = heblank - piped_diff;
 910        heq = var->hsync_len >> 2;
 911        hlfln = (hperiod+2) >> 1;
 912        hserr = hssync-hesync;
 913        vperiod = (var->vsync_len + var->lower_margin + par->yres
 914                   + var->upper_margin) << 1;
 915        vssync = vperiod - 2;
 916        vesync = (var->vsync_len << 1) - vperiod + vssync;
 917        veblank = (var->upper_margin << 1) + vesync;
 918        vsblank = vssync - (var->lower_margin << 1);
 919        vswin = (vsblank+vssync) >> 1;
 920        vewin = (vesync+veblank) >> 1;
 921
 922        r->regs[0] = vswin;
 923        r->regs[1] = vsblank;
 924        r->regs[2] = veblank;
 925        r->regs[3] = vewin;
 926        r->regs[4] = vesync;
 927        r->regs[5] = vssync;
 928        r->regs[6] = vperiod;
 929        r->regs[7] = piped;
 930        r->regs[8] = hperiod;
 931        r->regs[9] = hsblank;
 932        r->regs[10] = heblank;
 933        r->regs[11] = hesync;
 934        r->regs[12] = hssync;
 935        r->regs[13] = heq;
 936        r->regs[14] = hlfln;
 937        r->regs[15] = hserr;
 938
 939        if (par->xres >= 1280 && par->cmode >= CMODE_16)
 940                par->ctrl = 0x7f;
 941        else
 942                par->ctrl = 0x3b;
 943
 944        if (mac_var_to_vmode(var, &par->vmode, &cmode))
 945                par->vmode = 0;
 946
 947        return 0;
 948}
 949
 950
 951/*
 952 * Convert hardware data in par to an fb_var_screeninfo
 953 */
 954
 955static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
 956{
 957        struct control_regints *rv;
 958        
 959        rv = (struct control_regints *) par->regvals.regs;
 960        
 961        memset(var, 0, sizeof(*var));
 962        var->xres = par->xres;
 963        var->yres = par->yres;
 964        var->xres_virtual = par->vxres;
 965        var->yres_virtual = par->vyres;
 966        var->xoffset = par->xoffset;
 967        var->yoffset = par->yoffset;
 968        
 969        switch(par->cmode) {
 970        default:
 971        case CMODE_8:
 972                var->bits_per_pixel = 8;
 973                var->red.length = 8;
 974                var->green.length = 8;
 975                var->blue.length = 8;
 976                break;
 977        case CMODE_16:  /* RGB 555 */
 978                var->bits_per_pixel = 16;
 979                var->red.offset = 10;
 980                var->red.length = 5;
 981                var->green.offset = 5;
 982                var->green.length = 5;
 983                var->blue.length = 5;
 984                break;
 985        case CMODE_32:  /* RGB 888 */
 986                var->bits_per_pixel = 32;
 987                var->red.offset = 16;
 988                var->red.length = 8;
 989                var->green.offset = 8;
 990                var->green.length = 8;
 991                var->blue.length = 8;
 992                var->transp.offset = 24;
 993                var->transp.length = 8;
 994                break;
 995        }
 996        var->height = -1;
 997        var->width = -1;
 998        var->vmode = FB_VMODE_NONINTERLACED;
 999
1000        var->left_margin = (rv->heblank - rv->hesync) << 1;
1001        var->right_margin = (rv->hssync - rv->hsblank) << 1;
1002        var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
1003
1004        var->upper_margin = (rv->veblank - rv->vesync) >> 1;
1005        var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
1006        var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
1007
1008        var->sync = par->sync;
1009
1010        /*
1011         * 10^12 * clock_params[0] / (3906400 * clock_params[1]
1012         *                            * 2^clock_params[2])
1013         * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
1014         * >> clock_params[2]
1015         */
1016        /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
1017        var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
1018        var->pixclock /= par->regvals.clock_params[1];
1019        var->pixclock >>= par->regvals.clock_params[2];
1020}
1021
1022/*
1023 * Set misc info vars for this driver
1024 */
1025static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
1026{
1027        /* Fill fb_info */
1028        info->par = &p->par;
1029        info->fbops = &controlfb_ops;
1030        info->pseudo_palette = p->pseudo_palette;
1031        info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1032        info->screen_base = p->frame_buffer + CTRLFB_OFF;
1033
1034        fb_alloc_cmap(&info->cmap, 256, 0);
1035
1036        /* Fill fix common fields */
1037        strcpy(info->fix.id, "control");
1038        info->fix.mmio_start = p->control_regs_phys;
1039        info->fix.mmio_len = sizeof(struct control_regs);
1040        info->fix.type = FB_TYPE_PACKED_PIXELS;
1041        info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
1042        info->fix.smem_len = p->total_vram - CTRLFB_OFF;
1043        info->fix.ywrapstep = 0;
1044        info->fix.type_aux = 0;
1045        info->fix.accel = FB_ACCEL_NONE;
1046}
1047
1048
1049static void control_cleanup(void)
1050{
1051        struct fb_info_control  *p = control_fb;
1052
1053        if (!p)
1054                return;
1055
1056        if (p->cmap_regs)
1057                iounmap(p->cmap_regs);
1058        if (p->control_regs)
1059                iounmap(p->control_regs);
1060        if (p->frame_buffer) {
1061                if (p->control_use_bank2)
1062                        p->frame_buffer -= 0x600000;
1063                iounmap(p->frame_buffer);
1064        }
1065        if (p->cmap_regs_phys)
1066                release_mem_region(p->cmap_regs_phys, 0x1000);
1067        if (p->control_regs_phys)
1068                release_mem_region(p->control_regs_phys, p->control_regs_size);
1069        if (p->fb_orig_base)
1070                release_mem_region(p->fb_orig_base, p->fb_orig_size);
1071        kfree(p);
1072}
1073
1074
1075