linux/drivers/video/fbdev/via/via_clock.h
<<
>>
Prefs
   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
   4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
   5 * Copyright 2011 Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
   6 */
   7/*
   8 * clock and PLL management functions
   9 */
  10
  11#ifndef __VIA_CLOCK_H__
  12#define __VIA_CLOCK_H__
  13
  14#include <linux/types.h>
  15
  16enum via_clksrc {
  17        VIA_CLKSRC_X1 = 0,
  18        VIA_CLKSRC_TVX1,
  19        VIA_CLKSRC_TVPLL,
  20        VIA_CLKSRC_DVP1TVCLKR,
  21        VIA_CLKSRC_CAP0,
  22        VIA_CLKSRC_CAP1,
  23};
  24
  25struct via_pll_config {
  26        u16 multiplier;
  27        u8 divisor;
  28        u8 rshift;
  29};
  30
  31struct via_clock {
  32        void (*set_primary_clock_state)(u8 state);
  33        void (*set_primary_clock_source)(enum via_clksrc src, bool use_pll);
  34        void (*set_primary_pll_state)(u8 state);
  35        void (*set_primary_pll)(struct via_pll_config config);
  36
  37        void (*set_secondary_clock_state)(u8 state);
  38        void (*set_secondary_clock_source)(enum via_clksrc src, bool use_pll);
  39        void (*set_secondary_pll_state)(u8 state);
  40        void (*set_secondary_pll)(struct via_pll_config config);
  41
  42        void (*set_engine_pll_state)(u8 state);
  43        void (*set_engine_pll)(struct via_pll_config config);
  44};
  45
  46
  47static inline u32 get_pll_internal_frequency(u32 ref_freq,
  48        struct via_pll_config pll)
  49{
  50        return ref_freq / pll.divisor * pll.multiplier;
  51}
  52
  53static inline u32 get_pll_output_frequency(u32 ref_freq,
  54        struct via_pll_config pll)
  55{
  56        return get_pll_internal_frequency(ref_freq, pll) >> pll.rshift;
  57}
  58
  59void via_clock_init(struct via_clock *clock, int gfx_chip);
  60
  61#endif /* __VIA_CLOCK_H__ */
  62