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20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/types.h>
25#include <linux/miscdevice.h>
26#include <linux/watchdog.h>
27#include <linux/init.h>
28#include <linux/fs.h>
29#include <linux/pci.h>
30#include <linux/ioport.h>
31#include <linux/jiffies.h>
32#include <linux/platform_device.h>
33#include <linux/uaccess.h>
34#include <linux/io.h>
35
36#include "nv_tco.h"
37
38
39#define TCO_VERSION "0.01"
40#define TCO_MODULE_NAME "NV_TCO"
41#define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
42
43
44static unsigned int tcobase;
45static DEFINE_SPINLOCK(tco_lock);
46static unsigned long timer_alive;
47static char tco_expect_close;
48static struct pci_dev *tco_pci;
49
50
51static struct platform_device *nv_tco_platform_device;
52
53
54#define WATCHDOG_HEARTBEAT 30
55static int heartbeat = WATCHDOG_HEARTBEAT;
56module_param(heartbeat, int, 0);
57MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, "
58 "default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
59
60static bool nowayout = WATCHDOG_NOWAYOUT;
61module_param(nowayout, bool, 0);
62MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
63 " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
64
65
66
67
68static inline unsigned char seconds_to_ticks(int seconds)
69{
70
71
72 return (seconds * 10) / 6;
73}
74
75static void tco_timer_start(void)
76{
77 u32 val;
78 unsigned long flags;
79
80 spin_lock_irqsave(&tco_lock, flags);
81 val = inl(TCO_CNT(tcobase));
82 val &= ~TCO_CNT_TCOHALT;
83 outl(val, TCO_CNT(tcobase));
84 spin_unlock_irqrestore(&tco_lock, flags);
85}
86
87static void tco_timer_stop(void)
88{
89 u32 val;
90 unsigned long flags;
91
92 spin_lock_irqsave(&tco_lock, flags);
93 val = inl(TCO_CNT(tcobase));
94 val |= TCO_CNT_TCOHALT;
95 outl(val, TCO_CNT(tcobase));
96 spin_unlock_irqrestore(&tco_lock, flags);
97}
98
99static void tco_timer_keepalive(void)
100{
101 unsigned long flags;
102
103 spin_lock_irqsave(&tco_lock, flags);
104 outb(0x01, TCO_RLD(tcobase));
105 spin_unlock_irqrestore(&tco_lock, flags);
106}
107
108static int tco_timer_set_heartbeat(int t)
109{
110 int ret = 0;
111 unsigned char tmrval;
112 unsigned long flags;
113 u8 val;
114
115
116
117
118
119
120 if (t < 0 || t > 0x3f)
121 return -EINVAL;
122 tmrval = seconds_to_ticks(t);
123
124
125 if (tmrval > 0x3f || tmrval < 0x04)
126 return -EINVAL;
127
128
129 spin_lock_irqsave(&tco_lock, flags);
130 val = inb(TCO_TMR(tcobase));
131 val &= 0xc0;
132 val |= tmrval;
133 outb(val, TCO_TMR(tcobase));
134 val = inb(TCO_TMR(tcobase));
135
136 if ((val & 0x3f) != tmrval)
137 ret = -EINVAL;
138 spin_unlock_irqrestore(&tco_lock, flags);
139
140 if (ret)
141 return ret;
142
143 heartbeat = t;
144 return 0;
145}
146
147
148
149
150
151static int nv_tco_open(struct inode *inode, struct file *file)
152{
153
154 if (test_and_set_bit(0, &timer_alive))
155 return -EBUSY;
156
157
158 tco_timer_keepalive();
159 tco_timer_start();
160 return stream_open(inode, file);
161}
162
163static int nv_tco_release(struct inode *inode, struct file *file)
164{
165
166 if (tco_expect_close == 42) {
167 tco_timer_stop();
168 } else {
169 pr_crit("Unexpected close, not stopping watchdog!\n");
170 tco_timer_keepalive();
171 }
172 clear_bit(0, &timer_alive);
173 tco_expect_close = 0;
174 return 0;
175}
176
177static ssize_t nv_tco_write(struct file *file, const char __user *data,
178 size_t len, loff_t *ppos)
179{
180
181 if (len) {
182 if (!nowayout) {
183 size_t i;
184
185
186
187
188
189 tco_expect_close = 0;
190
191
192
193
194
195 for (i = 0; i != len; i++) {
196 char c;
197 if (get_user(c, data + i))
198 return -EFAULT;
199 if (c == 'V')
200 tco_expect_close = 42;
201 }
202 }
203
204
205 tco_timer_keepalive();
206 }
207 return len;
208}
209
210static long nv_tco_ioctl(struct file *file, unsigned int cmd,
211 unsigned long arg)
212{
213 int new_options, retval = -EINVAL;
214 int new_heartbeat;
215 void __user *argp = (void __user *)arg;
216 int __user *p = argp;
217 static const struct watchdog_info ident = {
218 .options = WDIOF_SETTIMEOUT |
219 WDIOF_KEEPALIVEPING |
220 WDIOF_MAGICCLOSE,
221 .firmware_version = 0,
222 .identity = TCO_MODULE_NAME,
223 };
224
225 switch (cmd) {
226 case WDIOC_GETSUPPORT:
227 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
228 case WDIOC_GETSTATUS:
229 case WDIOC_GETBOOTSTATUS:
230 return put_user(0, p);
231 case WDIOC_SETOPTIONS:
232 if (get_user(new_options, p))
233 return -EFAULT;
234 if (new_options & WDIOS_DISABLECARD) {
235 tco_timer_stop();
236 retval = 0;
237 }
238 if (new_options & WDIOS_ENABLECARD) {
239 tco_timer_keepalive();
240 tco_timer_start();
241 retval = 0;
242 }
243 return retval;
244 case WDIOC_KEEPALIVE:
245 tco_timer_keepalive();
246 return 0;
247 case WDIOC_SETTIMEOUT:
248 if (get_user(new_heartbeat, p))
249 return -EFAULT;
250 if (tco_timer_set_heartbeat(new_heartbeat))
251 return -EINVAL;
252 tco_timer_keepalive();
253
254 case WDIOC_GETTIMEOUT:
255 return put_user(heartbeat, p);
256 default:
257 return -ENOTTY;
258 }
259}
260
261
262
263
264
265static const struct file_operations nv_tco_fops = {
266 .owner = THIS_MODULE,
267 .llseek = no_llseek,
268 .write = nv_tco_write,
269 .unlocked_ioctl = nv_tco_ioctl,
270 .open = nv_tco_open,
271 .release = nv_tco_release,
272};
273
274static struct miscdevice nv_tco_miscdev = {
275 .minor = WATCHDOG_MINOR,
276 .name = "watchdog",
277 .fops = &nv_tco_fops,
278};
279
280
281
282
283
284
285
286
287
288static const struct pci_device_id tco_pci_tbl[] = {
289 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS,
290 PCI_ANY_ID, PCI_ANY_ID, },
291 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS,
292 PCI_ANY_ID, PCI_ANY_ID, },
293 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS,
294 PCI_ANY_ID, PCI_ANY_ID, },
295 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS,
296 PCI_ANY_ID, PCI_ANY_ID, },
297 { 0, },
298};
299MODULE_DEVICE_TABLE(pci, tco_pci_tbl);
300
301
302
303
304
305static unsigned char nv_tco_getdevice(void)
306{
307 struct pci_dev *dev = NULL;
308 u32 val;
309
310
311 for_each_pci_dev(dev) {
312 if (pci_match_id(tco_pci_tbl, dev) != NULL) {
313 tco_pci = dev;
314 break;
315 }
316 }
317
318 if (!tco_pci)
319 return 0;
320
321
322 pci_read_config_dword(tco_pci, 0x64, &val);
323 val &= 0xffff;
324 if (val == 0x0001 || val == 0x0000) {
325
326 pr_err("failed to get tcobase address\n");
327 return 0;
328 }
329 val &= 0xff00;
330 tcobase = val + 0x40;
331
332 if (!request_region(tcobase, 0x10, "NV TCO")) {
333 pr_err("I/O address 0x%04x already in use\n", tcobase);
334 return 0;
335 }
336
337
338 tco_timer_set_heartbeat(30);
339
340
341
342
343
344 tco_timer_keepalive();
345 tco_timer_stop();
346
347
348 if (!request_region(MCP51_SMI_EN(tcobase), 4, "NV TCO")) {
349 pr_err("I/O address 0x%04x already in use\n",
350 MCP51_SMI_EN(tcobase));
351 goto out;
352 }
353 val = inl(MCP51_SMI_EN(tcobase));
354 val &= ~MCP51_SMI_EN_TCO;
355 outl(val, MCP51_SMI_EN(tcobase));
356 val = inl(MCP51_SMI_EN(tcobase));
357 release_region(MCP51_SMI_EN(tcobase), 4);
358 if (val & MCP51_SMI_EN_TCO) {
359 pr_err("Could not disable SMI caused by TCO\n");
360 goto out;
361 }
362
363
364 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
365 val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;
366 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
367 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
368 if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {
369 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
370 goto out;
371 }
372
373 return 1;
374out:
375 release_region(tcobase, 0x10);
376 return 0;
377}
378
379static int nv_tco_init(struct platform_device *dev)
380{
381 int ret;
382
383
384 if (!nv_tco_getdevice())
385 return -ENODEV;
386
387
388 pr_info("Watchdog reboot %sdetected\n",
389 inl(TCO_STS(tcobase)) & TCO_STS_TCO2TO_STS ? "" : "not ");
390
391
392 outl(TCO_STS_RESET, TCO_STS(tcobase));
393
394
395
396
397
398 if (tco_timer_set_heartbeat(heartbeat)) {
399 heartbeat = WATCHDOG_HEARTBEAT;
400 tco_timer_set_heartbeat(heartbeat);
401 pr_info("heartbeat value must be 2<heartbeat<39, using %d\n",
402 heartbeat);
403 }
404
405 ret = misc_register(&nv_tco_miscdev);
406 if (ret != 0) {
407 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
408 WATCHDOG_MINOR, ret);
409 goto unreg_region;
410 }
411
412 clear_bit(0, &timer_alive);
413
414 tco_timer_stop();
415
416 pr_info("initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
417 tcobase, heartbeat, nowayout);
418
419 return 0;
420
421unreg_region:
422 release_region(tcobase, 0x10);
423 return ret;
424}
425
426static void nv_tco_cleanup(void)
427{
428 u32 val;
429
430
431 if (!nowayout)
432 tco_timer_stop();
433
434
435 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
436 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
437 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
438 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
439 if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {
440 pr_crit("Couldn't unset REBOOT bit. Machine may soon reset\n");
441 }
442
443
444 misc_deregister(&nv_tco_miscdev);
445 release_region(tcobase, 0x10);
446}
447
448static int nv_tco_remove(struct platform_device *dev)
449{
450 if (tcobase)
451 nv_tco_cleanup();
452
453 return 0;
454}
455
456static void nv_tco_shutdown(struct platform_device *dev)
457{
458 u32 val;
459
460 tco_timer_stop();
461
462
463
464 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
465 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
466 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
467}
468
469static struct platform_driver nv_tco_driver = {
470 .probe = nv_tco_init,
471 .remove = nv_tco_remove,
472 .shutdown = nv_tco_shutdown,
473 .driver = {
474 .name = TCO_MODULE_NAME,
475 },
476};
477
478static int __init nv_tco_init_module(void)
479{
480 int err;
481
482 pr_info("NV TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
483
484 err = platform_driver_register(&nv_tco_driver);
485 if (err)
486 return err;
487
488 nv_tco_platform_device = platform_device_register_simple(
489 TCO_MODULE_NAME, -1, NULL, 0);
490 if (IS_ERR(nv_tco_platform_device)) {
491 err = PTR_ERR(nv_tco_platform_device);
492 goto unreg_platform_driver;
493 }
494
495 return 0;
496
497unreg_platform_driver:
498 platform_driver_unregister(&nv_tco_driver);
499 return err;
500}
501
502static void __exit nv_tco_cleanup_module(void)
503{
504 platform_device_unregister(nv_tco_platform_device);
505 platform_driver_unregister(&nv_tco_driver);
506 pr_info("NV TCO Watchdog Module Unloaded\n");
507}
508
509module_init(nv_tco_init_module);
510module_exit(nv_tco_cleanup_module);
511
512MODULE_AUTHOR("Mike Waychison");
513MODULE_DESCRIPTION("TCO timer driver for NV chipsets");
514MODULE_LICENSE("GPL");
515