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2
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4
5#ifndef __KVM_ARM_VGIC_H
6#define __KVM_ARM_VGIC_H
7
8#include <linux/kernel.h>
9#include <linux/kvm.h>
10#include <linux/irqreturn.h>
11#include <linux/spinlock.h>
12#include <linux/static_key.h>
13#include <linux/types.h>
14#include <kvm/iodev.h>
15#include <linux/list.h>
16#include <linux/jump_label.h>
17
18#include <linux/irqchip/arm-gic-v4.h>
19
20#define VGIC_V3_MAX_CPUS 512
21#define VGIC_V2_MAX_CPUS 8
22#define VGIC_NR_IRQS_LEGACY 256
23#define VGIC_NR_SGIS 16
24#define VGIC_NR_PPIS 16
25#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
26#define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1)
27#define VGIC_MAX_SPI 1019
28#define VGIC_MAX_RESERVED 1023
29#define VGIC_MIN_LPI 8192
30#define KVM_IRQCHIP_NUM_PINS (1020 - 32)
31
32#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
33#define irq_is_spi(irq) ((irq) >= VGIC_NR_PRIVATE_IRQS && \
34 (irq) <= VGIC_MAX_SPI)
35
36enum vgic_type {
37 VGIC_V2,
38 VGIC_V3,
39};
40
41
42struct vgic_global {
43
44 enum vgic_type type;
45
46
47 phys_addr_t vcpu_base;
48
49
50 void __iomem *vcpu_base_va;
51
52 void __iomem *vcpu_hyp_va;
53
54
55 void __iomem *vctrl_base;
56
57 void __iomem *vctrl_hyp;
58
59
60 int nr_lr;
61
62
63 unsigned int maint_irq;
64
65
66 int max_gic_vcpus;
67
68
69 bool can_emulate_gicv2;
70
71
72 bool has_gicv4;
73
74
75 struct static_key_false gicv3_cpuif;
76
77 u32 ich_vtr_el2;
78};
79
80extern struct vgic_global kvm_vgic_global_state;
81
82#define VGIC_V2_MAX_LRS (1 << 6)
83#define VGIC_V3_MAX_LRS 16
84#define VGIC_V3_LR_INDEX(lr) (VGIC_V3_MAX_LRS - 1 - lr)
85
86enum vgic_irq_config {
87 VGIC_CONFIG_EDGE = 0,
88 VGIC_CONFIG_LEVEL
89};
90
91struct vgic_irq {
92 raw_spinlock_t irq_lock;
93 struct list_head lpi_list;
94 struct list_head ap_list;
95
96 struct kvm_vcpu *vcpu;
97
98
99
100
101 struct kvm_vcpu *target_vcpu;
102
103
104
105
106
107 u32 intid;
108 bool line_level;
109 bool pending_latch;
110
111
112 bool active;
113 bool enabled;
114 bool hw;
115 struct kref refcount;
116 u32 hwintid;
117 unsigned int host_irq;
118 union {
119 u8 targets;
120 u32 mpidr;
121 };
122 u8 source;
123 u8 active_source;
124 u8 priority;
125 u8 group;
126 enum vgic_irq_config config;
127
128
129
130
131
132
133
134
135
136
137 bool (*get_input_level)(int vintid);
138
139 void *owner;
140
141};
142
143struct vgic_register_region;
144struct vgic_its;
145
146enum iodev_type {
147 IODEV_CPUIF,
148 IODEV_DIST,
149 IODEV_REDIST,
150 IODEV_ITS
151};
152
153struct vgic_io_device {
154 gpa_t base_addr;
155 union {
156 struct kvm_vcpu *redist_vcpu;
157 struct vgic_its *its;
158 };
159 const struct vgic_register_region *regions;
160 enum iodev_type iodev_type;
161 int nr_regions;
162 struct kvm_io_device dev;
163};
164
165struct vgic_its {
166
167 gpa_t vgic_its_base;
168
169 bool enabled;
170 struct vgic_io_device iodev;
171 struct kvm_device *dev;
172
173
174 u64 baser_device_table;
175 u64 baser_coll_table;
176
177
178 struct mutex cmd_lock;
179 u64 cbaser;
180 u32 creadr;
181 u32 cwriter;
182
183
184 u32 abi_rev;
185
186
187 struct mutex its_lock;
188 struct list_head device_list;
189 struct list_head collection_list;
190};
191
192struct vgic_state_iter;
193
194struct vgic_redist_region {
195 u32 index;
196 gpa_t base;
197 u32 count;
198 u32 free_index;
199 struct list_head list;
200};
201
202struct vgic_dist {
203 bool in_kernel;
204 bool ready;
205 bool initialized;
206
207
208 u32 vgic_model;
209
210
211 u32 implementation_rev;
212
213
214 bool v2_groups_user_writable;
215
216
217 bool msis_require_devid;
218
219 int nr_spis;
220
221
222 gpa_t vgic_dist_base;
223 union {
224
225 gpa_t vgic_cpu_base;
226
227 struct list_head rd_regions;
228 };
229
230
231 bool enabled;
232
233 struct vgic_irq *spis;
234
235 struct vgic_io_device dist_iodev;
236
237 bool has_its;
238
239
240
241
242
243
244
245 u64 propbaser;
246
247
248 raw_spinlock_t lpi_list_lock;
249 struct list_head lpi_list_head;
250 int lpi_list_count;
251
252
253 struct vgic_state_iter *iter;
254
255
256
257
258
259
260
261
262 struct its_vm its_vm;
263};
264
265struct vgic_v2_cpu_if {
266 u32 vgic_hcr;
267 u32 vgic_vmcr;
268 u32 vgic_apr;
269 u32 vgic_lr[VGIC_V2_MAX_LRS];
270};
271
272struct vgic_v3_cpu_if {
273 u32 vgic_hcr;
274 u32 vgic_vmcr;
275 u32 vgic_sre;
276 u32 vgic_ap0r[4];
277 u32 vgic_ap1r[4];
278 u64 vgic_lr[VGIC_V3_MAX_LRS];
279
280
281
282
283
284
285
286 struct its_vpe its_vpe;
287};
288
289struct vgic_cpu {
290
291 union {
292 struct vgic_v2_cpu_if vgic_v2;
293 struct vgic_v3_cpu_if vgic_v3;
294 };
295
296 unsigned int used_lrs;
297 struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS];
298
299 raw_spinlock_t ap_list_lock;
300
301
302
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304
305
306
307 struct list_head ap_list_head;
308
309
310
311
312
313 struct vgic_io_device rd_iodev;
314 struct vgic_io_device sgi_iodev;
315 struct vgic_redist_region *rdreg;
316
317
318 u64 pendbaser;
319
320 bool lpis_enabled;
321
322
323 u32 num_pri_bits;
324
325
326 u32 num_id_bits;
327};
328
329extern struct static_key_false vgic_v2_cpuif_trap;
330extern struct static_key_false vgic_v3_cpuif_trap;
331
332int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
333void kvm_vgic_early_init(struct kvm *kvm);
334int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu);
335int kvm_vgic_create(struct kvm *kvm, u32 type);
336void kvm_vgic_destroy(struct kvm *kvm);
337void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
338int kvm_vgic_map_resources(struct kvm *kvm);
339int kvm_vgic_hyp_init(void);
340void kvm_vgic_init_cpu_hardware(void);
341
342int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
343 bool level, void *owner);
344int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
345 u32 vintid, bool (*get_input_level)(int vindid));
346int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid);
347bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid);
348
349int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
350
351void kvm_vgic_load(struct kvm_vcpu *vcpu);
352void kvm_vgic_put(struct kvm_vcpu *vcpu);
353void kvm_vgic_vmcr_sync(struct kvm_vcpu *vcpu);
354
355#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
356#define vgic_initialized(k) ((k)->arch.vgic.initialized)
357#define vgic_ready(k) ((k)->arch.vgic.ready)
358#define vgic_valid_spi(k, i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \
359 ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
360
361bool kvm_vcpu_has_pending_irqs(struct kvm_vcpu *vcpu);
362void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
363void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
364void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid);
365
366void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg, bool allow_group1);
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371
372
373
374static inline int kvm_vgic_get_max_vcpus(void)
375{
376 return kvm_vgic_global_state.max_gic_vcpus;
377}
378
379int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi);
380
381
382
383
384
385int kvm_vgic_setup_default_irq_routing(struct kvm *kvm);
386
387int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner);
388
389struct kvm_kernel_irq_routing_entry;
390
391int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int irq,
392 struct kvm_kernel_irq_routing_entry *irq_entry);
393
394int kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int irq,
395 struct kvm_kernel_irq_routing_entry *irq_entry);
396
397void kvm_vgic_v4_enable_doorbell(struct kvm_vcpu *vcpu);
398void kvm_vgic_v4_disable_doorbell(struct kvm_vcpu *vcpu);
399
400#endif
401