linux/include/linux/iio/imu/adis.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Common library for ADIS16XXX devices
   4 *
   5 * Copyright 2012 Analog Devices Inc.
   6 *   Author: Lars-Peter Clausen <lars@metafoo.de>
   7 */
   8
   9#ifndef __IIO_ADIS_H__
  10#define __IIO_ADIS_H__
  11
  12#include <linux/spi/spi.h>
  13#include <linux/interrupt.h>
  14#include <linux/iio/types.h>
  15
  16#define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
  17#define ADIS_READ_REG(reg) ((reg) & 0x7f)
  18
  19#define ADIS_PAGE_SIZE 0x80
  20#define ADIS_REG_PAGE_ID 0x00
  21
  22struct adis;
  23struct adis_burst;
  24
  25/**
  26 * struct adis_data - ADIS chip variant specific data
  27 * @read_delay: SPI delay for read operations in us
  28 * @write_delay: SPI delay for write operations in us
  29 * @glob_cmd_reg: Register address of the GLOB_CMD register
  30 * @msc_ctrl_reg: Register address of the MSC_CTRL register
  31 * @diag_stat_reg: Register address of the DIAG_STAT register
  32 * @status_error_msgs: Array of error messgaes
  33 * @status_error_mask:
  34 */
  35struct adis_data {
  36        unsigned int read_delay;
  37        unsigned int write_delay;
  38
  39        unsigned int glob_cmd_reg;
  40        unsigned int msc_ctrl_reg;
  41        unsigned int diag_stat_reg;
  42
  43        unsigned int self_test_mask;
  44        bool self_test_no_autoclear;
  45        unsigned int startup_delay;
  46
  47        const char * const *status_error_msgs;
  48        unsigned int status_error_mask;
  49
  50        int (*enable_irq)(struct adis *adis, bool enable);
  51
  52        bool has_paging;
  53};
  54
  55struct adis {
  56        struct spi_device       *spi;
  57        struct iio_trigger      *trig;
  58
  59        const struct adis_data  *data;
  60        struct adis_burst       *burst;
  61
  62        struct mutex            txrx_lock;
  63        struct spi_message      msg;
  64        struct spi_transfer     *xfer;
  65        unsigned int            current_page;
  66        void                    *buffer;
  67
  68        uint8_t                 tx[10] ____cacheline_aligned;
  69        uint8_t                 rx[4];
  70};
  71
  72int adis_init(struct adis *adis, struct iio_dev *indio_dev,
  73        struct spi_device *spi, const struct adis_data *data);
  74int adis_reset(struct adis *adis);
  75
  76int adis_write_reg(struct adis *adis, unsigned int reg,
  77        unsigned int val, unsigned int size);
  78int adis_read_reg(struct adis *adis, unsigned int reg,
  79        unsigned int *val, unsigned int size);
  80
  81/**
  82 * adis_write_reg_8() - Write single byte to a register
  83 * @adis: The adis device
  84 * @reg: The address of the register to be written
  85 * @value: The value to write
  86 */
  87static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
  88        uint8_t val)
  89{
  90        return adis_write_reg(adis, reg, val, 1);
  91}
  92
  93/**
  94 * adis_write_reg_16() - Write 2 bytes to a pair of registers
  95 * @adis: The adis device
  96 * @reg: The address of the lower of the two registers
  97 * @value: Value to be written
  98 */
  99static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
 100        uint16_t val)
 101{
 102        return adis_write_reg(adis, reg, val, 2);
 103}
 104
 105/**
 106 * adis_write_reg_32() - write 4 bytes to four registers
 107 * @adis: The adis device
 108 * @reg: The address of the lower of the four register
 109 * @value: Value to be written
 110 */
 111static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
 112        uint32_t val)
 113{
 114        return adis_write_reg(adis, reg, val, 4);
 115}
 116
 117/**
 118 * adis_read_reg_16() - read 2 bytes from a 16-bit register
 119 * @adis: The adis device
 120 * @reg: The address of the lower of the two registers
 121 * @val: The value read back from the device
 122 */
 123static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
 124        uint16_t *val)
 125{
 126        unsigned int tmp;
 127        int ret;
 128
 129        ret = adis_read_reg(adis, reg, &tmp, 2);
 130        *val = tmp;
 131
 132        return ret;
 133}
 134
 135/**
 136 * adis_read_reg_32() - read 4 bytes from a 32-bit register
 137 * @adis: The adis device
 138 * @reg: The address of the lower of the two registers
 139 * @val: The value read back from the device
 140 */
 141static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
 142        uint32_t *val)
 143{
 144        unsigned int tmp;
 145        int ret;
 146
 147        ret = adis_read_reg(adis, reg, &tmp, 4);
 148        *val = tmp;
 149
 150        return ret;
 151}
 152
 153int adis_enable_irq(struct adis *adis, bool enable);
 154int adis_check_status(struct adis *adis);
 155
 156int adis_initial_startup(struct adis *adis);
 157
 158int adis_single_conversion(struct iio_dev *indio_dev,
 159        const struct iio_chan_spec *chan, unsigned int error_mask,
 160        int *val);
 161
 162#define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
 163        .type = IIO_VOLTAGE, \
 164        .indexed = 1, \
 165        .channel = (chan), \
 166        .extend_name = name, \
 167        .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 168                BIT(IIO_CHAN_INFO_SCALE), \
 169        .info_mask_shared_by_all = info_all, \
 170        .address = (addr), \
 171        .scan_index = (si), \
 172        .scan_type = { \
 173                .sign = 'u', \
 174                .realbits = (bits), \
 175                .storagebits = 16, \
 176                .endianness = IIO_BE, \
 177        }, \
 178}
 179
 180#define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
 181        ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
 182
 183#define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
 184        ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
 185
 186#define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
 187        .type = IIO_TEMP, \
 188        .indexed = 1, \
 189        .channel = 0, \
 190        .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 191                BIT(IIO_CHAN_INFO_SCALE) | \
 192                BIT(IIO_CHAN_INFO_OFFSET), \
 193        .info_mask_shared_by_all = info_all, \
 194        .address = (addr), \
 195        .scan_index = (si), \
 196        .scan_type = { \
 197                .sign = 'u', \
 198                .realbits = (bits), \
 199                .storagebits = 16, \
 200                .endianness = IIO_BE, \
 201        }, \
 202}
 203
 204#define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
 205        .type = (_type), \
 206        .modified = 1, \
 207        .channel2 = IIO_MOD_ ## mod, \
 208        .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 209                 info_sep, \
 210        .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 211        .info_mask_shared_by_all = info_all, \
 212        .address = (addr), \
 213        .scan_index = (si), \
 214        .scan_type = { \
 215                .sign = 's', \
 216                .realbits = (bits), \
 217                .storagebits = 16, \
 218                .endianness = IIO_BE, \
 219        }, \
 220}
 221
 222#define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
 223        ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
 224
 225#define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits)         \
 226        ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
 227
 228#define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
 229        ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
 230
 231#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
 232        ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
 233
 234#ifdef CONFIG_IIO_ADIS_LIB_BUFFER
 235
 236/**
 237 * struct adis_burst - ADIS data for burst transfers
 238 * @en                  burst mode enabled
 239 * @reg_cmd             register command that triggers burst
 240 * @extra_len           extra length to account in the SPI RX buffer
 241 */
 242struct adis_burst {
 243        bool            en;
 244        unsigned int    reg_cmd;
 245        unsigned int    extra_len;
 246};
 247
 248int adis_setup_buffer_and_trigger(struct adis *adis,
 249        struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *));
 250void adis_cleanup_buffer_and_trigger(struct adis *adis,
 251        struct iio_dev *indio_dev);
 252
 253int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
 254void adis_remove_trigger(struct adis *adis);
 255
 256int adis_update_scan_mode(struct iio_dev *indio_dev,
 257        const unsigned long *scan_mask);
 258
 259#else /* CONFIG_IIO_BUFFER */
 260
 261static inline int adis_setup_buffer_and_trigger(struct adis *adis,
 262        struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *))
 263{
 264        return 0;
 265}
 266
 267static inline void adis_cleanup_buffer_and_trigger(struct adis *adis,
 268        struct iio_dev *indio_dev)
 269{
 270}
 271
 272static inline int adis_probe_trigger(struct adis *adis,
 273        struct iio_dev *indio_dev)
 274{
 275        return 0;
 276}
 277
 278static inline void adis_remove_trigger(struct adis *adis)
 279{
 280}
 281
 282#define adis_update_scan_mode NULL
 283
 284#endif /* CONFIG_IIO_BUFFER */
 285
 286#ifdef CONFIG_DEBUG_FS
 287
 288int adis_debugfs_reg_access(struct iio_dev *indio_dev,
 289        unsigned int reg, unsigned int writeval, unsigned int *readval);
 290
 291#else
 292
 293#define adis_debugfs_reg_access NULL
 294
 295#endif
 296
 297#endif
 298