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11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/linkmode.h>
18#include <linux/mdio.h>
19#include <linux/mii.h>
20#include <linux/module.h>
21#include <linux/timer.h>
22#include <linux/workqueue.h>
23#include <linux/mod_devicetable.h>
24
25#include <linux/atomic.h>
26
27#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
31#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
38 SUPPORTED_1000baseT_Full)
39
40extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
55#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
56#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
57
58extern const int phy_basic_ports_array[3];
59extern const int phy_fibre_port_array[1];
60extern const int phy_all_ports_features_array[7];
61extern const int phy_10_100_features_array[4];
62extern const int phy_basic_t1_features_array[2];
63extern const int phy_gbit_features_array[2];
64extern const int phy_10gbit_features_array[1];
65
66
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68
69
70
71#define PHY_POLL -1
72#define PHY_IGNORE_INTERRUPT -2
73
74#define PHY_IS_INTERNAL 0x00000001
75#define PHY_RST_AFTER_CLK_EN 0x00000002
76#define MDIO_DEVICE_IS_PHY 0x80000000
77
78
79typedef enum {
80 PHY_INTERFACE_MODE_NA,
81 PHY_INTERFACE_MODE_INTERNAL,
82 PHY_INTERFACE_MODE_MII,
83 PHY_INTERFACE_MODE_GMII,
84 PHY_INTERFACE_MODE_SGMII,
85 PHY_INTERFACE_MODE_TBI,
86 PHY_INTERFACE_MODE_REVMII,
87 PHY_INTERFACE_MODE_RMII,
88 PHY_INTERFACE_MODE_RGMII,
89 PHY_INTERFACE_MODE_RGMII_ID,
90 PHY_INTERFACE_MODE_RGMII_RXID,
91 PHY_INTERFACE_MODE_RGMII_TXID,
92 PHY_INTERFACE_MODE_RTBI,
93 PHY_INTERFACE_MODE_SMII,
94 PHY_INTERFACE_MODE_XGMII,
95 PHY_INTERFACE_MODE_MOCA,
96 PHY_INTERFACE_MODE_QSGMII,
97 PHY_INTERFACE_MODE_TRGMII,
98 PHY_INTERFACE_MODE_1000BASEX,
99 PHY_INTERFACE_MODE_2500BASEX,
100 PHY_INTERFACE_MODE_RXAUI,
101 PHY_INTERFACE_MODE_XAUI,
102
103 PHY_INTERFACE_MODE_10GKR,
104 PHY_INTERFACE_MODE_USXGMII,
105 PHY_INTERFACE_MODE_MAX,
106} phy_interface_t;
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118
119unsigned int phy_supported_speeds(struct phy_device *phy,
120 unsigned int *speeds,
121 unsigned int size);
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130
131static inline const char *phy_modes(phy_interface_t interface)
132{
133 switch (interface) {
134 case PHY_INTERFACE_MODE_NA:
135 return "";
136 case PHY_INTERFACE_MODE_INTERNAL:
137 return "internal";
138 case PHY_INTERFACE_MODE_MII:
139 return "mii";
140 case PHY_INTERFACE_MODE_GMII:
141 return "gmii";
142 case PHY_INTERFACE_MODE_SGMII:
143 return "sgmii";
144 case PHY_INTERFACE_MODE_TBI:
145 return "tbi";
146 case PHY_INTERFACE_MODE_REVMII:
147 return "rev-mii";
148 case PHY_INTERFACE_MODE_RMII:
149 return "rmii";
150 case PHY_INTERFACE_MODE_RGMII:
151 return "rgmii";
152 case PHY_INTERFACE_MODE_RGMII_ID:
153 return "rgmii-id";
154 case PHY_INTERFACE_MODE_RGMII_RXID:
155 return "rgmii-rxid";
156 case PHY_INTERFACE_MODE_RGMII_TXID:
157 return "rgmii-txid";
158 case PHY_INTERFACE_MODE_RTBI:
159 return "rtbi";
160 case PHY_INTERFACE_MODE_SMII:
161 return "smii";
162 case PHY_INTERFACE_MODE_XGMII:
163 return "xgmii";
164 case PHY_INTERFACE_MODE_MOCA:
165 return "moca";
166 case PHY_INTERFACE_MODE_QSGMII:
167 return "qsgmii";
168 case PHY_INTERFACE_MODE_TRGMII:
169 return "trgmii";
170 case PHY_INTERFACE_MODE_1000BASEX:
171 return "1000base-x";
172 case PHY_INTERFACE_MODE_2500BASEX:
173 return "2500base-x";
174 case PHY_INTERFACE_MODE_RXAUI:
175 return "rxaui";
176 case PHY_INTERFACE_MODE_XAUI:
177 return "xaui";
178 case PHY_INTERFACE_MODE_10GKR:
179 return "10gbase-kr";
180 case PHY_INTERFACE_MODE_USXGMII:
181 return "usxgmii";
182 default:
183 return "unknown";
184 }
185}
186
187
188#define PHY_INIT_TIMEOUT 100000
189#define PHY_FORCE_TIMEOUT 10
190
191#define PHY_MAX_ADDR 32
192
193
194#define PHY_ID_FMT "%s:%02x"
195
196#define MII_BUS_ID_SIZE 61
197
198
199
200#define MII_ADDR_C45 (1<<30)
201#define MII_DEVADDR_C45_SHIFT 16
202#define MII_REGADDR_C45_MASK GENMASK(15, 0)
203
204struct device;
205struct phylink;
206struct sk_buff;
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211
212struct mii_bus {
213 struct module *owner;
214 const char *name;
215 char id[MII_BUS_ID_SIZE];
216 void *priv;
217 int (*read)(struct mii_bus *bus, int addr, int regnum);
218 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
219 int (*reset)(struct mii_bus *bus);
220
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224
225 struct mutex mdio_lock;
226
227 struct device *parent;
228 enum {
229 MDIOBUS_ALLOCATED = 1,
230 MDIOBUS_REGISTERED,
231 MDIOBUS_UNREGISTERED,
232 MDIOBUS_RELEASED,
233 } state;
234 struct device dev;
235
236
237 struct mdio_device *mdio_map[PHY_MAX_ADDR];
238
239
240 u32 phy_mask;
241
242
243 u32 phy_ignore_ta_mask;
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248
249 int irq[PHY_MAX_ADDR];
250
251
252 int reset_delay_us;
253
254 struct gpio_desc *reset_gpiod;
255};
256#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
257
258struct mii_bus *mdiobus_alloc_size(size_t);
259static inline struct mii_bus *mdiobus_alloc(void)
260{
261 return mdiobus_alloc_size(0);
262}
263
264int __mdiobus_register(struct mii_bus *bus, struct module *owner);
265#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
266void mdiobus_unregister(struct mii_bus *bus);
267void mdiobus_free(struct mii_bus *bus);
268struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
269static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
270{
271 return devm_mdiobus_alloc_size(dev, 0);
272}
273
274void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
275struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
276
277#define PHY_INTERRUPT_DISABLED false
278#define PHY_INTERRUPT_ENABLED true
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309enum phy_state {
310 PHY_DOWN = 0,
311 PHY_READY,
312 PHY_HALTED,
313 PHY_UP,
314 PHY_RUNNING,
315 PHY_NOLINK,
316};
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322
323struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326};
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359struct phy_device {
360 struct mdio_device mdio;
361
362
363
364 struct phy_driver *drv;
365
366 u32 phy_id;
367
368 struct phy_c45_device_ids c45_ids;
369 unsigned is_c45:1;
370 unsigned is_internal:1;
371 unsigned is_pseudo_fixed_link:1;
372 unsigned is_gigabit_capable:1;
373 unsigned has_fixups:1;
374 unsigned suspended:1;
375 unsigned sysfs_links:1;
376 unsigned loopback_enabled:1;
377
378 unsigned autoneg:1;
379
380 unsigned link:1;
381 unsigned autoneg_complete:1;
382
383
384 unsigned interrupts:1;
385
386 enum phy_state state;
387
388 u32 dev_flags;
389
390 phy_interface_t interface;
391
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394
395
396 int speed;
397 int duplex;
398 int pause;
399 int asym_pause;
400
401
402
403 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
404 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
406
407
408 u32 eee_broken_modes;
409
410#ifdef CONFIG_LED_TRIGGER_PHY
411 struct phy_led_trigger *phy_led_triggers;
412 unsigned int phy_num_led_triggers;
413 struct phy_led_trigger *last_triggered;
414
415 struct phy_led_trigger *led_link_trigger;
416#endif
417
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419
420
421
422 int irq;
423
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425
426 void *priv;
427
428
429 struct delayed_work state_queue;
430
431 struct mutex lock;
432
433 struct phylink *phylink;
434 struct net_device *attached_dev;
435
436 u8 mdix;
437 u8 mdix_ctrl;
438
439 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
440 void (*adjust_link)(struct net_device *dev);
441};
442#define to_phy_device(d) container_of(to_mdio_device(d), \
443 struct phy_device, mdio)
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466struct phy_driver {
467 struct mdio_driver_common mdiodrv;
468 u32 phy_id;
469 char *name;
470 u32 phy_id_mask;
471 const unsigned long * const features;
472 u32 flags;
473 const void *driver_data;
474
475
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477
478 int (*soft_reset)(struct phy_device *phydev);
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484 int (*config_init)(struct phy_device *phydev);
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490 int (*probe)(struct phy_device *phydev);
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496 int (*get_features)(struct phy_device *phydev);
497
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499 int (*suspend)(struct phy_device *phydev);
500 int (*resume)(struct phy_device *phydev);
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508 int (*config_aneg)(struct phy_device *phydev);
509
510
511 int (*aneg_done)(struct phy_device *phydev);
512
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514 int (*read_status)(struct phy_device *phydev);
515
516
517 int (*ack_interrupt)(struct phy_device *phydev);
518
519
520 int (*config_intr)(struct phy_device *phydev);
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526 int (*did_interrupt)(struct phy_device *phydev);
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529 int (*handle_interrupt)(struct phy_device *phydev);
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531
532 void (*remove)(struct phy_device *phydev);
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538 int (*match_phy_device)(struct phy_device *phydev);
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540
541 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
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544 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
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553 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
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561 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
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566 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
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569 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
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578 void (*link_change_notify)(struct phy_device *dev);
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589 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
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601 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
602 u16 val);
603
604 int (*read_page)(struct phy_device *dev);
605 int (*write_page)(struct phy_device *dev, int page);
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609 int (*module_info)(struct phy_device *dev,
610 struct ethtool_modinfo *modinfo);
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613 int (*module_eeprom)(struct phy_device *dev,
614 struct ethtool_eeprom *ee, u8 *data);
615
616
617 int (*get_sset_count)(struct phy_device *dev);
618 void (*get_strings)(struct phy_device *dev, u8 *data);
619 void (*get_stats)(struct phy_device *dev,
620 struct ethtool_stats *stats, u64 *data);
621
622
623 int (*get_tunable)(struct phy_device *dev,
624 struct ethtool_tunable *tuna, void *data);
625 int (*set_tunable)(struct phy_device *dev,
626 struct ethtool_tunable *tuna,
627 const void *data);
628 int (*set_loopback)(struct phy_device *dev, bool enable);
629};
630#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
631 struct phy_driver, mdiodrv)
632
633#define PHY_ANY_ID "MATCH ANY PHY"
634#define PHY_ANY_UID 0xffffffff
635
636#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
637#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
638#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
639
640
641struct phy_fixup {
642 struct list_head list;
643 char bus_id[MII_BUS_ID_SIZE + 3];
644 u32 phy_uid;
645 u32 phy_uid_mask;
646 int (*run)(struct phy_device *phydev);
647};
648
649const char *phy_speed_to_str(int speed);
650const char *phy_duplex_to_str(unsigned int duplex);
651
652
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654
655struct phy_setting {
656 u32 speed;
657 u8 duplex;
658 u8 bit;
659};
660
661const struct phy_setting *
662phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
663 bool exact);
664size_t phy_speeds(unsigned int *speeds, size_t size,
665 unsigned long *mask);
666void of_set_phy_supported(struct phy_device *phydev);
667void of_set_phy_eee_broken(struct phy_device *phydev);
668
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673static inline bool phy_is_started(struct phy_device *phydev)
674{
675 return phydev->state >= PHY_UP;
676}
677
678void phy_resolve_aneg_linkmode(struct phy_device *phydev);
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689static inline int phy_read(struct phy_device *phydev, u32 regnum)
690{
691 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
692}
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701static inline int __phy_read(struct phy_device *phydev, u32 regnum)
702{
703 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
704}
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716static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
717{
718 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
719}
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729static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
730{
731 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
732 val);
733}
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744int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
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755int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
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767int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
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779int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
780
781int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
782 u16 set);
783int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
784 u16 set);
785int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
786int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
787
788int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
789 u16 mask, u16 set);
790int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
791 u16 mask, u16 set);
792int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
793 u16 mask, u16 set);
794int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
795 u16 mask, u16 set);
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805static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
806{
807 return __phy_modify(phydev, regnum, 0, val);
808}
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818static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
819 u16 val)
820{
821 return __phy_modify(phydev, regnum, val, 0);
822}
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830static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
831{
832 return phy_modify(phydev, regnum, 0, val);
833}
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841static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
842{
843 return phy_modify(phydev, regnum, val, 0);
844}
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856static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
857 u32 regnum, u16 val)
858{
859 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
860}
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872static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
873 u32 regnum, u16 val)
874{
875 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
876}
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885
886static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
887 u32 regnum, u16 val)
888{
889 return phy_modify_mmd(phydev, devad, regnum, 0, val);
890}
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900static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
901 u32 regnum, u16 val)
902{
903 return phy_modify_mmd(phydev, devad, regnum, val, 0);
904}
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913static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
914{
915 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
916}
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923static inline bool phy_polling_mode(struct phy_device *phydev)
924{
925 return phydev->irq == PHY_POLL;
926}
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931
932static inline bool phy_is_internal(struct phy_device *phydev)
933{
934 return phydev->is_internal;
935}
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942static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
943{
944 return mode >= PHY_INTERFACE_MODE_RGMII &&
945 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
946};
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955
956static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
957{
958 return mode == PHY_INTERFACE_MODE_1000BASEX ||
959 mode == PHY_INTERFACE_MODE_2500BASEX;
960}
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966
967static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
968{
969 return phy_interface_mode_is_rgmii(phydev->interface);
970};
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973
974
975
976
977static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
978{
979 return phydev->is_pseudo_fixed_link;
980}
981
982int phy_save_page(struct phy_device *phydev);
983int phy_select_page(struct phy_device *phydev, int page);
984int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
985int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
986int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
987int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
988 u16 mask, u16 set);
989
990struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
991 bool is_c45,
992 struct phy_c45_device_ids *c45_ids);
993#if IS_ENABLED(CONFIG_PHYLIB)
994struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
995int phy_device_register(struct phy_device *phy);
996void phy_device_free(struct phy_device *phydev);
997#else
998static inline
999struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1000{
1001 return NULL;
1002}
1003
1004static inline int phy_device_register(struct phy_device *phy)
1005{
1006 return 0;
1007}
1008
1009static inline void phy_device_free(struct phy_device *phydev) { }
1010#endif
1011void phy_device_remove(struct phy_device *phydev);
1012int phy_init_hw(struct phy_device *phydev);
1013int phy_suspend(struct phy_device *phydev);
1014int phy_resume(struct phy_device *phydev);
1015int __phy_resume(struct phy_device *phydev);
1016int phy_loopback(struct phy_device *phydev, bool enable);
1017struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1018 phy_interface_t interface);
1019struct phy_device *phy_find_first(struct mii_bus *bus);
1020int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1021 u32 flags, phy_interface_t interface);
1022int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1023 void (*handler)(struct net_device *),
1024 phy_interface_t interface);
1025struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1026 void (*handler)(struct net_device *),
1027 phy_interface_t interface);
1028void phy_disconnect(struct phy_device *phydev);
1029void phy_detach(struct phy_device *phydev);
1030void phy_start(struct phy_device *phydev);
1031void phy_stop(struct phy_device *phydev);
1032int phy_start_aneg(struct phy_device *phydev);
1033int phy_aneg_done(struct phy_device *phydev);
1034int phy_speed_down(struct phy_device *phydev, bool sync);
1035int phy_speed_up(struct phy_device *phydev);
1036
1037int phy_restart_aneg(struct phy_device *phydev);
1038int phy_reset_after_clk_enable(struct phy_device *phydev);
1039
1040static inline void phy_device_reset(struct phy_device *phydev, int value)
1041{
1042 mdio_device_reset(&phydev->mdio, value);
1043}
1044
1045#define phydev_err(_phydev, format, args...) \
1046 dev_err(&_phydev->mdio.dev, format, ##args)
1047
1048#define phydev_info(_phydev, format, args...) \
1049 dev_info(&_phydev->mdio.dev, format, ##args)
1050
1051#define phydev_warn(_phydev, format, args...) \
1052 dev_warn(&_phydev->mdio.dev, format, ##args)
1053
1054#define phydev_dbg(_phydev, format, args...) \
1055 dev_dbg(&_phydev->mdio.dev, format, ##args)
1056
1057static inline const char *phydev_name(const struct phy_device *phydev)
1058{
1059 return dev_name(&phydev->mdio.dev);
1060}
1061
1062void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1063 __printf(2, 3);
1064void phy_attached_info(struct phy_device *phydev);
1065
1066
1067int genphy_config_init(struct phy_device *phydev);
1068int genphy_read_abilities(struct phy_device *phydev);
1069int genphy_setup_forced(struct phy_device *phydev);
1070int genphy_restart_aneg(struct phy_device *phydev);
1071int genphy_config_eee_advert(struct phy_device *phydev);
1072int genphy_config_aneg(struct phy_device *phydev);
1073int genphy_aneg_done(struct phy_device *phydev);
1074int genphy_update_link(struct phy_device *phydev);
1075int genphy_read_status(struct phy_device *phydev);
1076int genphy_suspend(struct phy_device *phydev);
1077int genphy_resume(struct phy_device *phydev);
1078int genphy_loopback(struct phy_device *phydev, bool enable);
1079int genphy_soft_reset(struct phy_device *phydev);
1080static inline int genphy_no_soft_reset(struct phy_device *phydev)
1081{
1082 return 0;
1083}
1084static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1085{
1086 return 0;
1087}
1088static inline int genphy_no_config_intr(struct phy_device *phydev)
1089{
1090 return 0;
1091}
1092int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1093 u16 regnum);
1094int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1095 u16 regnum, u16 val);
1096
1097
1098int genphy_c45_restart_aneg(struct phy_device *phydev);
1099int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1100int genphy_c45_aneg_done(struct phy_device *phydev);
1101int genphy_c45_read_link(struct phy_device *phydev);
1102int genphy_c45_read_lpa(struct phy_device *phydev);
1103int genphy_c45_read_pma(struct phy_device *phydev);
1104int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1105int genphy_c45_an_config_aneg(struct phy_device *phydev);
1106int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1107int genphy_c45_read_mdix(struct phy_device *phydev);
1108int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1109int genphy_c45_read_status(struct phy_device *phydev);
1110int genphy_c45_config_aneg(struct phy_device *phydev);
1111
1112
1113int gen10g_config_aneg(struct phy_device *phydev);
1114
1115static inline int phy_read_status(struct phy_device *phydev)
1116{
1117 if (!phydev->drv)
1118 return -EIO;
1119
1120 if (phydev->drv->read_status)
1121 return phydev->drv->read_status(phydev);
1122 else
1123 return genphy_read_status(phydev);
1124}
1125
1126void phy_driver_unregister(struct phy_driver *drv);
1127void phy_drivers_unregister(struct phy_driver *drv, int n);
1128int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1129int phy_drivers_register(struct phy_driver *new_driver, int n,
1130 struct module *owner);
1131void phy_state_machine(struct work_struct *work);
1132void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1133void phy_mac_interrupt(struct phy_device *phydev);
1134void phy_start_machine(struct phy_device *phydev);
1135void phy_stop_machine(struct phy_device *phydev);
1136int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1137void phy_ethtool_ksettings_get(struct phy_device *phydev,
1138 struct ethtool_link_ksettings *cmd);
1139int phy_ethtool_ksettings_set(struct phy_device *phydev,
1140 const struct ethtool_link_ksettings *cmd);
1141int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1142void phy_request_interrupt(struct phy_device *phydev);
1143void phy_free_interrupt(struct phy_device *phydev);
1144void phy_print_status(struct phy_device *phydev);
1145int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1146void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1147void phy_advertise_supported(struct phy_device *phydev);
1148void phy_support_sym_pause(struct phy_device *phydev);
1149void phy_support_asym_pause(struct phy_device *phydev);
1150void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1151 bool autoneg);
1152void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1153bool phy_validate_pause(struct phy_device *phydev,
1154 struct ethtool_pauseparam *pp);
1155
1156int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1157 int (*run)(struct phy_device *));
1158int phy_register_fixup_for_id(const char *bus_id,
1159 int (*run)(struct phy_device *));
1160int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1161 int (*run)(struct phy_device *));
1162
1163int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1164int phy_unregister_fixup_for_id(const char *bus_id);
1165int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1166
1167int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1168int phy_get_eee_err(struct phy_device *phydev);
1169int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1170int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1171int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1172void phy_ethtool_get_wol(struct phy_device *phydev,
1173 struct ethtool_wolinfo *wol);
1174int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1175 struct ethtool_link_ksettings *cmd);
1176int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1177 const struct ethtool_link_ksettings *cmd);
1178int phy_ethtool_nway_reset(struct net_device *ndev);
1179
1180#if IS_ENABLED(CONFIG_PHYLIB)
1181int __init mdio_bus_init(void);
1182void mdio_bus_exit(void);
1183#endif
1184
1185
1186static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1187{
1188 if (!phydev->drv)
1189 return -EIO;
1190
1191 mutex_lock(&phydev->lock);
1192 phydev->drv->get_strings(phydev, data);
1193 mutex_unlock(&phydev->lock);
1194
1195 return 0;
1196}
1197
1198static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1199{
1200 int ret;
1201
1202 if (!phydev->drv)
1203 return -EIO;
1204
1205 if (phydev->drv->get_sset_count &&
1206 phydev->drv->get_strings &&
1207 phydev->drv->get_stats) {
1208 mutex_lock(&phydev->lock);
1209 ret = phydev->drv->get_sset_count(phydev);
1210 mutex_unlock(&phydev->lock);
1211
1212 return ret;
1213 }
1214
1215 return -EOPNOTSUPP;
1216}
1217
1218static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1219 struct ethtool_stats *stats, u64 *data)
1220{
1221 if (!phydev->drv)
1222 return -EIO;
1223
1224 mutex_lock(&phydev->lock);
1225 phydev->drv->get_stats(phydev, stats, data);
1226 mutex_unlock(&phydev->lock);
1227
1228 return 0;
1229}
1230
1231extern struct bus_type mdio_bus_type;
1232
1233struct mdio_board_info {
1234 const char *bus_id;
1235 char modalias[MDIO_NAME_SIZE];
1236 int mdio_addr;
1237 const void *platform_data;
1238};
1239
1240#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1241int mdiobus_register_board_info(const struct mdio_board_info *info,
1242 unsigned int n);
1243#else
1244static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1245 unsigned int n)
1246{
1247 return 0;
1248}
1249#endif
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260#define phy_module_driver(__phy_drivers, __count) \
1261static int __init phy_module_init(void) \
1262{ \
1263 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1264} \
1265module_init(phy_module_init); \
1266static void __exit phy_module_exit(void) \
1267{ \
1268 phy_drivers_unregister(__phy_drivers, __count); \
1269} \
1270module_exit(phy_module_exit)
1271
1272#define module_phy_driver(__phy_drivers) \
1273 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1274
1275bool phy_driver_is_genphy(struct phy_device *phydev);
1276bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1277
1278#endif
1279