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13#include <linux/pci.h>
14#include <linux/pm_runtime.h>
15#include <linux/delay.h>
16#include <sound/pcm_params.h>
17#include <sound/soc.h>
18#include "skl.h"
19#include "skl-topology.h"
20#include "skl-sst-dsp.h"
21#include "skl-sst-ipc.h"
22
23#define HDA_MONO 1
24#define HDA_STEREO 2
25#define HDA_QUAD 4
26#define HDA_MAX 8
27
28static const struct snd_pcm_hardware azx_pcm_hw = {
29 .info = (SNDRV_PCM_INFO_MMAP |
30 SNDRV_PCM_INFO_INTERLEAVED |
31 SNDRV_PCM_INFO_BLOCK_TRANSFER |
32 SNDRV_PCM_INFO_MMAP_VALID |
33 SNDRV_PCM_INFO_PAUSE |
34 SNDRV_PCM_INFO_RESUME |
35 SNDRV_PCM_INFO_SYNC_START |
36 SNDRV_PCM_INFO_HAS_WALL_CLOCK |
37 SNDRV_PCM_INFO_HAS_LINK_ATIME |
38 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
39 .formats = SNDRV_PCM_FMTBIT_S16_LE |
40 SNDRV_PCM_FMTBIT_S32_LE |
41 SNDRV_PCM_FMTBIT_S24_LE,
42 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
43 SNDRV_PCM_RATE_8000,
44 .rate_min = 8000,
45 .rate_max = 48000,
46 .channels_min = 1,
47 .channels_max = 8,
48 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
49 .period_bytes_min = 128,
50 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
51 .periods_min = 2,
52 .periods_max = AZX_MAX_FRAG,
53 .fifo_size = 0,
54};
55
56static inline
57struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
58{
59 return substream->runtime->private_data;
60}
61
62static struct hdac_bus *get_bus_ctx(struct snd_pcm_substream *substream)
63{
64 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
65 struct hdac_stream *hstream = hdac_stream(stream);
66 struct hdac_bus *bus = hstream->bus;
67 return bus;
68}
69
70static int skl_substream_alloc_pages(struct hdac_bus *bus,
71 struct snd_pcm_substream *substream,
72 size_t size)
73{
74 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
75
76 hdac_stream(stream)->bufsize = 0;
77 hdac_stream(stream)->period_bytes = 0;
78 hdac_stream(stream)->format_val = 0;
79
80 return snd_pcm_lib_malloc_pages(substream, size);
81}
82
83static int skl_substream_free_pages(struct hdac_bus *bus,
84 struct snd_pcm_substream *substream)
85{
86 return snd_pcm_lib_free_pages(substream);
87}
88
89static void skl_set_pcm_constrains(struct hdac_bus *bus,
90 struct snd_pcm_runtime *runtime)
91{
92 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
93
94
95 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
96 20, 178000000);
97}
98
99static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_bus *bus)
100{
101 if (bus->ppcap)
102 return HDAC_EXT_STREAM_TYPE_HOST;
103 else
104 return HDAC_EXT_STREAM_TYPE_COUPLED;
105}
106
107
108
109
110
111
112
113
114static void skl_set_suspend_active(struct snd_pcm_substream *substream,
115 struct snd_soc_dai *dai, bool enable)
116{
117 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
118 struct snd_soc_dapm_widget *w;
119 struct skl *skl = bus_to_skl(bus);
120
121 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
122 w = dai->playback_widget;
123 else
124 w = dai->capture_widget;
125
126 if (w->ignore_suspend && enable)
127 skl->supend_active++;
128 else if (w->ignore_suspend && !enable)
129 skl->supend_active--;
130}
131
132int skl_pcm_host_dma_prepare(struct device *dev, struct skl_pipe_params *params)
133{
134 struct hdac_bus *bus = dev_get_drvdata(dev);
135 struct skl *skl = bus_to_skl(bus);
136 unsigned int format_val;
137 struct hdac_stream *hstream;
138 struct hdac_ext_stream *stream;
139 int err;
140
141 hstream = snd_hdac_get_stream(bus, params->stream,
142 params->host_dma_id + 1);
143 if (!hstream)
144 return -EINVAL;
145
146 stream = stream_to_hdac_ext_stream(hstream);
147 snd_hdac_ext_stream_decouple(bus, stream, true);
148
149 format_val = snd_hdac_calc_stream_format(params->s_freq,
150 params->ch, params->format, params->host_bps, 0);
151
152 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
153 format_val, params->s_freq, params->ch, params->format);
154
155 snd_hdac_stream_reset(hdac_stream(stream));
156 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
157 if (err < 0)
158 return err;
159
160
161
162
163
164 if (IS_BXT(skl->pci)) {
165 snd_hdac_ext_stream_decouple(bus, stream, false);
166 err = snd_hdac_stream_setup(hdac_stream(stream));
167 snd_hdac_ext_stream_decouple(bus, stream, true);
168 } else {
169 err = snd_hdac_stream_setup(hdac_stream(stream));
170 }
171
172 if (err < 0)
173 return err;
174
175 hdac_stream(stream)->prepared = 1;
176
177 return 0;
178}
179
180int skl_pcm_link_dma_prepare(struct device *dev, struct skl_pipe_params *params)
181{
182 struct hdac_bus *bus = dev_get_drvdata(dev);
183 unsigned int format_val;
184 struct hdac_stream *hstream;
185 struct hdac_ext_stream *stream;
186 struct hdac_ext_link *link;
187 unsigned char stream_tag;
188
189 hstream = snd_hdac_get_stream(bus, params->stream,
190 params->link_dma_id + 1);
191 if (!hstream)
192 return -EINVAL;
193
194 stream = stream_to_hdac_ext_stream(hstream);
195 snd_hdac_ext_stream_decouple(bus, stream, true);
196 format_val = snd_hdac_calc_stream_format(params->s_freq, params->ch,
197 params->format, params->link_bps, 0);
198
199 dev_dbg(dev, "format_val=%d, rate=%d, ch=%d, format=%d\n",
200 format_val, params->s_freq, params->ch, params->format);
201
202 snd_hdac_ext_link_stream_reset(stream);
203
204 snd_hdac_ext_link_stream_setup(stream, format_val);
205
206 stream_tag = hstream->stream_tag;
207 if (stream->hstream.direction == SNDRV_PCM_STREAM_PLAYBACK) {
208 list_for_each_entry(link, &bus->hlink_list, list) {
209 if (link->index == params->link_index)
210 snd_hdac_ext_link_set_stream_id(link,
211 stream_tag);
212 }
213 }
214
215 stream->link_prepared = 1;
216
217 return 0;
218}
219
220static int skl_pcm_open(struct snd_pcm_substream *substream,
221 struct snd_soc_dai *dai)
222{
223 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
224 struct hdac_ext_stream *stream;
225 struct snd_pcm_runtime *runtime = substream->runtime;
226 struct skl_dma_params *dma_params;
227 struct skl *skl = get_skl_ctx(dai->dev);
228 struct skl_module_cfg *mconfig;
229
230 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
231
232 stream = snd_hdac_ext_stream_assign(bus, substream,
233 skl_get_host_stream_type(bus));
234 if (stream == NULL)
235 return -EBUSY;
236
237 skl_set_pcm_constrains(bus, runtime);
238
239
240
241
242
243 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
244 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK;
245 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
246 }
247
248 runtime->private_data = stream;
249
250 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
251 if (!dma_params)
252 return -ENOMEM;
253
254 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
255 snd_soc_dai_set_dma_data(dai, substream, dma_params);
256
257 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
258 dma_params->stream_tag);
259 skl_set_suspend_active(substream, dai, true);
260 snd_pcm_set_sync(substream);
261
262 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
263 if (!mconfig)
264 return -EINVAL;
265
266 skl_tplg_d0i3_get(skl, mconfig->d0i3_caps);
267
268 return 0;
269}
270
271static int skl_pcm_prepare(struct snd_pcm_substream *substream,
272 struct snd_soc_dai *dai)
273{
274 struct skl *skl = get_skl_ctx(dai->dev);
275 struct skl_module_cfg *mconfig;
276 int ret;
277
278 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
279
280 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
281
282
283
284
285
286 if (mconfig &&
287 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN ||
288 mconfig->pipe->state == SKL_PIPE_CREATED ||
289 mconfig->pipe->state == SKL_PIPE_PAUSED)) {
290
291 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
292
293 if (ret < 0)
294 return ret;
295
296 ret = skl_pcm_host_dma_prepare(dai->dev,
297 mconfig->pipe->p_params);
298 if (ret < 0)
299 return ret;
300 }
301
302 return 0;
303}
304
305static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
306 struct snd_pcm_hw_params *params,
307 struct snd_soc_dai *dai)
308{
309 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
310 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
311 struct snd_pcm_runtime *runtime = substream->runtime;
312 struct skl_pipe_params p_params = {0};
313 struct skl_module_cfg *m_cfg;
314 int ret, dma_id;
315
316 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
317 ret = skl_substream_alloc_pages(bus, substream,
318 params_buffer_bytes(params));
319 if (ret < 0)
320 return ret;
321
322 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
323 runtime->rate, runtime->channels, runtime->format);
324
325 dma_id = hdac_stream(stream)->stream_tag - 1;
326 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
327
328 p_params.s_fmt = snd_pcm_format_width(params_format(params));
329 p_params.ch = params_channels(params);
330 p_params.s_freq = params_rate(params);
331 p_params.host_dma_id = dma_id;
332 p_params.stream = substream->stream;
333 p_params.format = params_format(params);
334 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
335 p_params.host_bps = dai->driver->playback.sig_bits;
336 else
337 p_params.host_bps = dai->driver->capture.sig_bits;
338
339
340 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
341 if (m_cfg)
342 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
343
344 return 0;
345}
346
347static void skl_pcm_close(struct snd_pcm_substream *substream,
348 struct snd_soc_dai *dai)
349{
350 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
351 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
352 struct skl_dma_params *dma_params = NULL;
353 struct skl *skl = bus_to_skl(bus);
354 struct skl_module_cfg *mconfig;
355
356 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
357
358 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(bus));
359
360 dma_params = snd_soc_dai_get_dma_data(dai, substream);
361
362
363
364
365 snd_soc_dai_set_dma_data(dai, substream, NULL);
366 skl_set_suspend_active(substream, dai, false);
367
368
369
370
371
372 if (!strncmp(dai->name, "Reference Pin", 13) &&
373 skl->skl_sst->miscbdcg_disabled) {
374 skl->skl_sst->enable_miscbdcge(dai->dev, true);
375 skl->skl_sst->miscbdcg_disabled = false;
376 }
377
378 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
379 if (mconfig)
380 skl_tplg_d0i3_put(skl, mconfig->d0i3_caps);
381
382 kfree(dma_params);
383}
384
385static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
386 struct snd_soc_dai *dai)
387{
388 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
389 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
390 struct skl *skl = get_skl_ctx(dai->dev);
391 struct skl_module_cfg *mconfig;
392 int ret;
393
394 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
395
396 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
397
398 if (mconfig) {
399 ret = skl_reset_pipe(skl->skl_sst, mconfig->pipe);
400 if (ret < 0)
401 dev_err(dai->dev, "%s:Reset failed ret =%d",
402 __func__, ret);
403 }
404
405 snd_hdac_stream_cleanup(hdac_stream(stream));
406 hdac_stream(stream)->prepared = 0;
407
408 return skl_substream_free_pages(bus, substream);
409}
410
411static int skl_be_hw_params(struct snd_pcm_substream *substream,
412 struct snd_pcm_hw_params *params,
413 struct snd_soc_dai *dai)
414{
415 struct skl_pipe_params p_params = {0};
416
417 p_params.s_fmt = snd_pcm_format_width(params_format(params));
418 p_params.ch = params_channels(params);
419 p_params.s_freq = params_rate(params);
420 p_params.stream = substream->stream;
421
422 return skl_tplg_be_update_params(dai, &p_params);
423}
424
425static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
426 int cmd)
427{
428 struct hdac_bus *bus = get_bus_ctx(substream);
429 struct hdac_ext_stream *stream;
430 int start;
431 unsigned long cookie;
432 struct hdac_stream *hstr;
433
434 stream = get_hdac_ext_stream(substream);
435 hstr = hdac_stream(stream);
436
437 if (!hstr->prepared)
438 return -EPIPE;
439
440 switch (cmd) {
441 case SNDRV_PCM_TRIGGER_START:
442 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
443 case SNDRV_PCM_TRIGGER_RESUME:
444 start = 1;
445 break;
446
447 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
448 case SNDRV_PCM_TRIGGER_SUSPEND:
449 case SNDRV_PCM_TRIGGER_STOP:
450 start = 0;
451 break;
452
453 default:
454 return -EINVAL;
455 }
456
457 spin_lock_irqsave(&bus->reg_lock, cookie);
458
459 if (start) {
460 snd_hdac_stream_start(hdac_stream(stream), true);
461 snd_hdac_stream_timecounter_init(hstr, 0);
462 } else {
463 snd_hdac_stream_stop(hdac_stream(stream));
464 }
465
466 spin_unlock_irqrestore(&bus->reg_lock, cookie);
467
468 return 0;
469}
470
471static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
472 struct snd_soc_dai *dai)
473{
474 struct skl *skl = get_skl_ctx(dai->dev);
475 struct skl_sst *ctx = skl->skl_sst;
476 struct skl_module_cfg *mconfig;
477 struct hdac_bus *bus = get_bus_ctx(substream);
478 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
479 struct snd_soc_dapm_widget *w;
480 int ret;
481
482 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
483 if (!mconfig)
484 return -EIO;
485
486 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
487 w = dai->playback_widget;
488 else
489 w = dai->capture_widget;
490
491 switch (cmd) {
492 case SNDRV_PCM_TRIGGER_RESUME:
493 if (!w->ignore_suspend) {
494
495
496
497
498
499 snd_hdac_ext_stream_drsm_enable(bus, true,
500 hdac_stream(stream)->index);
501 snd_hdac_ext_stream_set_dpibr(bus, stream,
502 stream->lpib);
503 snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
504 }
505
506
507 case SNDRV_PCM_TRIGGER_START:
508 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
509
510
511
512
513
514
515 ret = skl_decoupled_trigger(substream, cmd);
516 if (ret < 0)
517 return ret;
518 return skl_run_pipe(ctx, mconfig->pipe);
519 break;
520
521 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
522 case SNDRV_PCM_TRIGGER_SUSPEND:
523 case SNDRV_PCM_TRIGGER_STOP:
524
525
526
527
528
529 ret = skl_stop_pipe(ctx, mconfig->pipe);
530 if (ret < 0)
531 return ret;
532
533 ret = skl_decoupled_trigger(substream, cmd);
534 if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
535
536 stream->dpib = readl(bus->remap_addr +
537 AZX_REG_VS_SDXDPIB_XBASE +
538 (AZX_REG_VS_SDXDPIB_XINTERVAL *
539 hdac_stream(stream)->index));
540
541 stream->lpib = snd_hdac_stream_get_pos_lpib(
542 hdac_stream(stream));
543 snd_hdac_ext_stream_decouple(bus, stream, false);
544 }
545 break;
546
547 default:
548 return -EINVAL;
549 }
550
551 return 0;
552}
553
554
555static int skl_link_hw_params(struct snd_pcm_substream *substream,
556 struct snd_pcm_hw_params *params,
557 struct snd_soc_dai *dai)
558{
559 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
560 struct hdac_ext_stream *link_dev;
561 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
562 struct snd_soc_dai *codec_dai = rtd->codec_dai;
563 struct skl_pipe_params p_params = {0};
564 struct hdac_ext_link *link;
565 int stream_tag;
566
567 link_dev = snd_hdac_ext_stream_assign(bus, substream,
568 HDAC_EXT_STREAM_TYPE_LINK);
569 if (!link_dev)
570 return -EBUSY;
571
572 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
573
574 link = snd_hdac_ext_bus_get_link(bus, codec_dai->component->name);
575 if (!link)
576 return -EINVAL;
577
578 stream_tag = hdac_stream(link_dev)->stream_tag;
579
580
581 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
582 snd_soc_dai_set_tdm_slot(codec_dai, stream_tag, 0, 0, 0);
583 else
584 snd_soc_dai_set_tdm_slot(codec_dai, 0, stream_tag, 0, 0);
585
586 p_params.s_fmt = snd_pcm_format_width(params_format(params));
587 p_params.ch = params_channels(params);
588 p_params.s_freq = params_rate(params);
589 p_params.stream = substream->stream;
590 p_params.link_dma_id = stream_tag - 1;
591 p_params.link_index = link->index;
592 p_params.format = params_format(params);
593
594 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
595 p_params.link_bps = codec_dai->driver->playback.sig_bits;
596 else
597 p_params.link_bps = codec_dai->driver->capture.sig_bits;
598
599 return skl_tplg_be_update_params(dai, &p_params);
600}
601
602static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
603 struct snd_soc_dai *dai)
604{
605 struct skl *skl = get_skl_ctx(dai->dev);
606 struct skl_module_cfg *mconfig = NULL;
607
608
609 mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
610 if (mconfig && !mconfig->pipe->passthru &&
611 (substream->runtime->status->state == SNDRV_PCM_STATE_XRUN))
612 skl_reset_pipe(skl->skl_sst, mconfig->pipe);
613
614 return 0;
615}
616
617static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
618 int cmd, struct snd_soc_dai *dai)
619{
620 struct hdac_ext_stream *link_dev =
621 snd_soc_dai_get_dma_data(dai, substream);
622 struct hdac_bus *bus = get_bus_ctx(substream);
623 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
624
625 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
626 switch (cmd) {
627 case SNDRV_PCM_TRIGGER_RESUME:
628 case SNDRV_PCM_TRIGGER_START:
629 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
630 snd_hdac_ext_link_stream_start(link_dev);
631 break;
632
633 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
634 case SNDRV_PCM_TRIGGER_SUSPEND:
635 case SNDRV_PCM_TRIGGER_STOP:
636 snd_hdac_ext_link_stream_clear(link_dev);
637 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
638 snd_hdac_ext_stream_decouple(bus, stream, false);
639 break;
640
641 default:
642 return -EINVAL;
643 }
644 return 0;
645}
646
647static int skl_link_hw_free(struct snd_pcm_substream *substream,
648 struct snd_soc_dai *dai)
649{
650 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
651 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
652 struct hdac_ext_stream *link_dev =
653 snd_soc_dai_get_dma_data(dai, substream);
654 struct hdac_ext_link *link;
655 unsigned char stream_tag;
656
657 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
658
659 link_dev->link_prepared = 0;
660
661 link = snd_hdac_ext_bus_get_link(bus, rtd->codec_dai->component->name);
662 if (!link)
663 return -EINVAL;
664
665 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
666 stream_tag = hdac_stream(link_dev)->stream_tag;
667 snd_hdac_ext_link_clear_stream_id(link, stream_tag);
668 }
669
670 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
671 return 0;
672}
673
674static const struct snd_soc_dai_ops skl_pcm_dai_ops = {
675 .startup = skl_pcm_open,
676 .shutdown = skl_pcm_close,
677 .prepare = skl_pcm_prepare,
678 .hw_params = skl_pcm_hw_params,
679 .hw_free = skl_pcm_hw_free,
680 .trigger = skl_pcm_trigger,
681};
682
683static const struct snd_soc_dai_ops skl_dmic_dai_ops = {
684 .hw_params = skl_be_hw_params,
685};
686
687static const struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
688 .hw_params = skl_be_hw_params,
689};
690
691static const struct snd_soc_dai_ops skl_link_dai_ops = {
692 .prepare = skl_link_pcm_prepare,
693 .hw_params = skl_link_hw_params,
694 .hw_free = skl_link_hw_free,
695 .trigger = skl_link_pcm_trigger,
696};
697
698static struct snd_soc_dai_driver skl_fe_dai[] = {
699{
700 .name = "System Pin",
701 .ops = &skl_pcm_dai_ops,
702 .playback = {
703 .stream_name = "System Playback",
704 .channels_min = HDA_MONO,
705 .channels_max = HDA_STEREO,
706 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
707 .formats = SNDRV_PCM_FMTBIT_S16_LE |
708 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
709 .sig_bits = 32,
710 },
711 .capture = {
712 .stream_name = "System Capture",
713 .channels_min = HDA_MONO,
714 .channels_max = HDA_STEREO,
715 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
716 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
717 .sig_bits = 32,
718 },
719},
720{
721 .name = "System Pin2",
722 .ops = &skl_pcm_dai_ops,
723 .playback = {
724 .stream_name = "Headset Playback",
725 .channels_min = HDA_MONO,
726 .channels_max = HDA_STEREO,
727 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
728 SNDRV_PCM_RATE_8000,
729 .formats = SNDRV_PCM_FMTBIT_S16_LE |
730 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
731 },
732},
733{
734 .name = "Echoref Pin",
735 .ops = &skl_pcm_dai_ops,
736 .capture = {
737 .stream_name = "Echoreference Capture",
738 .channels_min = HDA_STEREO,
739 .channels_max = HDA_STEREO,
740 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
741 SNDRV_PCM_RATE_8000,
742 .formats = SNDRV_PCM_FMTBIT_S16_LE |
743 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
744 },
745},
746{
747 .name = "Reference Pin",
748 .ops = &skl_pcm_dai_ops,
749 .capture = {
750 .stream_name = "Reference Capture",
751 .channels_min = HDA_MONO,
752 .channels_max = HDA_QUAD,
753 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
754 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
755 .sig_bits = 32,
756 },
757},
758{
759 .name = "Deepbuffer Pin",
760 .ops = &skl_pcm_dai_ops,
761 .playback = {
762 .stream_name = "Deepbuffer Playback",
763 .channels_min = HDA_STEREO,
764 .channels_max = HDA_STEREO,
765 .rates = SNDRV_PCM_RATE_48000,
766 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
767 .sig_bits = 32,
768 },
769},
770{
771 .name = "LowLatency Pin",
772 .ops = &skl_pcm_dai_ops,
773 .playback = {
774 .stream_name = "Low Latency Playback",
775 .channels_min = HDA_STEREO,
776 .channels_max = HDA_STEREO,
777 .rates = SNDRV_PCM_RATE_48000,
778 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
779 .sig_bits = 32,
780 },
781},
782{
783 .name = "DMIC Pin",
784 .ops = &skl_pcm_dai_ops,
785 .capture = {
786 .stream_name = "DMIC Capture",
787 .channels_min = HDA_MONO,
788 .channels_max = HDA_QUAD,
789 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
790 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
791 .sig_bits = 32,
792 },
793},
794{
795 .name = "HDMI1 Pin",
796 .ops = &skl_pcm_dai_ops,
797 .playback = {
798 .stream_name = "HDMI1 Playback",
799 .channels_min = HDA_STEREO,
800 .channels_max = 8,
801 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
802 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
803 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
804 SNDRV_PCM_RATE_192000,
805 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
806 SNDRV_PCM_FMTBIT_S32_LE,
807 .sig_bits = 32,
808 },
809},
810{
811 .name = "HDMI2 Pin",
812 .ops = &skl_pcm_dai_ops,
813 .playback = {
814 .stream_name = "HDMI2 Playback",
815 .channels_min = HDA_STEREO,
816 .channels_max = 8,
817 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
818 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
819 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
820 SNDRV_PCM_RATE_192000,
821 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
822 SNDRV_PCM_FMTBIT_S32_LE,
823 .sig_bits = 32,
824 },
825},
826{
827 .name = "HDMI3 Pin",
828 .ops = &skl_pcm_dai_ops,
829 .playback = {
830 .stream_name = "HDMI3 Playback",
831 .channels_min = HDA_STEREO,
832 .channels_max = 8,
833 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
834 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
835 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
836 SNDRV_PCM_RATE_192000,
837 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
838 SNDRV_PCM_FMTBIT_S32_LE,
839 .sig_bits = 32,
840 },
841},
842};
843
844
845static struct snd_soc_dai_driver skl_platform_dai[] = {
846{
847 .name = "SSP0 Pin",
848 .ops = &skl_be_ssp_dai_ops,
849 .playback = {
850 .stream_name = "ssp0 Tx",
851 .channels_min = HDA_STEREO,
852 .channels_max = HDA_STEREO,
853 .rates = SNDRV_PCM_RATE_48000,
854 .formats = SNDRV_PCM_FMTBIT_S16_LE,
855 },
856 .capture = {
857 .stream_name = "ssp0 Rx",
858 .channels_min = HDA_STEREO,
859 .channels_max = HDA_STEREO,
860 .rates = SNDRV_PCM_RATE_48000,
861 .formats = SNDRV_PCM_FMTBIT_S16_LE,
862 },
863},
864{
865 .name = "SSP1 Pin",
866 .ops = &skl_be_ssp_dai_ops,
867 .playback = {
868 .stream_name = "ssp1 Tx",
869 .channels_min = HDA_STEREO,
870 .channels_max = HDA_STEREO,
871 .rates = SNDRV_PCM_RATE_48000,
872 .formats = SNDRV_PCM_FMTBIT_S16_LE,
873 },
874 .capture = {
875 .stream_name = "ssp1 Rx",
876 .channels_min = HDA_STEREO,
877 .channels_max = HDA_STEREO,
878 .rates = SNDRV_PCM_RATE_48000,
879 .formats = SNDRV_PCM_FMTBIT_S16_LE,
880 },
881},
882{
883 .name = "SSP2 Pin",
884 .ops = &skl_be_ssp_dai_ops,
885 .playback = {
886 .stream_name = "ssp2 Tx",
887 .channels_min = HDA_STEREO,
888 .channels_max = HDA_STEREO,
889 .rates = SNDRV_PCM_RATE_48000,
890 .formats = SNDRV_PCM_FMTBIT_S16_LE,
891 },
892 .capture = {
893 .stream_name = "ssp2 Rx",
894 .channels_min = HDA_STEREO,
895 .channels_max = HDA_STEREO,
896 .rates = SNDRV_PCM_RATE_48000,
897 .formats = SNDRV_PCM_FMTBIT_S16_LE,
898 },
899},
900{
901 .name = "SSP3 Pin",
902 .ops = &skl_be_ssp_dai_ops,
903 .playback = {
904 .stream_name = "ssp3 Tx",
905 .channels_min = HDA_STEREO,
906 .channels_max = HDA_STEREO,
907 .rates = SNDRV_PCM_RATE_48000,
908 .formats = SNDRV_PCM_FMTBIT_S16_LE,
909 },
910 .capture = {
911 .stream_name = "ssp3 Rx",
912 .channels_min = HDA_STEREO,
913 .channels_max = HDA_STEREO,
914 .rates = SNDRV_PCM_RATE_48000,
915 .formats = SNDRV_PCM_FMTBIT_S16_LE,
916 },
917},
918{
919 .name = "SSP4 Pin",
920 .ops = &skl_be_ssp_dai_ops,
921 .playback = {
922 .stream_name = "ssp4 Tx",
923 .channels_min = HDA_STEREO,
924 .channels_max = HDA_STEREO,
925 .rates = SNDRV_PCM_RATE_48000,
926 .formats = SNDRV_PCM_FMTBIT_S16_LE,
927 },
928 .capture = {
929 .stream_name = "ssp4 Rx",
930 .channels_min = HDA_STEREO,
931 .channels_max = HDA_STEREO,
932 .rates = SNDRV_PCM_RATE_48000,
933 .formats = SNDRV_PCM_FMTBIT_S16_LE,
934 },
935},
936{
937 .name = "SSP5 Pin",
938 .ops = &skl_be_ssp_dai_ops,
939 .playback = {
940 .stream_name = "ssp5 Tx",
941 .channels_min = HDA_STEREO,
942 .channels_max = HDA_STEREO,
943 .rates = SNDRV_PCM_RATE_48000,
944 .formats = SNDRV_PCM_FMTBIT_S16_LE,
945 },
946 .capture = {
947 .stream_name = "ssp5 Rx",
948 .channels_min = HDA_STEREO,
949 .channels_max = HDA_STEREO,
950 .rates = SNDRV_PCM_RATE_48000,
951 .formats = SNDRV_PCM_FMTBIT_S16_LE,
952 },
953},
954{
955 .name = "iDisp1 Pin",
956 .ops = &skl_link_dai_ops,
957 .playback = {
958 .stream_name = "iDisp1 Tx",
959 .channels_min = HDA_STEREO,
960 .channels_max = 8,
961 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
962 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
963 SNDRV_PCM_FMTBIT_S24_LE,
964 },
965},
966{
967 .name = "iDisp2 Pin",
968 .ops = &skl_link_dai_ops,
969 .playback = {
970 .stream_name = "iDisp2 Tx",
971 .channels_min = HDA_STEREO,
972 .channels_max = 8,
973 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
974 SNDRV_PCM_RATE_48000,
975 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
976 SNDRV_PCM_FMTBIT_S24_LE,
977 },
978},
979{
980 .name = "iDisp3 Pin",
981 .ops = &skl_link_dai_ops,
982 .playback = {
983 .stream_name = "iDisp3 Tx",
984 .channels_min = HDA_STEREO,
985 .channels_max = 8,
986 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
987 SNDRV_PCM_RATE_48000,
988 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
989 SNDRV_PCM_FMTBIT_S24_LE,
990 },
991},
992{
993 .name = "DMIC01 Pin",
994 .ops = &skl_dmic_dai_ops,
995 .capture = {
996 .stream_name = "DMIC01 Rx",
997 .channels_min = HDA_MONO,
998 .channels_max = HDA_QUAD,
999 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
1000 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
1001 },
1002},
1003{
1004 .name = "DMIC16k Pin",
1005 .ops = &skl_dmic_dai_ops,
1006 .capture = {
1007 .stream_name = "DMIC16k Rx",
1008 .channels_min = HDA_MONO,
1009 .channels_max = HDA_QUAD,
1010 .rates = SNDRV_PCM_RATE_16000,
1011 .formats = SNDRV_PCM_FMTBIT_S16_LE,
1012 },
1013},
1014{
1015 .name = "Analog CPU DAI",
1016 .ops = &skl_link_dai_ops,
1017 .playback = {
1018 .stream_name = "Analog CPU Playback",
1019 .channels_min = HDA_MONO,
1020 .channels_max = HDA_MAX,
1021 .rates = SNDRV_PCM_RATE_8000_192000,
1022 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1023 SNDRV_PCM_FMTBIT_S32_LE,
1024 },
1025 .capture = {
1026 .stream_name = "Analog CPU Capture",
1027 .channels_min = HDA_MONO,
1028 .channels_max = HDA_MAX,
1029 .rates = SNDRV_PCM_RATE_8000_192000,
1030 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1031 SNDRV_PCM_FMTBIT_S32_LE,
1032 },
1033},
1034{
1035 .name = "Alt Analog CPU DAI",
1036 .ops = &skl_link_dai_ops,
1037 .playback = {
1038 .stream_name = "Alt Analog CPU Playback",
1039 .channels_min = HDA_MONO,
1040 .channels_max = HDA_MAX,
1041 .rates = SNDRV_PCM_RATE_8000_192000,
1042 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1043 SNDRV_PCM_FMTBIT_S32_LE,
1044 },
1045 .capture = {
1046 .stream_name = "Alt Analog CPU Capture",
1047 .channels_min = HDA_MONO,
1048 .channels_max = HDA_MAX,
1049 .rates = SNDRV_PCM_RATE_8000_192000,
1050 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1051 SNDRV_PCM_FMTBIT_S32_LE,
1052 },
1053},
1054{
1055 .name = "Digital CPU DAI",
1056 .ops = &skl_link_dai_ops,
1057 .playback = {
1058 .stream_name = "Digital CPU Playback",
1059 .channels_min = HDA_MONO,
1060 .channels_max = HDA_MAX,
1061 .rates = SNDRV_PCM_RATE_8000_192000,
1062 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1063 SNDRV_PCM_FMTBIT_S32_LE,
1064 },
1065 .capture = {
1066 .stream_name = "Digital CPU Capture",
1067 .channels_min = HDA_MONO,
1068 .channels_max = HDA_MAX,
1069 .rates = SNDRV_PCM_RATE_8000_192000,
1070 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
1071 SNDRV_PCM_FMTBIT_S32_LE,
1072 },
1073},
1074};
1075
1076int skl_dai_load(struct snd_soc_component *cmp, int index,
1077 struct snd_soc_dai_driver *dai_drv,
1078 struct snd_soc_tplg_pcm *pcm, struct snd_soc_dai *dai)
1079{
1080 dai_drv->ops = &skl_pcm_dai_ops;
1081
1082 return 0;
1083}
1084
1085static int skl_platform_open(struct snd_pcm_substream *substream)
1086{
1087 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1088 struct snd_soc_dai_link *dai_link = rtd->dai_link;
1089
1090 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
1091 dai_link->cpus->dai_name);
1092
1093 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
1094
1095 return 0;
1096}
1097
1098static int skl_coupled_trigger(struct snd_pcm_substream *substream,
1099 int cmd)
1100{
1101 struct hdac_bus *bus = get_bus_ctx(substream);
1102 struct hdac_ext_stream *stream;
1103 struct snd_pcm_substream *s;
1104 bool start;
1105 int sbits = 0;
1106 unsigned long cookie;
1107 struct hdac_stream *hstr;
1108
1109 stream = get_hdac_ext_stream(substream);
1110 hstr = hdac_stream(stream);
1111
1112 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
1113
1114 if (!hstr->prepared)
1115 return -EPIPE;
1116
1117 switch (cmd) {
1118 case SNDRV_PCM_TRIGGER_START:
1119 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1120 case SNDRV_PCM_TRIGGER_RESUME:
1121 start = true;
1122 break;
1123
1124 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1125 case SNDRV_PCM_TRIGGER_SUSPEND:
1126 case SNDRV_PCM_TRIGGER_STOP:
1127 start = false;
1128 break;
1129
1130 default:
1131 return -EINVAL;
1132 }
1133
1134 snd_pcm_group_for_each_entry(s, substream) {
1135 if (s->pcm->card != substream->pcm->card)
1136 continue;
1137 stream = get_hdac_ext_stream(s);
1138 sbits |= 1 << hdac_stream(stream)->index;
1139 snd_pcm_trigger_done(s, substream);
1140 }
1141
1142 spin_lock_irqsave(&bus->reg_lock, cookie);
1143
1144
1145 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
1146
1147 snd_pcm_group_for_each_entry(s, substream) {
1148 if (s->pcm->card != substream->pcm->card)
1149 continue;
1150 stream = get_hdac_ext_stream(s);
1151 if (start)
1152 snd_hdac_stream_start(hdac_stream(stream), true);
1153 else
1154 snd_hdac_stream_stop(hdac_stream(stream));
1155 }
1156 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1157
1158 snd_hdac_stream_sync(hstr, start, sbits);
1159
1160 spin_lock_irqsave(&bus->reg_lock, cookie);
1161
1162
1163 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
1164 if (start)
1165 snd_hdac_stream_timecounter_init(hstr, sbits);
1166 spin_unlock_irqrestore(&bus->reg_lock, cookie);
1167
1168 return 0;
1169}
1170
1171static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
1172 int cmd)
1173{
1174 struct hdac_bus *bus = get_bus_ctx(substream);
1175
1176 if (!bus->ppcap)
1177 return skl_coupled_trigger(substream, cmd);
1178
1179 return 0;
1180}
1181
1182static snd_pcm_uframes_t skl_platform_pcm_pointer
1183 (struct snd_pcm_substream *substream)
1184{
1185 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
1186 struct hdac_bus *bus = get_bus_ctx(substream);
1187 unsigned int pos;
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1211 pos = readl(bus->remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
1212 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1213 hdac_stream(hstream)->index));
1214 } else {
1215 udelay(20);
1216 readl(bus->remap_addr +
1217 AZX_REG_VS_SDXDPIB_XBASE +
1218 (AZX_REG_VS_SDXDPIB_XINTERVAL *
1219 hdac_stream(hstream)->index));
1220 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
1221 }
1222
1223 if (pos >= hdac_stream(hstream)->bufsize)
1224 pos = 0;
1225
1226 return bytes_to_frames(substream->runtime, pos);
1227}
1228
1229static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
1230 u64 nsec)
1231{
1232 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
1233 struct snd_soc_dai *codec_dai = rtd->codec_dai;
1234 u64 codec_frames, codec_nsecs;
1235
1236 if (!codec_dai->driver->ops->delay)
1237 return nsec;
1238
1239 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
1240 codec_nsecs = div_u64(codec_frames * 1000000000LL,
1241 substream->runtime->rate);
1242
1243 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1244 return nsec + codec_nsecs;
1245
1246 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
1247}
1248
1249static int skl_get_time_info(struct snd_pcm_substream *substream,
1250 struct timespec *system_ts, struct timespec *audio_ts,
1251 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
1252 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
1253{
1254 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
1255 struct hdac_stream *hstr = hdac_stream(sstream);
1256 u64 nsec;
1257
1258 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
1259 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
1260
1261 snd_pcm_gettime(substream->runtime, system_ts);
1262
1263 nsec = timecounter_read(&hstr->tc);
1264 nsec = div_u64(nsec, 3);
1265 if (audio_tstamp_config->report_delay)
1266 nsec = skl_adjust_codec_delay(substream, nsec);
1267
1268 *audio_ts = ns_to_timespec(nsec);
1269
1270 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
1271 audio_tstamp_report->accuracy_report = 1;
1272 audio_tstamp_report->accuracy = 42;
1273
1274 } else {
1275 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
1276 }
1277
1278 return 0;
1279}
1280
1281static const struct snd_pcm_ops skl_platform_ops = {
1282 .open = skl_platform_open,
1283 .ioctl = snd_pcm_lib_ioctl,
1284 .trigger = skl_platform_pcm_trigger,
1285 .pointer = skl_platform_pcm_pointer,
1286 .get_time_info = skl_get_time_info,
1287 .mmap = snd_pcm_lib_default_mmap,
1288 .page = snd_pcm_sgbuf_ops_page,
1289};
1290
1291static void skl_pcm_free(struct snd_pcm *pcm)
1292{
1293 snd_pcm_lib_preallocate_free_for_all(pcm);
1294}
1295
1296#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
1297
1298static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
1299{
1300 struct snd_soc_dai *dai = rtd->cpu_dai;
1301 struct hdac_bus *bus = dev_get_drvdata(dai->dev);
1302 struct snd_pcm *pcm = rtd->pcm;
1303 unsigned int size;
1304 struct skl *skl = bus_to_skl(bus);
1305
1306 if (dai->driver->playback.channels_min ||
1307 dai->driver->capture.channels_min) {
1308
1309 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
1310 if (size > MAX_PREALLOC_SIZE)
1311 size = MAX_PREALLOC_SIZE;
1312 snd_pcm_lib_preallocate_pages_for_all(pcm,
1313 SNDRV_DMA_TYPE_DEV_SG,
1314 snd_dma_pci_data(skl->pci),
1315 size, MAX_PREALLOC_SIZE);
1316 }
1317
1318 return 0;
1319}
1320
1321static int skl_get_module_info(struct skl *skl, struct skl_module_cfg *mconfig)
1322{
1323 struct skl_sst *ctx = skl->skl_sst;
1324 struct skl_module_inst_id *pin_id;
1325 guid_t *uuid_mod, *uuid_tplg;
1326 struct skl_module *skl_module;
1327 struct uuid_module *module;
1328 int i, ret = -EIO;
1329
1330 uuid_mod = (guid_t *)mconfig->guid;
1331
1332 if (list_empty(&ctx->uuid_list)) {
1333 dev_err(ctx->dev, "Module list is empty\n");
1334 return -EIO;
1335 }
1336
1337 list_for_each_entry(module, &ctx->uuid_list, list) {
1338 if (guid_equal(uuid_mod, &module->uuid)) {
1339 mconfig->id.module_id = module->id;
1340 if (mconfig->module)
1341 mconfig->module->loadable = module->is_loadable;
1342 ret = 0;
1343 break;
1344 }
1345 }
1346
1347 if (ret)
1348 return ret;
1349
1350 uuid_mod = &module->uuid;
1351 ret = -EIO;
1352 for (i = 0; i < skl->nr_modules; i++) {
1353 skl_module = skl->modules[i];
1354 uuid_tplg = &skl_module->uuid;
1355 if (guid_equal(uuid_mod, uuid_tplg)) {
1356 mconfig->module = skl_module;
1357 ret = 0;
1358 break;
1359 }
1360 }
1361 if (skl->nr_modules && ret)
1362 return ret;
1363
1364 list_for_each_entry(module, &ctx->uuid_list, list) {
1365 for (i = 0; i < MAX_IN_QUEUE; i++) {
1366 pin_id = &mconfig->m_in_pin[i].id;
1367 if (guid_equal(&pin_id->mod_uuid, &module->uuid))
1368 pin_id->module_id = module->id;
1369 }
1370
1371 for (i = 0; i < MAX_OUT_QUEUE; i++) {
1372 pin_id = &mconfig->m_out_pin[i].id;
1373 if (guid_equal(&pin_id->mod_uuid, &module->uuid))
1374 pin_id->module_id = module->id;
1375 }
1376 }
1377
1378 return 0;
1379}
1380
1381static int skl_populate_modules(struct skl *skl)
1382{
1383 struct skl_pipeline *p;
1384 struct skl_pipe_module *m;
1385 struct snd_soc_dapm_widget *w;
1386 struct skl_module_cfg *mconfig;
1387 int ret = 0;
1388
1389 list_for_each_entry(p, &skl->ppl_list, node) {
1390 list_for_each_entry(m, &p->pipe->w_list, node) {
1391 w = m->w;
1392 mconfig = w->priv;
1393
1394 ret = skl_get_module_info(skl, mconfig);
1395 if (ret < 0) {
1396 dev_err(skl->skl_sst->dev,
1397 "query module info failed\n");
1398 return ret;
1399 }
1400
1401 skl_tplg_add_moduleid_in_bind_params(skl, w);
1402 }
1403 }
1404
1405 return ret;
1406}
1407
1408static int skl_platform_soc_probe(struct snd_soc_component *component)
1409{
1410 struct hdac_bus *bus = dev_get_drvdata(component->dev);
1411 struct skl *skl = bus_to_skl(bus);
1412 const struct skl_dsp_ops *ops;
1413 int ret;
1414
1415 pm_runtime_get_sync(component->dev);
1416 if (bus->ppcap) {
1417 skl->component = component;
1418
1419
1420 skl->debugfs = skl_debugfs_init(skl);
1421
1422 ret = skl_tplg_init(component, bus);
1423 if (ret < 0) {
1424 dev_err(component->dev, "Failed to init topology!\n");
1425 return ret;
1426 }
1427
1428
1429 ops = skl_get_dsp_ops(skl->pci->device);
1430 if (!ops)
1431 return -EIO;
1432
1433
1434
1435
1436
1437 skl->skl_sst->enable_miscbdcge(component->dev, false);
1438 skl->skl_sst->clock_power_gating(component->dev, false);
1439
1440 ret = ops->init_fw(component->dev, skl->skl_sst);
1441 skl->skl_sst->enable_miscbdcge(component->dev, true);
1442 skl->skl_sst->clock_power_gating(component->dev, true);
1443 if (ret < 0) {
1444 dev_err(component->dev, "Failed to boot first fw: %d\n", ret);
1445 return ret;
1446 }
1447 skl_populate_modules(skl);
1448 skl->skl_sst->update_d0i3c = skl_update_d0i3c;
1449 skl_dsp_enable_notification(skl->skl_sst, false);
1450
1451 if (skl->cfg.astate_cfg != NULL) {
1452 skl_dsp_set_astate_cfg(skl->skl_sst,
1453 skl->cfg.astate_cfg->count,
1454 skl->cfg.astate_cfg);
1455 }
1456 }
1457 pm_runtime_mark_last_busy(component->dev);
1458 pm_runtime_put_autosuspend(component->dev);
1459
1460 return 0;
1461}
1462
1463static void skl_pcm_remove(struct snd_soc_component *component)
1464{
1465 struct hdac_bus *bus = dev_get_drvdata(component->dev);
1466 struct skl *skl = bus_to_skl(bus);
1467
1468 skl_tplg_exit(component, bus);
1469
1470 skl_debugfs_exit(skl);
1471}
1472
1473static const struct snd_soc_component_driver skl_component = {
1474 .name = "pcm",
1475 .probe = skl_platform_soc_probe,
1476 .remove = skl_pcm_remove,
1477 .ops = &skl_platform_ops,
1478 .pcm_new = skl_pcm_new,
1479 .pcm_free = skl_pcm_free,
1480 .module_get_upon_open = 1,
1481};
1482
1483int skl_platform_register(struct device *dev)
1484{
1485 int ret;
1486 struct snd_soc_dai_driver *dais;
1487 int num_dais = ARRAY_SIZE(skl_platform_dai);
1488 struct hdac_bus *bus = dev_get_drvdata(dev);
1489 struct skl *skl = bus_to_skl(bus);
1490
1491 skl->dais = kmemdup(skl_platform_dai, sizeof(skl_platform_dai),
1492 GFP_KERNEL);
1493 if (!skl->dais) {
1494 ret = -ENOMEM;
1495 goto err;
1496 }
1497
1498 if (!skl->use_tplg_pcm) {
1499 dais = krealloc(skl->dais, sizeof(skl_fe_dai) +
1500 sizeof(skl_platform_dai), GFP_KERNEL);
1501 if (!dais) {
1502 ret = -ENOMEM;
1503 goto err;
1504 }
1505
1506 skl->dais = dais;
1507 memcpy(&skl->dais[ARRAY_SIZE(skl_platform_dai)], skl_fe_dai,
1508 sizeof(skl_fe_dai));
1509 num_dais += ARRAY_SIZE(skl_fe_dai);
1510 }
1511
1512 ret = devm_snd_soc_register_component(dev, &skl_component,
1513 skl->dais, num_dais);
1514 if (ret)
1515 dev_err(dev, "soc component registration failed %d\n", ret);
1516err:
1517 return ret;
1518}
1519
1520int skl_platform_unregister(struct device *dev)
1521{
1522 struct hdac_bus *bus = dev_get_drvdata(dev);
1523 struct skl *skl = bus_to_skl(bus);
1524 struct skl_module_deferred_bind *modules, *tmp;
1525
1526 if (!list_empty(&skl->bind_list)) {
1527 list_for_each_entry_safe(modules, tmp, &skl->bind_list, node) {
1528 list_del(&modules->node);
1529 kfree(modules);
1530 }
1531 }
1532
1533 kfree(skl->dais);
1534
1535 return 0;
1536}
1537
