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16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/pm_runtime.h>
19#include <linux/platform_device.h>
20#include <linux/firmware.h>
21#include <linux/delay.h>
22#include <sound/pcm.h>
23#include <sound/soc-acpi.h>
24#include <sound/soc-acpi-intel-match.h>
25#include <sound/hda_register.h>
26#include <sound/hdaudio.h>
27#include <sound/hda_i915.h>
28#include <sound/hda_codec.h>
29#include "skl.h"
30#include "skl-sst-dsp.h"
31#include "skl-sst-ipc.h"
32#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
33#include "../../../soc/codecs/hdac_hda.h"
34#endif
35static int skl_pci_binding;
36module_param_named(pci_binding, skl_pci_binding, int, 0444);
37MODULE_PARM_DESC(pci_binding, "PCI binding (0=auto, 1=only legacy, 2=only asoc");
38
39
40
41
42static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
43 unsigned char mask, unsigned char val)
44{
45 unsigned char data;
46
47 pci_read_config_byte(pci, reg, &data);
48 data &= ~mask;
49 data |= (val & mask);
50 pci_write_config_byte(pci, reg, data);
51}
52
53static void skl_init_pci(struct skl *skl)
54{
55 struct hdac_bus *bus = skl_to_bus(skl);
56
57
58
59
60
61
62
63
64 dev_dbg(bus->dev, "Clearing TCSEL\n");
65 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
66}
67
68static void update_pci_dword(struct pci_dev *pci,
69 unsigned int reg, u32 mask, u32 val)
70{
71 u32 data = 0;
72
73 pci_read_config_dword(pci, reg, &data);
74 data &= ~mask;
75 data |= (val & mask);
76 pci_write_config_dword(pci, reg, data);
77}
78
79
80
81
82
83
84
85static void skl_enable_miscbdcge(struct device *dev, bool enable)
86{
87 struct pci_dev *pci = to_pci_dev(dev);
88 u32 val;
89
90 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
91
92 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
93}
94
95
96
97
98
99
100
101static void skl_clock_power_gating(struct device *dev, bool enable)
102{
103 struct pci_dev *pci = to_pci_dev(dev);
104 struct hdac_bus *bus = pci_get_drvdata(pci);
105 u32 val;
106
107
108 val = enable ? AZX_CGCTL_ADSPDCGE : 0;
109 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_ADSPDCGE, val);
110
111
112 val = enable ? AZX_REG_VS_EM2_L1SEN : 0;
113 snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val);
114
115
116 val = enable ? 0 : AZX_PGCTL_ADSPPGD;
117 update_pci_dword(pci, AZX_PCIREG_PGCTL, AZX_PGCTL_ADSPPGD, val);
118}
119
120
121
122
123
124
125static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
126{
127 struct hdac_ext_link *hlink;
128 int ret;
129
130 skl_enable_miscbdcge(bus->dev, false);
131 ret = snd_hdac_bus_init_chip(bus, full_reset);
132
133
134 list_for_each_entry(hlink, &bus->hlink_list, list)
135 bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
136
137 skl_enable_miscbdcge(bus->dev, true);
138
139 return ret;
140}
141
142void skl_update_d0i3c(struct device *dev, bool enable)
143{
144 struct pci_dev *pci = to_pci_dev(dev);
145 struct hdac_bus *bus = pci_get_drvdata(pci);
146 u8 reg;
147 int timeout = 50;
148
149 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
150
151 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
152 udelay(10);
153 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
154 }
155
156
157 if (!timeout) {
158 dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
159 return;
160 }
161
162 if (enable)
163 reg = reg | AZX_REG_VS_D0I3C_I3;
164 else
165 reg = reg & (~AZX_REG_VS_D0I3C_I3);
166
167 snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
168
169 timeout = 50;
170
171 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
172 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
173 udelay(10);
174 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
175 }
176
177
178 if (!timeout) {
179 dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
180 return;
181 }
182
183 dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
184 snd_hdac_chip_readb(bus, VS_D0I3C));
185}
186
187
188
189
190
191
192
193
194static void skl_dum_set(struct hdac_bus *bus)
195{
196
197 if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) {
198 skl_enable_miscbdcge(bus->dev, false);
199 snd_hdac_bus_exit_link_reset(bus);
200 skl_enable_miscbdcge(bus->dev, true);
201 }
202
203 snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
204}
205
206
207static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
208{
209 snd_pcm_period_elapsed(hstr->substream);
210}
211
212static irqreturn_t skl_interrupt(int irq, void *dev_id)
213{
214 struct hdac_bus *bus = dev_id;
215 u32 status;
216
217 if (!pm_runtime_active(bus->dev))
218 return IRQ_NONE;
219
220 spin_lock(&bus->reg_lock);
221
222 status = snd_hdac_chip_readl(bus, INTSTS);
223 if (status == 0 || status == 0xffffffff) {
224 spin_unlock(&bus->reg_lock);
225 return IRQ_NONE;
226 }
227
228
229 status = snd_hdac_chip_readb(bus, RIRBSTS);
230 if (status & RIRB_INT_MASK) {
231 if (status & RIRB_INT_RESPONSE)
232 snd_hdac_bus_update_rirb(bus);
233 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
234 }
235
236 spin_unlock(&bus->reg_lock);
237
238 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
239}
240
241static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
242{
243 struct hdac_bus *bus = dev_id;
244 u32 status;
245
246 status = snd_hdac_chip_readl(bus, INTSTS);
247
248 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
249
250 return IRQ_HANDLED;
251}
252
253static int skl_acquire_irq(struct hdac_bus *bus, int do_disconnect)
254{
255 struct skl *skl = bus_to_skl(bus);
256 int ret;
257
258 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
259 skl_threaded_handler,
260 IRQF_SHARED,
261 KBUILD_MODNAME, bus);
262 if (ret) {
263 dev_err(bus->dev,
264 "unable to grab IRQ %d, disabling device\n",
265 skl->pci->irq);
266 return ret;
267 }
268
269 bus->irq = skl->pci->irq;
270 pci_intx(skl->pci, 1);
271
272 return 0;
273}
274
275static int skl_suspend_late(struct device *dev)
276{
277 struct pci_dev *pci = to_pci_dev(dev);
278 struct hdac_bus *bus = pci_get_drvdata(pci);
279 struct skl *skl = bus_to_skl(bus);
280
281 return skl_suspend_late_dsp(skl);
282}
283
284#ifdef CONFIG_PM
285static int _skl_suspend(struct hdac_bus *bus)
286{
287 struct skl *skl = bus_to_skl(bus);
288 struct pci_dev *pci = to_pci_dev(bus->dev);
289 int ret;
290
291 snd_hdac_ext_bus_link_power_down_all(bus);
292
293 ret = skl_suspend_dsp(skl);
294 if (ret < 0)
295 return ret;
296
297 snd_hdac_bus_stop_chip(bus);
298 update_pci_dword(pci, AZX_PCIREG_PGCTL,
299 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
300 skl_enable_miscbdcge(bus->dev, false);
301 snd_hdac_bus_enter_link_reset(bus);
302 skl_enable_miscbdcge(bus->dev, true);
303 skl_cleanup_resources(skl);
304
305 return 0;
306}
307
308static int _skl_resume(struct hdac_bus *bus)
309{
310 struct skl *skl = bus_to_skl(bus);
311
312 skl_init_pci(skl);
313 skl_dum_set(bus);
314 skl_init_chip(bus, true);
315
316 return skl_resume_dsp(skl);
317}
318#endif
319
320#ifdef CONFIG_PM_SLEEP
321
322
323
324static int skl_suspend(struct device *dev)
325{
326 struct pci_dev *pci = to_pci_dev(dev);
327 struct hdac_bus *bus = pci_get_drvdata(pci);
328 struct skl *skl = bus_to_skl(bus);
329 int ret;
330
331
332
333
334
335 if (skl->supend_active) {
336
337 snd_hdac_ext_bus_link_power_down_all(bus);
338
339 if (bus->cmd_dma_state)
340 snd_hdac_bus_stop_cmd_io(bus);
341
342 enable_irq_wake(bus->irq);
343 pci_save_state(pci);
344 } else {
345 ret = _skl_suspend(bus);
346 if (ret < 0)
347 return ret;
348 skl->skl_sst->fw_loaded = false;
349 }
350
351 return 0;
352}
353
354static int skl_resume(struct device *dev)
355{
356 struct pci_dev *pci = to_pci_dev(dev);
357 struct hdac_bus *bus = pci_get_drvdata(pci);
358 struct skl *skl = bus_to_skl(bus);
359 struct hdac_ext_link *hlink = NULL;
360 int ret;
361
362
363
364
365
366 if (skl->supend_active) {
367 pci_restore_state(pci);
368 snd_hdac_ext_bus_link_power_up_all(bus);
369 disable_irq_wake(bus->irq);
370
371
372
373
374
375 list_for_each_entry(hlink, &bus->hlink_list, list) {
376 if (hlink->ref_count)
377 snd_hdac_ext_bus_link_power_up(hlink);
378 }
379
380 ret = 0;
381 if (bus->cmd_dma_state)
382 snd_hdac_bus_init_cmd_io(bus);
383 } else {
384 ret = _skl_resume(bus);
385
386
387 list_for_each_entry(hlink, &bus->hlink_list, list) {
388 if (!hlink->ref_count)
389 snd_hdac_ext_bus_link_power_down(hlink);
390 }
391
392 if (!bus->cmd_dma_state)
393 snd_hdac_bus_stop_cmd_io(bus);
394 }
395
396 return ret;
397}
398#endif
399
400#ifdef CONFIG_PM
401static int skl_runtime_suspend(struct device *dev)
402{
403 struct pci_dev *pci = to_pci_dev(dev);
404 struct hdac_bus *bus = pci_get_drvdata(pci);
405
406 dev_dbg(bus->dev, "in %s\n", __func__);
407
408 return _skl_suspend(bus);
409}
410
411static int skl_runtime_resume(struct device *dev)
412{
413 struct pci_dev *pci = to_pci_dev(dev);
414 struct hdac_bus *bus = pci_get_drvdata(pci);
415
416 dev_dbg(bus->dev, "in %s\n", __func__);
417
418 return _skl_resume(bus);
419}
420#endif
421
422static const struct dev_pm_ops skl_pm = {
423 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
424 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
425 .suspend_late = skl_suspend_late,
426};
427
428
429
430
431static int skl_free(struct hdac_bus *bus)
432{
433 struct skl *skl = bus_to_skl(bus);
434
435 skl->init_done = 0;
436
437 snd_hdac_ext_stop_streams(bus);
438
439 if (bus->irq >= 0)
440 free_irq(bus->irq, (void *)bus);
441 snd_hdac_bus_free_stream_pages(bus);
442 snd_hdac_stream_free_all(bus);
443 snd_hdac_link_free_all(bus);
444
445 if (bus->remap_addr)
446 iounmap(bus->remap_addr);
447
448 pci_release_regions(skl->pci);
449 pci_disable_device(skl->pci);
450
451 snd_hdac_ext_bus_exit(bus);
452
453 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
454 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
455 snd_hdac_i915_exit(bus);
456 }
457
458 return 0;
459}
460
461
462
463
464
465
466
467static struct skl_ssp_clk skl_ssp_clks[] = {
468 {.name = "ssp0_mclk"}, {.name = "ssp1_mclk"}, {.name = "ssp2_mclk"},
469 {.name = "ssp3_mclk"}, {.name = "ssp4_mclk"}, {.name = "ssp5_mclk"},
470 {.name = "ssp0_sclk"}, {.name = "ssp1_sclk"}, {.name = "ssp2_sclk"},
471 {.name = "ssp3_sclk"}, {.name = "ssp4_sclk"}, {.name = "ssp5_sclk"},
472 {.name = "ssp0_sclkfs"}, {.name = "ssp1_sclkfs"},
473 {.name = "ssp2_sclkfs"},
474 {.name = "ssp3_sclkfs"}, {.name = "ssp4_sclkfs"},
475 {.name = "ssp5_sclkfs"},
476};
477
478static struct snd_soc_acpi_mach *skl_find_hda_machine(struct skl *skl,
479 struct snd_soc_acpi_mach *machines)
480{
481 struct hdac_bus *bus = skl_to_bus(skl);
482 struct snd_soc_acpi_mach *mach;
483
484
485 if (bus->codec_mask == 0)
486 return NULL;
487
488
489 mach = snd_soc_acpi_intel_hda_machines;
490
491
492 mach->fw_filename = machines->fw_filename;
493
494 return mach;
495}
496
497static int skl_find_machine(struct skl *skl, void *driver_data)
498{
499 struct hdac_bus *bus = skl_to_bus(skl);
500 struct snd_soc_acpi_mach *mach = driver_data;
501 struct skl_machine_pdata *pdata;
502
503 mach = snd_soc_acpi_find_machine(mach);
504 if (!mach) {
505 dev_dbg(bus->dev, "No matching I2S machine driver found\n");
506 mach = skl_find_hda_machine(skl, driver_data);
507 if (!mach) {
508 dev_err(bus->dev, "No matching machine driver found\n");
509 return -ENODEV;
510 }
511 }
512
513 skl->mach = mach;
514 skl->fw_name = mach->fw_filename;
515 pdata = mach->pdata;
516
517 if (pdata) {
518 skl->use_tplg_pcm = pdata->use_tplg_pcm;
519 mach->mach_params.dmic_num = skl_get_dmic_geo(skl);
520 }
521
522 return 0;
523}
524
525static int skl_machine_device_register(struct skl *skl)
526{
527 struct snd_soc_acpi_mach *mach = skl->mach;
528 struct hdac_bus *bus = skl_to_bus(skl);
529 struct platform_device *pdev;
530 int ret;
531
532 pdev = platform_device_alloc(mach->drv_name, -1);
533 if (pdev == NULL) {
534 dev_err(bus->dev, "platform device alloc failed\n");
535 return -EIO;
536 }
537
538 mach->mach_params.platform = dev_name(bus->dev);
539 mach->mach_params.codec_mask = bus->codec_mask;
540
541 ret = platform_device_add_data(pdev, (const void *)mach, sizeof(*mach));
542 if (ret) {
543 dev_err(bus->dev, "failed to add machine device platform data\n");
544 platform_device_put(pdev);
545 return ret;
546 }
547
548 ret = platform_device_add(pdev);
549 if (ret) {
550 dev_err(bus->dev, "failed to add machine device\n");
551 platform_device_put(pdev);
552 return -EIO;
553 }
554
555
556 skl->i2s_dev = pdev;
557
558 return 0;
559}
560
561static void skl_machine_device_unregister(struct skl *skl)
562{
563 if (skl->i2s_dev)
564 platform_device_unregister(skl->i2s_dev);
565}
566
567static int skl_dmic_device_register(struct skl *skl)
568{
569 struct hdac_bus *bus = skl_to_bus(skl);
570 struct platform_device *pdev;
571 int ret;
572
573
574 pdev = platform_device_alloc("dmic-codec", -1);
575 if (!pdev) {
576 dev_err(bus->dev, "failed to allocate dmic device\n");
577 return -ENOMEM;
578 }
579
580 ret = platform_device_add(pdev);
581 if (ret) {
582 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
583 platform_device_put(pdev);
584 return ret;
585 }
586 skl->dmic_dev = pdev;
587
588 return 0;
589}
590
591static void skl_dmic_device_unregister(struct skl *skl)
592{
593 if (skl->dmic_dev)
594 platform_device_unregister(skl->dmic_dev);
595}
596
597static struct skl_clk_parent_src skl_clk_src[] = {
598 { .clk_id = SKL_XTAL, .name = "xtal" },
599 { .clk_id = SKL_CARDINAL, .name = "cardinal", .rate = 24576000 },
600 { .clk_id = SKL_PLL, .name = "pll", .rate = 96000000 },
601};
602
603struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id)
604{
605 unsigned int i;
606
607 for (i = 0; i < ARRAY_SIZE(skl_clk_src); i++) {
608 if (skl_clk_src[i].clk_id == clk_id)
609 return &skl_clk_src[i];
610 }
611
612 return NULL;
613}
614
615static void init_skl_xtal_rate(int pci_id)
616{
617 switch (pci_id) {
618 case 0x9d70:
619 case 0x9d71:
620 skl_clk_src[0].rate = 24000000;
621 return;
622
623 default:
624 skl_clk_src[0].rate = 19200000;
625 return;
626 }
627}
628
629static int skl_clock_device_register(struct skl *skl)
630{
631 struct platform_device_info pdevinfo = {NULL};
632 struct skl_clk_pdata *clk_pdata;
633
634 clk_pdata = devm_kzalloc(&skl->pci->dev, sizeof(*clk_pdata),
635 GFP_KERNEL);
636 if (!clk_pdata)
637 return -ENOMEM;
638
639 init_skl_xtal_rate(skl->pci->device);
640
641 clk_pdata->parent_clks = skl_clk_src;
642 clk_pdata->ssp_clks = skl_ssp_clks;
643 clk_pdata->num_clks = ARRAY_SIZE(skl_ssp_clks);
644
645
646 skl_get_clks(skl, clk_pdata->ssp_clks);
647 clk_pdata->pvt_data = skl;
648
649
650 pdevinfo.parent = &skl->pci->dev;
651 pdevinfo.id = -1;
652 pdevinfo.name = "skl-ssp-clk";
653 pdevinfo.data = clk_pdata;
654 pdevinfo.size_data = sizeof(*clk_pdata);
655 skl->clk_dev = platform_device_register_full(&pdevinfo);
656 return PTR_ERR_OR_ZERO(skl->clk_dev);
657}
658
659static void skl_clock_device_unregister(struct skl *skl)
660{
661 if (skl->clk_dev)
662 platform_device_unregister(skl->clk_dev);
663}
664
665#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
666
667#define IDISP_INTEL_VENDOR_ID 0x80860000
668
669
670
671
672static void load_codec_module(struct hda_codec *codec)
673{
674#ifdef MODULE
675 char modalias[MODULE_NAME_LEN];
676 const char *mod = NULL;
677
678 snd_hdac_codec_modalias(&codec->core, modalias, sizeof(modalias));
679 mod = modalias;
680 dev_dbg(&codec->core.dev, "loading %s codec module\n", mod);
681 request_module(mod);
682#endif
683}
684
685#endif
686
687
688
689
690static int probe_codec(struct hdac_bus *bus, int addr)
691{
692 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
693 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
694 unsigned int res = -1;
695 struct skl *skl = bus_to_skl(bus);
696#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
697 struct hdac_hda_priv *hda_codec;
698 int err;
699#endif
700 struct hdac_device *hdev;
701
702 mutex_lock(&bus->cmd_mutex);
703 snd_hdac_bus_send_cmd(bus, cmd);
704 snd_hdac_bus_get_response(bus, addr, &res);
705 mutex_unlock(&bus->cmd_mutex);
706 if (res == -1)
707 return -EIO;
708 dev_dbg(bus->dev, "codec #%d probed OK: %x\n", addr, res);
709
710#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
711 hda_codec = devm_kzalloc(&skl->pci->dev, sizeof(*hda_codec),
712 GFP_KERNEL);
713 if (!hda_codec)
714 return -ENOMEM;
715
716 hda_codec->codec.bus = skl_to_hbus(skl);
717 hdev = &hda_codec->codec.core;
718
719 err = snd_hdac_ext_bus_device_init(bus, addr, hdev);
720 if (err < 0)
721 return err;
722
723
724 if ((res & 0xFFFF0000) != IDISP_INTEL_VENDOR_ID) {
725 hdev->type = HDA_DEV_LEGACY;
726 load_codec_module(&hda_codec->codec);
727 }
728 return 0;
729#else
730 hdev = devm_kzalloc(&skl->pci->dev, sizeof(*hdev), GFP_KERNEL);
731 if (!hdev)
732 return -ENOMEM;
733
734 return snd_hdac_ext_bus_device_init(bus, addr, hdev);
735#endif
736}
737
738
739static void skl_codec_create(struct hdac_bus *bus)
740{
741 int c, max_slots;
742
743 max_slots = HDA_MAX_CODECS;
744
745
746 for (c = 0; c < max_slots; c++) {
747 if ((bus->codec_mask & (1 << c))) {
748 if (probe_codec(bus, c) < 0) {
749
750
751
752
753 dev_warn(bus->dev,
754 "Codec #%d probe error; disabling it...\n", c);
755 bus->codec_mask &= ~(1 << c);
756
757
758
759
760
761
762
763
764 snd_hdac_bus_stop_chip(bus);
765 skl_init_chip(bus, true);
766 }
767 }
768 }
769}
770
771static const struct hdac_bus_ops bus_core_ops = {
772 .command = snd_hdac_bus_send_cmd,
773 .get_response = snd_hdac_bus_get_response,
774};
775
776static int skl_i915_init(struct hdac_bus *bus)
777{
778 int err;
779
780
781
782
783
784 err = snd_hdac_i915_init(bus);
785 if (err < 0)
786 return err;
787
788 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
789
790 return 0;
791}
792
793static void skl_probe_work(struct work_struct *work)
794{
795 struct skl *skl = container_of(work, struct skl, probe_work);
796 struct hdac_bus *bus = skl_to_bus(skl);
797 struct hdac_ext_link *hlink = NULL;
798 int err;
799
800 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
801 err = skl_i915_init(bus);
802 if (err < 0)
803 return;
804 }
805
806 err = skl_init_chip(bus, true);
807 if (err < 0) {
808 dev_err(bus->dev, "Init chip failed with err: %d\n", err);
809 goto out_err;
810 }
811
812
813 if (!bus->codec_mask)
814 dev_info(bus->dev, "no hda codecs found!\n");
815
816
817 skl_codec_create(bus);
818
819
820 err = skl_platform_register(bus->dev);
821 if (err < 0) {
822 dev_err(bus->dev, "platform register failed: %d\n", err);
823 goto out_err;
824 }
825
826 err = skl_machine_device_register(skl);
827 if (err < 0) {
828 dev_err(bus->dev, "machine register failed: %d\n", err);
829 goto out_err;
830 }
831
832
833
834
835 list_for_each_entry(hlink, &bus->hlink_list, list)
836 snd_hdac_ext_bus_link_put(bus, hlink);
837
838 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
839 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
840
841
842 pm_runtime_put_noidle(bus->dev);
843 pm_runtime_allow(bus->dev);
844 skl->init_done = 1;
845
846 return;
847
848out_err:
849 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
850 snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
851}
852
853
854
855
856static int skl_create(struct pci_dev *pci,
857 const struct hdac_io_ops *io_ops,
858 struct skl **rskl)
859{
860 struct hdac_ext_bus_ops *ext_ops = NULL;
861 struct skl *skl;
862 struct hdac_bus *bus;
863 struct hda_bus *hbus;
864 int err;
865
866 *rskl = NULL;
867
868 err = pci_enable_device(pci);
869 if (err < 0)
870 return err;
871
872 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
873 if (!skl) {
874 pci_disable_device(pci);
875 return -ENOMEM;
876 }
877
878 hbus = skl_to_hbus(skl);
879 bus = skl_to_bus(skl);
880
881 INIT_LIST_HEAD(&skl->ppl_list);
882 INIT_LIST_HEAD(&skl->bind_list);
883
884#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
885 ext_ops = snd_soc_hdac_hda_get_ops();
886#endif
887 snd_hdac_ext_bus_init(bus, &pci->dev, &bus_core_ops, io_ops, ext_ops);
888 bus->use_posbuf = 1;
889 skl->pci = pci;
890 INIT_WORK(&skl->probe_work, skl_probe_work);
891 bus->bdl_pos_adj = 0;
892
893 mutex_init(&hbus->prepare_mutex);
894 hbus->pci = pci;
895 hbus->mixer_assigned = -1;
896 hbus->modelname = "sklbus";
897
898 *rskl = skl;
899
900 return 0;
901}
902
903static int skl_first_init(struct hdac_bus *bus)
904{
905 struct skl *skl = bus_to_skl(bus);
906 struct pci_dev *pci = skl->pci;
907 int err;
908 unsigned short gcap;
909 int cp_streams, pb_streams, start_idx;
910
911 err = pci_request_regions(pci, "Skylake HD audio");
912 if (err < 0)
913 return err;
914
915 bus->addr = pci_resource_start(pci, 0);
916 bus->remap_addr = pci_ioremap_bar(pci, 0);
917 if (bus->remap_addr == NULL) {
918 dev_err(bus->dev, "ioremap error\n");
919 return -ENXIO;
920 }
921
922 snd_hdac_bus_reset_link(bus, true);
923
924 snd_hdac_bus_parse_capabilities(bus);
925
926
927 if (!bus->ppcap) {
928 dev_err(bus->dev, "bus ppcap not set, HDaudio or DSP not present?\n");
929 return -ENODEV;
930 }
931
932 if (skl_acquire_irq(bus, 0) < 0)
933 return -EBUSY;
934
935 pci_set_master(pci);
936 synchronize_irq(bus->irq);
937
938 gcap = snd_hdac_chip_readw(bus, GCAP);
939 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
940
941
942 cp_streams = (gcap >> 8) & 0x0f;
943 pb_streams = (gcap >> 12) & 0x0f;
944
945 if (!pb_streams && !cp_streams) {
946 dev_err(bus->dev, "no streams found in GCAP definitions?\n");
947 return -EIO;
948 }
949
950 bus->num_streams = cp_streams + pb_streams;
951
952
953 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
954 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
955 } else {
956 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
957 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
958 }
959
960
961 snd_hdac_ext_stream_init_all
962 (bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
963 start_idx = cp_streams;
964 snd_hdac_ext_stream_init_all
965 (bus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
966
967 err = snd_hdac_bus_alloc_stream_pages(bus);
968 if (err < 0)
969 return err;
970
971
972 skl_init_pci(skl);
973 skl_dum_set(bus);
974
975 return skl_init_chip(bus, true);
976}
977
978static int skl_probe(struct pci_dev *pci,
979 const struct pci_device_id *pci_id)
980{
981 struct skl *skl;
982 struct hdac_bus *bus = NULL;
983 int err;
984
985 switch (skl_pci_binding) {
986 case SND_SKL_PCI_BIND_AUTO:
987
988
989
990
991
992
993
994 if (pci->class == 0x040300) {
995 dev_info(&pci->dev, "The DSP is not enabled on this platform, aborting probe\n");
996 return -ENODEV;
997 }
998 if (pci->class != 0x040100 && pci->class != 0x040380) {
999 dev_err(&pci->dev, "Unknown PCI class/subclass/prog-if information (0x%06x) found, aborting probe\n", pci->class);
1000 return -ENODEV;
1001 }
1002 dev_info(&pci->dev, "DSP detected with PCI class/subclass/prog-if info 0x%06x\n", pci->class);
1003 break;
1004 case SND_SKL_PCI_BIND_LEGACY:
1005 dev_info(&pci->dev, "Module parameter forced binding with HDaudio legacy, aborting probe\n");
1006 return -ENODEV;
1007 case SND_SKL_PCI_BIND_ASOC:
1008 dev_info(&pci->dev, "Module parameter forced binding with SKL driver, bypassed detection logic\n");
1009 break;
1010 default:
1011 dev_err(&pci->dev, "invalid value for skl_pci_binding module parameter, ignored\n");
1012 break;
1013 }
1014
1015
1016 err = skl_create(pci, NULL, &skl);
1017 if (err < 0)
1018 return err;
1019
1020 bus = skl_to_bus(skl);
1021
1022 err = skl_first_init(bus);
1023 if (err < 0) {
1024 dev_err(bus->dev, "skl_first_init failed with err: %d\n", err);
1025 goto out_free;
1026 }
1027
1028 skl->pci_id = pci->device;
1029
1030 device_disable_async_suspend(bus->dev);
1031
1032 skl->nhlt = skl_nhlt_init(bus->dev);
1033
1034 if (skl->nhlt == NULL) {
1035#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC)
1036 dev_err(bus->dev, "no nhlt info found\n");
1037 err = -ENODEV;
1038 goto out_free;
1039#else
1040 dev_warn(bus->dev, "no nhlt info found, continuing to try to enable HDaudio codec\n");
1041#endif
1042 } else {
1043
1044 err = skl_nhlt_create_sysfs(skl);
1045 if (err < 0) {
1046 dev_err(bus->dev, "skl_nhlt_create_sysfs failed with err: %d\n", err);
1047 goto out_nhlt_free;
1048 }
1049
1050 skl_nhlt_update_topology_bin(skl);
1051
1052
1053 err = skl_clock_device_register(skl);
1054 if (err < 0) {
1055 dev_err(bus->dev, "skl_clock_device_register failed with err: %d\n", err);
1056 goto out_clk_free;
1057 }
1058 }
1059
1060 pci_set_drvdata(skl->pci, bus);
1061
1062
1063 err = skl_find_machine(skl, (void *)pci_id->driver_data);
1064 if (err < 0) {
1065 dev_err(bus->dev, "skl_find_machine failed with err: %d\n", err);
1066 goto out_nhlt_free;
1067 }
1068
1069 err = skl_init_dsp(skl);
1070 if (err < 0) {
1071 dev_dbg(bus->dev, "error failed to register dsp\n");
1072 goto out_nhlt_free;
1073 }
1074 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
1075 skl->skl_sst->clock_power_gating = skl_clock_power_gating;
1076
1077 if (bus->mlcap)
1078 snd_hdac_ext_bus_get_ml_capabilities(bus);
1079
1080 snd_hdac_bus_stop_chip(bus);
1081
1082
1083 err = skl_dmic_device_register(skl);
1084 if (err < 0) {
1085 dev_err(bus->dev, "skl_dmic_device_register failed with err: %d\n", err);
1086 goto out_dsp_free;
1087 }
1088
1089 schedule_work(&skl->probe_work);
1090
1091 return 0;
1092
1093out_dsp_free:
1094 skl_free_dsp(skl);
1095out_clk_free:
1096 skl_clock_device_unregister(skl);
1097out_nhlt_free:
1098 skl_nhlt_free(skl->nhlt);
1099out_free:
1100 skl_free(bus);
1101
1102 return err;
1103}
1104
1105static void skl_shutdown(struct pci_dev *pci)
1106{
1107 struct hdac_bus *bus = pci_get_drvdata(pci);
1108 struct hdac_stream *s;
1109 struct hdac_ext_stream *stream;
1110 struct skl *skl;
1111
1112 if (!bus)
1113 return;
1114
1115 skl = bus_to_skl(bus);
1116
1117 if (!skl->init_done)
1118 return;
1119
1120 snd_hdac_ext_stop_streams(bus);
1121 list_for_each_entry(s, &bus->stream_list, list) {
1122 stream = stream_to_hdac_ext_stream(s);
1123 snd_hdac_ext_stream_decouple(bus, stream, false);
1124 }
1125
1126 snd_hdac_bus_stop_chip(bus);
1127}
1128
1129static void skl_remove(struct pci_dev *pci)
1130{
1131 struct hdac_bus *bus = pci_get_drvdata(pci);
1132 struct skl *skl = bus_to_skl(bus);
1133
1134 cancel_work_sync(&skl->probe_work);
1135
1136 pm_runtime_get_noresume(&pci->dev);
1137
1138
1139 snd_hdac_ext_bus_device_remove(bus);
1140
1141 skl_platform_unregister(&pci->dev);
1142 skl_free_dsp(skl);
1143 skl_machine_device_unregister(skl);
1144 skl_dmic_device_unregister(skl);
1145 skl_clock_device_unregister(skl);
1146 skl_nhlt_remove_sysfs(skl);
1147 skl_nhlt_free(skl->nhlt);
1148 skl_free(bus);
1149 dev_set_drvdata(&pci->dev, NULL);
1150}
1151
1152
1153static const struct pci_device_id skl_ids[] = {
1154#if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKL)
1155
1156 { PCI_DEVICE(0x8086, 0x9d70),
1157 .driver_data = (unsigned long)&snd_soc_acpi_intel_skl_machines},
1158#endif
1159#if IS_ENABLED(CONFIG_SND_SOC_INTEL_APL)
1160
1161 { PCI_DEVICE(0x8086, 0x5a98),
1162 .driver_data = (unsigned long)&snd_soc_acpi_intel_bxt_machines},
1163#endif
1164#if IS_ENABLED(CONFIG_SND_SOC_INTEL_KBL)
1165
1166 { PCI_DEVICE(0x8086, 0x9D71),
1167 .driver_data = (unsigned long)&snd_soc_acpi_intel_kbl_machines},
1168#endif
1169#if IS_ENABLED(CONFIG_SND_SOC_INTEL_GLK)
1170
1171 { PCI_DEVICE(0x8086, 0x3198),
1172 .driver_data = (unsigned long)&snd_soc_acpi_intel_glk_machines},
1173#endif
1174#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CNL)
1175
1176 { PCI_DEVICE(0x8086, 0x9dc8),
1177 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1178#endif
1179#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CFL)
1180
1181 { PCI_DEVICE(0x8086, 0xa348),
1182 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1183#endif
1184#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_LP)
1185
1186 { PCI_DEVICE(0x8086, 0x02c8),
1187 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1188#endif
1189#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_H)
1190
1191 { PCI_DEVICE(0x8086, 0x06c8),
1192 .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
1193#endif
1194 { 0, }
1195};
1196MODULE_DEVICE_TABLE(pci, skl_ids);
1197
1198
1199static struct pci_driver skl_driver = {
1200 .name = KBUILD_MODNAME,
1201 .id_table = skl_ids,
1202 .probe = skl_probe,
1203 .remove = skl_remove,
1204 .shutdown = skl_shutdown,
1205 .driver = {
1206 .pm = &skl_pm,
1207 },
1208};
1209module_pci_driver(skl_driver);
1210
1211MODULE_LICENSE("GPL v2");
1212MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
1213