linux/sound/soc/txx9/txx9aclc.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Generic TXx9 ACLC platform driver
   4 *
   5 * Copyright (C) 2009 Atsushi Nemoto
   6 *
   7 * Based on RBTX49xx patch from CELF patch archive.
   8 * (C) Copyright TOSHIBA CORPORATION 2004-2006
   9 */
  10
  11#include <linux/module.h>
  12#include <linux/init.h>
  13#include <linux/platform_device.h>
  14#include <linux/scatterlist.h>
  15#include <linux/slab.h>
  16#include <linux/dmaengine.h>
  17#include <sound/core.h>
  18#include <sound/pcm.h>
  19#include <sound/pcm_params.h>
  20#include <sound/soc.h>
  21#include "txx9aclc.h"
  22
  23#define DRV_NAME "txx9aclc"
  24
  25static struct txx9aclc_soc_device {
  26        struct txx9aclc_dmadata dmadata[2];
  27} txx9aclc_soc_device;
  28
  29/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
  30static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
  31
  32static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
  33                             struct txx9aclc_dmadata *dmadata);
  34
  35static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
  36        /*
  37         * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
  38         * needs more works for noncoherent MIPS.
  39         */
  40        .info             = SNDRV_PCM_INFO_INTERLEAVED |
  41                            SNDRV_PCM_INFO_BATCH |
  42                            SNDRV_PCM_INFO_PAUSE,
  43        .period_bytes_min = 1024,
  44        .period_bytes_max = 8 * 1024,
  45        .periods_min      = 2,
  46        .periods_max      = 4096,
  47        .buffer_bytes_max = 32 * 1024,
  48};
  49
  50static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
  51                                  struct snd_pcm_hw_params *params)
  52{
  53        struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  54        struct snd_pcm_runtime *runtime = substream->runtime;
  55        struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
  56        struct txx9aclc_dmadata *dmadata = runtime->private_data;
  57        int ret;
  58
  59        ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
  60        if (ret < 0)
  61                return ret;
  62
  63        dev_dbg(component->dev,
  64                "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
  65                "runtime->min_align %ld\n",
  66                (unsigned long)runtime->dma_area,
  67                (unsigned long)runtime->dma_addr, runtime->dma_bytes,
  68                runtime->min_align);
  69        dev_dbg(component->dev,
  70                "periods %d period_bytes %d stream %d\n",
  71                params_periods(params), params_period_bytes(params),
  72                substream->stream);
  73
  74        dmadata->substream = substream;
  75        dmadata->pos = 0;
  76        return 0;
  77}
  78
  79static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
  80{
  81        return snd_pcm_lib_free_pages(substream);
  82}
  83
  84static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
  85{
  86        struct snd_pcm_runtime *runtime = substream->runtime;
  87        struct txx9aclc_dmadata *dmadata = runtime->private_data;
  88
  89        dmadata->dma_addr = runtime->dma_addr;
  90        dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
  91        dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
  92
  93        if (dmadata->buffer_bytes == dmadata->period_bytes) {
  94                dmadata->frag_bytes = dmadata->period_bytes >> 1;
  95                dmadata->frags = 2;
  96        } else {
  97                dmadata->frag_bytes = dmadata->period_bytes;
  98                dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
  99        }
 100        dmadata->frag_count = 0;
 101        dmadata->pos = 0;
 102        return 0;
 103}
 104
 105static void txx9aclc_dma_complete(void *arg)
 106{
 107        struct txx9aclc_dmadata *dmadata = arg;
 108        unsigned long flags;
 109
 110        /* dma completion handler cannot submit new operations */
 111        spin_lock_irqsave(&dmadata->dma_lock, flags);
 112        if (dmadata->frag_count >= 0) {
 113                dmadata->dmacount--;
 114                if (!WARN_ON(dmadata->dmacount < 0))
 115                        tasklet_schedule(&dmadata->tasklet);
 116        }
 117        spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 118}
 119
 120static struct dma_async_tx_descriptor *
 121txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
 122{
 123        struct dma_chan *chan = dmadata->dma_chan;
 124        struct dma_async_tx_descriptor *desc;
 125        struct scatterlist sg;
 126
 127        sg_init_table(&sg, 1);
 128        sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
 129                    dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
 130        sg_dma_address(&sg) = buf_dma_addr;
 131        desc = dmaengine_prep_slave_sg(chan, &sg, 1,
 132                dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
 133                DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
 134                DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 135        if (!desc) {
 136                dev_err(&chan->dev->device, "cannot prepare slave dma\n");
 137                return NULL;
 138        }
 139        desc->callback = txx9aclc_dma_complete;
 140        desc->callback_param = dmadata;
 141        dmaengine_submit(desc);
 142        return desc;
 143}
 144
 145#define NR_DMA_CHAIN            2
 146
 147static void txx9aclc_dma_tasklet(unsigned long data)
 148{
 149        struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
 150        struct dma_chan *chan = dmadata->dma_chan;
 151        struct dma_async_tx_descriptor *desc;
 152        struct snd_pcm_substream *substream = dmadata->substream;
 153        u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
 154                ACCTL_AUDODMA : ACCTL_AUDIDMA;
 155        int i;
 156        unsigned long flags;
 157
 158        spin_lock_irqsave(&dmadata->dma_lock, flags);
 159        if (dmadata->frag_count < 0) {
 160                struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 161                void __iomem *base = drvdata->base;
 162
 163                spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 164                dmaengine_terminate_all(chan);
 165                /* first time */
 166                for (i = 0; i < NR_DMA_CHAIN; i++) {
 167                        desc = txx9aclc_dma_submit(dmadata,
 168                                dmadata->dma_addr + i * dmadata->frag_bytes);
 169                        if (!desc)
 170                                return;
 171                }
 172                dmadata->dmacount = NR_DMA_CHAIN;
 173                dma_async_issue_pending(chan);
 174                spin_lock_irqsave(&dmadata->dma_lock, flags);
 175                __raw_writel(ctlbit, base + ACCTLEN);
 176                dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
 177                spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 178                return;
 179        }
 180        if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
 181                spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 182                return;
 183        }
 184        while (dmadata->dmacount < NR_DMA_CHAIN) {
 185                dmadata->dmacount++;
 186                spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 187                desc = txx9aclc_dma_submit(dmadata,
 188                        dmadata->dma_addr +
 189                        dmadata->frag_count * dmadata->frag_bytes);
 190                if (!desc)
 191                        return;
 192                dma_async_issue_pending(chan);
 193
 194                spin_lock_irqsave(&dmadata->dma_lock, flags);
 195                dmadata->frag_count++;
 196                dmadata->frag_count %= dmadata->frags;
 197                dmadata->pos += dmadata->frag_bytes;
 198                dmadata->pos %= dmadata->buffer_bytes;
 199                if ((dmadata->frag_count * dmadata->frag_bytes) %
 200                    dmadata->period_bytes == 0)
 201                        snd_pcm_period_elapsed(substream);
 202        }
 203        spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 204}
 205
 206static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
 207{
 208        struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
 209        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 210        void __iomem *base = drvdata->base;
 211        unsigned long flags;
 212        int ret = 0;
 213        u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
 214                ACCTL_AUDODMA : ACCTL_AUDIDMA;
 215
 216        spin_lock_irqsave(&dmadata->dma_lock, flags);
 217        switch (cmd) {
 218        case SNDRV_PCM_TRIGGER_START:
 219                dmadata->frag_count = -1;
 220                tasklet_schedule(&dmadata->tasklet);
 221                break;
 222        case SNDRV_PCM_TRIGGER_STOP:
 223        case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 224        case SNDRV_PCM_TRIGGER_SUSPEND:
 225                __raw_writel(ctlbit, base + ACCTLDIS);
 226                break;
 227        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 228        case SNDRV_PCM_TRIGGER_RESUME:
 229                __raw_writel(ctlbit, base + ACCTLEN);
 230                break;
 231        default:
 232                ret = -EINVAL;
 233        }
 234        spin_unlock_irqrestore(&dmadata->dma_lock, flags);
 235        return ret;
 236}
 237
 238static snd_pcm_uframes_t
 239txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
 240{
 241        struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
 242
 243        return bytes_to_frames(substream->runtime, dmadata->pos);
 244}
 245
 246static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
 247{
 248        struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
 249        struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
 250        int ret;
 251
 252        ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
 253        if (ret)
 254                return ret;
 255        /* ensure that buffer size is a multiple of period size */
 256        ret = snd_pcm_hw_constraint_integer(substream->runtime,
 257                                            SNDRV_PCM_HW_PARAM_PERIODS);
 258        if (ret < 0)
 259                return ret;
 260        substream->runtime->private_data = dmadata;
 261        return 0;
 262}
 263
 264static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
 265{
 266        struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
 267        struct dma_chan *chan = dmadata->dma_chan;
 268
 269        dmadata->frag_count = -1;
 270        dmaengine_terminate_all(chan);
 271        return 0;
 272}
 273
 274static const struct snd_pcm_ops txx9aclc_pcm_ops = {
 275        .open           = txx9aclc_pcm_open,
 276        .close          = txx9aclc_pcm_close,
 277        .ioctl          = snd_pcm_lib_ioctl,
 278        .hw_params      = txx9aclc_pcm_hw_params,
 279        .hw_free        = txx9aclc_pcm_hw_free,
 280        .prepare        = txx9aclc_pcm_prepare,
 281        .trigger        = txx9aclc_pcm_trigger,
 282        .pointer        = txx9aclc_pcm_pointer,
 283};
 284
 285static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
 286{
 287        struct snd_card *card = rtd->card->snd_card;
 288        struct snd_soc_dai *dai = rtd->cpu_dai;
 289        struct snd_pcm *pcm = rtd->pcm;
 290        struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
 291        struct platform_device *pdev = to_platform_device(component->dev);
 292        struct txx9aclc_soc_device *dev;
 293        struct resource *r;
 294        int i;
 295        int ret;
 296
 297        /* at this point onwards the AC97 component has probed and this will be valid */
 298        dev = snd_soc_dai_get_drvdata(dai);
 299
 300        dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
 301        dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
 302        for (i = 0; i < 2; i++) {
 303                r = platform_get_resource(pdev, IORESOURCE_DMA, i);
 304                if (!r) {
 305                        ret = -EBUSY;
 306                        goto exit;
 307                }
 308                dev->dmadata[i].dma_res = r;
 309                ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
 310                if (ret)
 311                        goto exit;
 312        }
 313
 314        snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 315                card->dev, 64 * 1024, 4 * 1024 * 1024);
 316        return 0;
 317
 318exit:
 319        for (i = 0; i < 2; i++) {
 320                if (dev->dmadata[i].dma_chan)
 321                        dma_release_channel(dev->dmadata[i].dma_chan);
 322                dev->dmadata[i].dma_chan = NULL;
 323        }
 324        return ret;
 325}
 326
 327static bool filter(struct dma_chan *chan, void *param)
 328{
 329        struct txx9aclc_dmadata *dmadata = param;
 330        char *devname;
 331        bool found = false;
 332
 333        devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
 334                (int)dmadata->dma_res->start);
 335        if (strcmp(dev_name(chan->device->dev), devname) == 0) {
 336                chan->private = &dmadata->dma_slave;
 337                found = true;
 338        }
 339        kfree(devname);
 340        return found;
 341}
 342
 343static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
 344                             struct txx9aclc_dmadata *dmadata)
 345{
 346        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 347        struct txx9dmac_slave *ds = &dmadata->dma_slave;
 348        dma_cap_mask_t mask;
 349
 350        spin_lock_init(&dmadata->dma_lock);
 351
 352        ds->reg_width = sizeof(u32);
 353        if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 354                ds->tx_reg = drvdata->physbase + ACAUDODAT;
 355                ds->rx_reg = 0;
 356        } else {
 357                ds->tx_reg = 0;
 358                ds->rx_reg = drvdata->physbase + ACAUDIDAT;
 359        }
 360
 361        /* Try to grab a DMA channel */
 362        dma_cap_zero(mask);
 363        dma_cap_set(DMA_SLAVE, mask);
 364        dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
 365        if (!dmadata->dma_chan) {
 366                printk(KERN_ERR
 367                        "DMA channel for %s is not available\n",
 368                        dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
 369                        "playback" : "capture");
 370                return -EBUSY;
 371        }
 372        tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
 373                     (unsigned long)dmadata);
 374        return 0;
 375}
 376
 377static int txx9aclc_pcm_probe(struct snd_soc_component *component)
 378{
 379        snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
 380        return 0;
 381}
 382
 383static void txx9aclc_pcm_remove(struct snd_soc_component *component)
 384{
 385        struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
 386        struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
 387        void __iomem *base = drvdata->base;
 388        int i;
 389
 390        /* disable all FIFO DMAs */
 391        __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
 392        /* dummy R/W to clear pending DMAREQ if any */
 393        __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
 394
 395        for (i = 0; i < 2; i++) {
 396                struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
 397                struct dma_chan *chan = dmadata->dma_chan;
 398
 399                if (chan) {
 400                        dmadata->frag_count = -1;
 401                        dmaengine_terminate_all(chan);
 402                        dma_release_channel(chan);
 403                }
 404                dev->dmadata[i].dma_chan = NULL;
 405        }
 406}
 407
 408static const struct snd_soc_component_driver txx9aclc_soc_component = {
 409        .name           = DRV_NAME,
 410        .probe          = txx9aclc_pcm_probe,
 411        .remove         = txx9aclc_pcm_remove,
 412        .ops            = &txx9aclc_pcm_ops,
 413        .pcm_new        = txx9aclc_pcm_new,
 414};
 415
 416static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
 417{
 418        return devm_snd_soc_register_component(&pdev->dev,
 419                                        &txx9aclc_soc_component, NULL, 0);
 420}
 421
 422static struct platform_driver txx9aclc_pcm_driver = {
 423        .driver = {
 424                        .name = "txx9aclc-pcm-audio",
 425        },
 426
 427        .probe = txx9aclc_soc_platform_probe,
 428};
 429
 430module_platform_driver(txx9aclc_pcm_driver);
 431
 432MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
 433MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
 434MODULE_LICENSE("GPL");
 435