LXR linux/arch/ia64/include/asm/acenv.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * IA64 specific ACPICA environments and implementation
   4 *
   5 * Copyright (C) 2014, Intel Corporation
   6 *   Author: Lv Zheng <lv.zheng@intel.com>
   7 */
   8
   9#ifndef _ASM_IA64_ACENV_H
  10#define _ASM_IA64_ACENV_H
  11
  12#include <asm/intrinsics.h>
  13
  14#define COMPILER_DEPENDENT_INT64        long
  15#define COMPILER_DEPENDENT_UINT64       unsigned long
  16
  17/* Asm macros */
  18
  19static inline int
  20ia64_acpi_acquire_global_lock(unsigned int *lock)
  21{
  22        unsigned int old, new, val;
  23        do {
  24                old = *lock;
  25                new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
  26                val = ia64_cmpxchg4_acq(lock, new, old);
  27        } while (unlikely (val != old));
  28        return (new < 3) ? -1 : 0;
  29}
  30
  31static inline int
  32ia64_acpi_release_global_lock(unsigned int *lock)
  33{
  34        unsigned int old, new, val;
  35        do {
  36                old = *lock;
  37                new = old & ~0x3;
  38                val = ia64_cmpxchg4_acq(lock, new, old);
  39        } while (unlikely (val != old));
  40        return old & 0x1;
  41}
  42
  43#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq)                             \
  44        ((Acq) = ia64_acpi_acquire_global_lock(&facs->global_lock))
  45
  46#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq)                             \
  47        ((Acq) = ia64_acpi_release_global_lock(&facs->global_lock))
  48
  49#endif /* _ASM_IA64_ACENV_H */
  50