LXR linux/arch/sh/include/asm/mmu_context

   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __ASM_SH_MMU_CONTEXT_64_H
   3#define __ASM_SH_MMU_CONTEXT_64_H
   4
   5/*
   6 * sh64-specific mmu_context interface.
   7 *
   8 * Copyright (C) 2000, 2001  Paolo Alberelli
   9 * Copyright (C) 2003 - 2007  Paul Mundt
  10 */
  11#include <cpu/registers.h>
  12#include <asm/cacheflush.h>
  13
  14#define SR_ASID_MASK            0xffffffffff00ffffULL
  15#define SR_ASID_SHIFT           16
  16
  17/*
  18 * Destroy context related info for an mm_struct that is about
  19 * to be put to rest.
  20 */
  21static inline void destroy_context(struct mm_struct *mm)
  22{
  23        /* Well, at least free TLB entries */
  24        flush_tlb_mm(mm);
  25}
  26
  27static inline unsigned long get_asid(void)
  28{
  29        unsigned long long sr;
  30
  31        asm volatile ("getcon   " __SR ", %0\n\t"
  32                      : "=r" (sr));
  33
  34        sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
  35        return (unsigned long) sr;
  36}
  37
  38/* Set ASID into SR */
  39static inline void set_asid(unsigned long asid)
  40{
  41        unsigned long long sr, pc;
  42
  43        asm volatile ("getcon   " __SR ", %0" : "=r" (sr));
  44
  45        sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
  46
  47        /*
  48         * It is possible that this function may be inlined and so to avoid
  49         * the assembler reporting duplicate symbols we make use of the
  50         * gas trick of generating symbols using numerics and forward
  51         * reference.
  52         */
  53        asm volatile ("movi     1, %1\n\t"
  54                      "shlli    %1, 28, %1\n\t"
  55                      "or       %0, %1, %1\n\t"
  56                      "putcon   %1, " __SR "\n\t"
  57                      "putcon   %0, " __SSR "\n\t"
  58                      "movi     1f, %1\n\t"
  59                      "ori      %1, 1 , %1\n\t"
  60                      "putcon   %1, " __SPC "\n\t"
  61                      "rte\n"
  62                      "1:\n\t"
  63                      : "=r" (sr), "=r" (pc) : "0" (sr));
  64}
  65
  66/* arch/sh/kernel/cpu/sh5/entry.S */
  67extern unsigned long switch_and_save_asid(unsigned long new_asid);
  68
  69/* No spare register to twiddle, so use a software cache */
  70extern pgd_t *mmu_pdtp_cache;
  71
  72#define set_TTB(pgd)    (mmu_pdtp_cache = (pgd))
  73#define get_TTB()       (mmu_pdtp_cache)
  74
  75#endif /* __ASM_SH_MMU_CONTEXT_64_H */
  76