linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
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   1/*
   2 * Copyright 2016 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs <bskeggs@redhat.com>
  23 */
  24#include "ior.h"
  25
  26void
  27gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern)
  28{
  29        struct nvkm_device *device = sor->disp->engine.subdev.device;
  30        const u32 soff = nv50_ior_base(sor);
  31        const u32 data = 0x01010101 * pattern;
  32        if (sor->asy.link & 1)
  33                nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
  34        else
  35                nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
  36}
  37
  38static const struct nvkm_ior_func
  39gm107_sor = {
  40        .state = gf119_sor_state,
  41        .power = nv50_sor_power,
  42        .clock = gf119_sor_clock,
  43        .hdmi = {
  44                .ctrl = gk104_hdmi_ctrl,
  45        },
  46        .dp = {
  47                .lanes = { 0, 1, 2, 3 },
  48                .links = gf119_sor_dp_links,
  49                .power = g94_sor_dp_power,
  50                .pattern = gm107_sor_dp_pattern,
  51                .drive = gf119_sor_dp_drive,
  52                .vcpi = gf119_sor_dp_vcpi,
  53                .audio = gf119_sor_dp_audio,
  54                .audio_sym = gf119_sor_dp_audio_sym,
  55                .watermark = gf119_sor_dp_watermark,
  56        },
  57        .hda = {
  58                .hpd = gf119_hda_hpd,
  59                .eld = gf119_hda_eld,
  60        },
  61};
  62
  63int
  64gm107_sor_new(struct nvkm_disp *disp, int id)
  65{
  66        return nvkm_ior_new_(&gm107_sor, disp, SOR, id);
  67}
  68