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10#include <linux/clk.h>
11#include <linux/completion.h>
12#include <linux/device.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/platform_device.h>
21#include <linux/sched.h>
22
23
24#define I2C_OFS_IICACT0 0x00
25#define I2C_OFS_IIC0 0x04
26#define I2C_OFS_IICC0 0x08
27#define I2C_OFS_SVA0 0x0c
28#define I2C_OFS_IICCL0 0x10
29#define I2C_OFS_IICX0 0x14
30#define I2C_OFS_IICS0 0x18
31#define I2C_OFS_IICSE0 0x1c
32#define I2C_OFS_IICF0 0x20
33
34
35#define I2C_BIT_IICE0 0x0001
36
37
38#define I2C_BIT_LREL0 0x0040
39#define I2C_BIT_WREL0 0x0020
40#define I2C_BIT_SPIE0 0x0010
41#define I2C_BIT_WTIM0 0x0008
42#define I2C_BIT_ACKE0 0x0004
43#define I2C_BIT_STT0 0x0002
44#define I2C_BIT_SPT0 0x0001
45
46
47#define I2C_BIT_SMC0 0x0008
48#define I2C_BIT_DFC0 0x0004
49
50
51#define I2C_BIT_MSTS0 0x0080
52#define I2C_BIT_ALD0 0x0040
53#define I2C_BIT_EXC0 0x0020
54#define I2C_BIT_COI0 0x0010
55#define I2C_BIT_TRC0 0x0008
56#define I2C_BIT_ACKD0 0x0004
57#define I2C_BIT_STD0 0x0002
58#define I2C_BIT_SPD0 0x0001
59
60
61#define I2C_BIT_STCF 0x0080
62#define I2C_BIT_IICBSY 0x0040
63#define I2C_BIT_STCEN 0x0002
64#define I2C_BIT_IICRSV 0x0001
65
66struct em_i2c_device {
67 void __iomem *base;
68 struct i2c_adapter adap;
69 struct completion msg_done;
70 struct clk *sclk;
71 struct i2c_client *slave;
72 int irq;
73};
74
75static inline void em_clear_set_bit(struct em_i2c_device *priv, u8 clear, u8 set, u8 reg)
76{
77 writeb((readb(priv->base + reg) & ~clear) | set, priv->base + reg);
78}
79
80static int em_i2c_wait_for_event(struct em_i2c_device *priv)
81{
82 unsigned long time_left;
83 int status;
84
85 reinit_completion(&priv->msg_done);
86
87 time_left = wait_for_completion_timeout(&priv->msg_done, priv->adap.timeout);
88
89 if (!time_left)
90 return -ETIMEDOUT;
91
92 status = readb(priv->base + I2C_OFS_IICSE0);
93 return status & I2C_BIT_ALD0 ? -EAGAIN : status;
94}
95
96static void em_i2c_stop(struct em_i2c_device *priv)
97{
98
99 em_clear_set_bit(priv, 0, I2C_BIT_SPT0 | I2C_BIT_SPIE0, I2C_OFS_IICC0);
100
101
102 em_i2c_wait_for_event(priv);
103}
104
105static void em_i2c_reset(struct i2c_adapter *adap)
106{
107 struct em_i2c_device *priv = i2c_get_adapdata(adap);
108 int retr;
109
110
111 if (readb(priv->base + I2C_OFS_IICACT0) & I2C_BIT_IICE0) {
112
113 writeb(0, priv->base + I2C_OFS_IICACT0);
114
115 retr = 1000;
116 while (readb(priv->base + I2C_OFS_IICACT0) == 1 && retr)
117 retr--;
118 WARN_ON(retr == 0);
119 }
120
121
122 writeb(I2C_BIT_DFC0, priv->base + I2C_OFS_IICCL0);
123
124
125 writeb(I2C_BIT_STCEN | I2C_BIT_IICRSV, priv->base + I2C_OFS_IICF0);
126
127
128 writeb(I2C_BIT_WTIM0, priv->base + I2C_OFS_IICC0);
129
130
131 writeb(I2C_BIT_IICE0, priv->base + I2C_OFS_IICACT0);
132
133 retr = 1000;
134 while (readb(priv->base + I2C_OFS_IICACT0) == 0 && retr)
135 retr--;
136 WARN_ON(retr == 0);
137}
138
139static int __em_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
140 int stop)
141{
142 struct em_i2c_device *priv = i2c_get_adapdata(adap);
143 int count, status, read = !!(msg->flags & I2C_M_RD);
144
145
146 em_clear_set_bit(priv, 0, I2C_BIT_ACKE0 | I2C_BIT_WTIM0, I2C_OFS_IICC0);
147 em_clear_set_bit(priv, 0, I2C_BIT_STT0, I2C_OFS_IICC0);
148
149
150 writeb(i2c_8bit_addr_from_msg(msg), priv->base + I2C_OFS_IIC0);
151
152
153 status = em_i2c_wait_for_event(priv);
154 if (status < 0)
155 goto out_reset;
156
157
158 if (!(status & I2C_BIT_ACKD0)) {
159 em_i2c_stop(priv);
160 goto out;
161 }
162
163
164 if (read) {
165
166 em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_ACKE0, I2C_OFS_IICC0);
167 em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_WREL0, I2C_OFS_IICC0);
168
169
170 status = em_i2c_wait_for_event(priv);
171 if (status < 0)
172 goto out_reset;
173 }
174
175
176 for (count = 0; count < msg->len; count++) {
177 if (read) {
178 msg->buf[count] = readb(priv->base + I2C_OFS_IIC0);
179 em_clear_set_bit(priv, 0, I2C_BIT_WREL0, I2C_OFS_IICC0);
180
181 } else {
182
183 if (!(status & I2C_BIT_ACKD0)) {
184 em_i2c_stop(priv);
185 goto out;
186 }
187
188
189 writeb(msg->buf[count], priv->base + I2C_OFS_IIC0);
190 }
191
192
193 status = em_i2c_wait_for_event(priv);
194 if (status < 0)
195 goto out_reset;
196 }
197
198 if (stop)
199 em_i2c_stop(priv);
200
201 return count;
202
203out_reset:
204 em_i2c_reset(adap);
205out:
206 return status < 0 ? status : -ENXIO;
207}
208
209static int em_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
210 int num)
211{
212 struct em_i2c_device *priv = i2c_get_adapdata(adap);
213 int ret, i;
214
215 if (readb(priv->base + I2C_OFS_IICF0) & I2C_BIT_IICBSY)
216 return -EAGAIN;
217
218 for (i = 0; i < num; i++) {
219 ret = __em_i2c_xfer(adap, &msgs[i], (i == (num - 1)));
220 if (ret < 0)
221 return ret;
222 }
223
224
225 return num;
226}
227
228static bool em_i2c_slave_irq(struct em_i2c_device *priv)
229{
230 u8 status, value;
231 enum i2c_slave_event event;
232 int ret;
233
234 if (!priv->slave)
235 return false;
236
237 status = readb(priv->base + I2C_OFS_IICSE0);
238
239
240 if (status & I2C_BIT_EXC0) {
241 em_clear_set_bit(priv, 0, I2C_BIT_LREL0, I2C_OFS_IICC0);
242 return true;
243 }
244
245
246 if (status & I2C_BIT_SPD0) {
247
248 i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);
249
250 return false;
251 }
252
253
254 if (!(status & I2C_BIT_COI0))
255 return false;
256
257
258 em_clear_set_bit(priv, 0, I2C_BIT_SPIE0, I2C_OFS_IICC0);
259
260
261 if (status & I2C_BIT_TRC0) {
262 if (status & I2C_BIT_ACKD0) {
263
264 em_clear_set_bit(priv, 0, I2C_BIT_WTIM0, I2C_OFS_IICC0);
265
266
267 event = status & I2C_BIT_STD0 ?
268 I2C_SLAVE_READ_REQUESTED :
269 I2C_SLAVE_READ_PROCESSED;
270 i2c_slave_event(priv->slave, event, &value);
271 writeb(value, priv->base + I2C_OFS_IIC0);
272 } else {
273
274 em_clear_set_bit(priv, 0, I2C_BIT_LREL0, I2C_OFS_IICC0);
275 }
276 } else {
277
278 em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_ACKE0,
279 I2C_OFS_IICC0);
280 em_clear_set_bit(priv, I2C_BIT_WTIM0, I2C_BIT_WREL0,
281 I2C_OFS_IICC0);
282
283 if (status & I2C_BIT_STD0) {
284 i2c_slave_event(priv->slave, I2C_SLAVE_WRITE_REQUESTED,
285 &value);
286 } else {
287
288 value = readb(priv->base + I2C_OFS_IIC0);
289 ret = i2c_slave_event(priv->slave,
290 I2C_SLAVE_WRITE_RECEIVED, &value);
291 if (ret < 0)
292 em_clear_set_bit(priv, I2C_BIT_ACKE0, 0,
293 I2C_OFS_IICC0);
294 }
295 }
296
297 return true;
298}
299
300static irqreturn_t em_i2c_irq_handler(int this_irq, void *dev_id)
301{
302 struct em_i2c_device *priv = dev_id;
303
304 if (em_i2c_slave_irq(priv))
305 return IRQ_HANDLED;
306
307 complete(&priv->msg_done);
308
309 return IRQ_HANDLED;
310}
311
312static u32 em_i2c_func(struct i2c_adapter *adap)
313{
314 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SLAVE;
315}
316
317static int em_i2c_reg_slave(struct i2c_client *slave)
318{
319 struct em_i2c_device *priv = i2c_get_adapdata(slave->adapter);
320
321 if (priv->slave)
322 return -EBUSY;
323
324 if (slave->flags & I2C_CLIENT_TEN)
325 return -EAFNOSUPPORT;
326
327 priv->slave = slave;
328
329
330 writeb(slave->addr << 1, priv->base + I2C_OFS_SVA0);
331
332 return 0;
333}
334
335static int em_i2c_unreg_slave(struct i2c_client *slave)
336{
337 struct em_i2c_device *priv = i2c_get_adapdata(slave->adapter);
338
339 WARN_ON(!priv->slave);
340
341 writeb(0, priv->base + I2C_OFS_SVA0);
342
343
344
345
346
347
348 synchronize_irq(priv->irq);
349 priv->slave = NULL;
350
351 return 0;
352}
353
354static const struct i2c_algorithm em_i2c_algo = {
355 .master_xfer = em_i2c_xfer,
356 .functionality = em_i2c_func,
357 .reg_slave = em_i2c_reg_slave,
358 .unreg_slave = em_i2c_unreg_slave,
359};
360
361static int em_i2c_probe(struct platform_device *pdev)
362{
363 struct em_i2c_device *priv;
364 struct resource *r;
365 int ret;
366
367 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
368 if (!priv)
369 return -ENOMEM;
370
371 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
372 priv->base = devm_ioremap_resource(&pdev->dev, r);
373 if (IS_ERR(priv->base))
374 return PTR_ERR(priv->base);
375
376 strlcpy(priv->adap.name, "EMEV2 I2C", sizeof(priv->adap.name));
377
378 priv->sclk = devm_clk_get(&pdev->dev, "sclk");
379 if (IS_ERR(priv->sclk))
380 return PTR_ERR(priv->sclk);
381
382 ret = clk_prepare_enable(priv->sclk);
383 if (ret)
384 return ret;
385
386 priv->adap.timeout = msecs_to_jiffies(100);
387 priv->adap.retries = 5;
388 priv->adap.dev.parent = &pdev->dev;
389 priv->adap.algo = &em_i2c_algo;
390 priv->adap.owner = THIS_MODULE;
391 priv->adap.dev.of_node = pdev->dev.of_node;
392
393 init_completion(&priv->msg_done);
394
395 platform_set_drvdata(pdev, priv);
396 i2c_set_adapdata(&priv->adap, priv);
397
398 em_i2c_reset(&priv->adap);
399
400 priv->irq = platform_get_irq(pdev, 0);
401 ret = devm_request_irq(&pdev->dev, priv->irq, em_i2c_irq_handler, 0,
402 "em_i2c", priv);
403 if (ret)
404 goto err_clk;
405
406 ret = i2c_add_adapter(&priv->adap);
407
408 if (ret)
409 goto err_clk;
410
411 dev_info(&pdev->dev, "Added i2c controller %d, irq %d\n", priv->adap.nr,
412 priv->irq);
413
414 return 0;
415
416err_clk:
417 clk_disable_unprepare(priv->sclk);
418 return ret;
419}
420
421static int em_i2c_remove(struct platform_device *dev)
422{
423 struct em_i2c_device *priv = platform_get_drvdata(dev);
424
425 i2c_del_adapter(&priv->adap);
426 clk_disable_unprepare(priv->sclk);
427
428 return 0;
429}
430
431static const struct of_device_id em_i2c_ids[] = {
432 { .compatible = "renesas,iic-emev2", },
433 { }
434};
435
436static struct platform_driver em_i2c_driver = {
437 .probe = em_i2c_probe,
438 .remove = em_i2c_remove,
439 .driver = {
440 .name = "em-i2c",
441 .of_match_table = em_i2c_ids,
442 }
443};
444module_platform_driver(em_i2c_driver);
445
446MODULE_DESCRIPTION("EMEV2 I2C bus driver");
447MODULE_AUTHOR("Ian Molton and Wolfram Sang <wsa@sang-engineering.com>");
448MODULE_LICENSE("GPL v2");
449MODULE_DEVICE_TABLE(of, em_i2c_ids);
450
