LXR linux/drivers/ide/via82cxxx.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * VIA IDE driver for Linux. Supported southbridges:
   4 *
   5 *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
   6 *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
   7 *   vt8235, vt8237, vt8237a
   8 *
   9 * Copyright (c) 2000-2002 Vojtech Pavlik
  10 * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
  11 *
  12 * Based on the work of:
  13 *      Michel Aubry
  14 *      Jeff Garzik
  15 *      Andre Hedrick
  16 *
  17 * Documentation:
  18 *      Obsolete device documentation publicly available from via.com.tw
  19 *      Current device documentation available under NDA only
  20 */
  21
  22
  23#include <linux/module.h>
  24#include <linux/kernel.h>
  25#include <linux/slab.h>
  26#include <linux/pci.h>
  27#include <linux/init.h>
  28#include <linux/ide.h>
  29#include <linux/dmi.h>
  30
  31#ifdef CONFIG_PPC_CHRP
  32#include <asm/processor.h>
  33#endif
  34
  35#define DRV_NAME "via82cxxx"
  36
  37#define VIA_IDE_ENABLE          0x40
  38#define VIA_IDE_CONFIG          0x41
  39#define VIA_FIFO_CONFIG         0x43
  40#define VIA_MISC_1              0x44
  41#define VIA_MISC_2              0x45
  42#define VIA_MISC_3              0x46
  43#define VIA_DRIVE_TIMING        0x48
  44#define VIA_8BIT_TIMING         0x4e
  45#define VIA_ADDRESS_SETUP       0x4c
  46#define VIA_UDMA_TIMING         0x50
  47
  48#define VIA_BAD_PREQ            0x01 /* Crashes if PREQ# till DDACK# set */
  49#define VIA_BAD_CLK66           0x02 /* 66 MHz clock doesn't work correctly */
  50#define VIA_SET_FIFO            0x04 /* Needs to have FIFO split set */
  51#define VIA_NO_UNMASK           0x08 /* Doesn't work with IRQ unmasking on */
  52#define VIA_BAD_ID              0x10 /* Has wrong vendor ID (0x1107) */
  53#define VIA_BAD_AST             0x20 /* Don't touch Address Setup Timing */
  54#define VIA_SATA_PATA           0x80 /* SATA/PATA combined configuration */
  55
  56enum {
  57        VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
  58};
  59
  60/*
  61 * VIA SouthBridge chips.
  62 */
  63
  64static struct via_isa_bridge {
  65        char *name;
  66        u16 id;
  67        u8 rev_min;
  68        u8 rev_max;
  69        u8 udma_mask;
  70        u8 flags;
  71} via_isa_bridges[] = {
  72        { "vx855",      PCI_DEVICE_ID_VIA_VX855,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  73        { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  74        { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  75        { "vt8261",     PCI_DEVICE_ID_VIA_8261,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  76        { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  77        { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  78        { "vt6415",     PCI_DEVICE_ID_VIA_6415,     0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
  79        { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  80        { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  81        { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  82        { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  83        { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  84        { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
  85        { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
  86        { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
  87        { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
  88        { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
  89        { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  90        { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
  91        { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  92        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
  93        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
  94        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
  95        { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
  96        { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
  97        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
  98        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
  99        { "vtxxxx",     PCI_DEVICE_ID_VIA_ANON,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 100        { NULL }
 101};
 102
 103static unsigned int via_clock;
 104static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
 105
 106struct via82cxxx_dev
 107{
 108        struct via_isa_bridge *via_config;
 109        unsigned int via_80w;
 110};
 111
 112/**
 113 *      via_set_speed                   -       write timing registers
 114 *      @dev: PCI device
 115 *      @dn: device
 116 *      @timing: IDE timing data to use
 117 *
 118 *      via_set_speed writes timing values to the chipset registers
 119 */
 120
 121static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
 122{
 123        struct pci_dev *dev = to_pci_dev(hwif->dev);
 124        struct ide_host *host = pci_get_drvdata(dev);
 125        struct via82cxxx_dev *vdev = host->host_priv;
 126        u8 t;
 127
 128        if (~vdev->via_config->flags & VIA_BAD_AST) {
 129                pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
 130                t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
 131                pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
 132        }
 133
 134        pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
 135                ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
 136
 137        pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
 138                ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
 139
 140        switch (vdev->via_config->udma_mask) {
 141        case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
 142        case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
 143        case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
 144        case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
 145        }
 146
 147        /* Set UDMA unless device is not UDMA capable */
 148        if (vdev->via_config->udma_mask) {
 149                u8 udma_etc;
 150
 151                pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
 152
 153                /* clear transfer mode bit */
 154                udma_etc &= ~0x20;
 155
 156                if (timing->udma) {
 157                        /* preserve 80-wire cable detection bit */
 158                        udma_etc &= 0x10;
 159                        udma_etc |= t;
 160                }
 161
 162                pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
 163        }
 164}
 165
 166/**
 167 *      via_set_drive           -       configure transfer mode
 168 *      @hwif: port
 169 *      @drive: Drive to set up
 170 *
 171 *      via_set_drive() computes timing values configures the chipset to
 172 *      a desired transfer mode.  It also can be called by upper layers.
 173 */
 174
 175static void via_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
 176{
 177        ide_drive_t *peer = ide_get_pair_dev(drive);
 178        struct pci_dev *dev = to_pci_dev(hwif->dev);
 179        struct ide_host *host = pci_get_drvdata(dev);
 180        struct via82cxxx_dev *vdev = host->host_priv;
 181        struct ide_timing t, p;
 182        unsigned int T, UT;
 183        const u8 speed = drive->dma_mode;
 184
 185        T = 1000000000 / via_clock;
 186
 187        switch (vdev->via_config->udma_mask) {
 188        case ATA_UDMA2: UT = T;   break;
 189        case ATA_UDMA4: UT = T/2; break;
 190        case ATA_UDMA5: UT = T/3; break;
 191        case ATA_UDMA6: UT = T/4; break;
 192        default:        UT = T;
 193        }
 194
 195        ide_timing_compute(drive, speed, &t, T, UT);
 196
 197        if (peer) {
 198                ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
 199                ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
 200        }
 201
 202        via_set_speed(hwif, drive->dn, &t);
 203}
 204
 205/**
 206 *      via_set_pio_mode        -       set host controller for PIO mode
 207 *      @hwif: port
 208 *      @drive: drive
 209 *
 210 *      A callback from the upper layers for PIO-only tuning.
 211 */
 212
 213static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 214{
 215        drive->dma_mode = drive->pio_mode;
 216        via_set_drive(hwif, drive);
 217}
 218
 219static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
 220{
 221        struct via_isa_bridge *via_config;
 222
 223        for (via_config = via_isa_bridges;
 224             via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
 225                if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
 226                        !!(via_config->flags & VIA_BAD_ID),
 227                        via_config->id, NULL))) {
 228
 229                        if ((*isa)->revision >= via_config->rev_min &&
 230                            (*isa)->revision <= via_config->rev_max)
 231                                break;
 232                        pci_dev_put(*isa);
 233                }
 234
 235        return via_config;
 236}
 237
 238/*
 239 * Check and handle 80-wire cable presence
 240 */
 241static void via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
 242{
 243        int i;
 244
 245        switch (vdev->via_config->udma_mask) {
 246                case ATA_UDMA4:
 247                        for (i = 24; i >= 0; i -= 8)
 248                                if (((u >> (i & 16)) & 8) &&
 249                                    ((u >> i) & 0x20) &&
 250                                     (((u >> i) & 7) < 2)) {
 251                                        /*
 252                                         * 2x PCI clock and
 253                                         * UDMA w/ < 3T/cycle
 254                                         */
 255                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 256                                }
 257                        break;
 258
 259                case ATA_UDMA5:
 260                        for (i = 24; i >= 0; i -= 8)
 261                                if (((u >> i) & 0x10) ||
 262                                    (((u >> i) & 0x20) &&
 263                                     (((u >> i) & 7) < 4))) {
 264                                        /* BIOS 80-wire bit or
 265                                         * UDMA w/ < 60ns/cycle
 266                                         */
 267                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 268                                }
 269                        break;
 270
 271                case ATA_UDMA6:
 272                        for (i = 24; i >= 0; i -= 8)
 273                                if (((u >> i) & 0x10) ||
 274                                    (((u >> i) & 0x20) &&
 275                                     (((u >> i) & 7) < 6))) {
 276                                        /* BIOS 80-wire bit or
 277                                         * UDMA w/ < 60ns/cycle
 278                                         */
 279                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 280                                }
 281                        break;
 282        }
 283}
 284
 285/**
 286 *      init_chipset_via82cxxx  -       initialization handler
 287 *      @dev: PCI device
 288 *
 289 *      The initialization callback. Here we determine the IDE chip type
 290 *      and initialize its drive independent registers.
 291 */
 292
 293static int init_chipset_via82cxxx(struct pci_dev *dev)
 294{
 295        struct ide_host *host = pci_get_drvdata(dev);
 296        struct via82cxxx_dev *vdev = host->host_priv;
 297        struct via_isa_bridge *via_config = vdev->via_config;
 298        u8 t, v;
 299        u32 u;
 300
 301        /*
 302         * Detect cable and configure Clk66
 303         */
 304        pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
 305
 306        via_cable_detect(vdev, u);
 307
 308        if (via_config->udma_mask == ATA_UDMA4) {
 309                /* Enable Clk66 */
 310                pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
 311        } else if (via_config->flags & VIA_BAD_CLK66) {
 312                /* Would cause trouble on 596a and 686 */
 313                pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
 314        }
 315
 316        /*
 317         * Check whether interfaces are enabled.
 318         */
 319
 320        pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
 321
 322        /*
 323         * Set up FIFO sizes and thresholds.
 324         */
 325
 326        pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
 327
 328        /* Disable PREQ# till DDACK# */
 329        if (via_config->flags & VIA_BAD_PREQ) {
 330                /* Would crash on 586b rev 41 */
 331                t &= 0x7f;
 332        }
 333
 334        /* Fix FIFO split between channels */
 335        if (via_config->flags & VIA_SET_FIFO) {
 336                t &= (t & 0x9f);
 337                switch (v & 3) {
 338                        case 2: t |= 0x00; break;       /* 16 on primary */
 339                        case 1: t |= 0x60; break;       /* 16 on secondary */
 340                        case 3: t |= 0x20; break;       /* 8 pri 8 sec */
 341                }
 342        }
 343
 344        pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
 345
 346        return 0;
 347}
 348
 349/*
 350 *      Cable special cases
 351 */
 352
 353static const struct dmi_system_id cable_dmi_table[] = {
 354        {
 355                .ident = "Acer Ferrari 3400",
 356                .matches = {
 357                        DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 358                        DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 359                },
 360        },
 361        { }
 362};
 363
 364static int via_cable_override(struct pci_dev *pdev)
 365{
 366        /* Systems by DMI */
 367        if (dmi_check_system(cable_dmi_table))
 368                return 1;
 369
 370        /* Arima W730-K8/Targa Visionary 811/... */
 371        if (pdev->subsystem_vendor == 0x161F &&
 372            pdev->subsystem_device == 0x2032)
 373                return 1;
 374
 375        return 0;
 376}
 377
 378static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
 379{
 380        struct pci_dev *pdev = to_pci_dev(hwif->dev);
 381        struct ide_host *host = pci_get_drvdata(pdev);
 382        struct via82cxxx_dev *vdev = host->host_priv;
 383
 384        if (via_cable_override(pdev))
 385                return ATA_CBL_PATA40_SHORT;
 386
 387        if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0)
 388                return ATA_CBL_SATA;
 389
 390        if ((vdev->via_80w >> hwif->channel) & 1)
 391                return ATA_CBL_PATA80;
 392        else
 393                return ATA_CBL_PATA40;
 394}
 395
 396static const struct ide_port_ops via_port_ops = {
 397        .set_pio_mode           = via_set_pio_mode,
 398        .set_dma_mode           = via_set_drive,
 399        .cable_detect           = via82cxxx_cable_detect,
 400};
 401
 402static const struct ide_port_info via82cxxx_chipset = {
 403        .name           = DRV_NAME,
 404        .init_chipset   = init_chipset_via82cxxx,
 405        .enablebits     = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
 406        .port_ops       = &via_port_ops,
 407        .host_flags     = IDE_HFLAG_PIO_NO_BLACKLIST |
 408                          IDE_HFLAG_POST_SET_MODE |
 409                          IDE_HFLAG_IO_32BIT,
 410        .pio_mask       = ATA_PIO5,
 411        .swdma_mask     = ATA_SWDMA2,
 412        .mwdma_mask     = ATA_MWDMA2,
 413};
 414
 415static int via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 416{
 417        struct pci_dev *isa = NULL;
 418        struct via_isa_bridge *via_config;
 419        struct via82cxxx_dev *vdev;
 420        int rc;
 421        u8 idx = id->driver_data;
 422        struct ide_port_info d;
 423
 424        d = via82cxxx_chipset;
 425
 426        /*
 427         * Find the ISA bridge and check we know what it is.
 428         */
 429        via_config = via_config_find(&isa);
 430
 431        /*
 432         * Print the boot message.
 433         */
 434        printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
 435                pci_name(dev), via_config->name, isa->revision,
 436                via_config->udma_mask ? "U" : "MW",
 437                via_dma[via_config->udma_mask ?
 438                        (fls(via_config->udma_mask) - 1) : 0]);
 439
 440        pci_dev_put(isa);
 441
 442        /*
 443         * Determine system bus clock.
 444         */
 445        via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
 446
 447        switch (via_clock) {
 448        case 33000: via_clock = 33333; break;
 449        case 37000: via_clock = 37500; break;
 450        case 41000: via_clock = 41666; break;
 451        }
 452
 453        if (via_clock < 20000 || via_clock > 50000) {
 454                printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
 455                        "impossible (%d), using 33 MHz instead.\n", via_clock);
 456                via_clock = 33333;
 457        }
 458
 459        if (idx == 1)
 460                d.enablebits[1].reg = d.enablebits[0].reg = 0;
 461        else
 462                d.host_flags |= IDE_HFLAG_NO_AUTODMA;
 463
 464        if (idx == VIA_IDFLAG_SINGLE)
 465                d.host_flags |= IDE_HFLAG_SINGLE;
 466
 467        if ((via_config->flags & VIA_NO_UNMASK) == 0)
 468                d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
 469
 470        d.udma_mask = via_config->udma_mask;
 471
 472        vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
 473        if (!vdev) {
 474                printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
 475                        pci_name(dev));
 476                return -ENOMEM;
 477        }
 478
 479        vdev->via_config = via_config;
 480
 481        rc = ide_pci_init_one(dev, &d, vdev);
 482        if (rc)
 483                kfree(vdev);
 484
 485        return rc;
 486}
 487
 488static void via_remove(struct pci_dev *dev)
 489{
 490        struct ide_host *host = pci_get_drvdata(dev);
 491        struct via82cxxx_dev *vdev = host->host_priv;
 492
 493        ide_pci_remove(dev);
 494        kfree(vdev);
 495}
 496
 497static const struct pci_device_id via_pci_tbl[] = {
 498        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1),  0 },
 499        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1),  0 },
 500        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
 501        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
 502        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410),      1 },
 503        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6415),      1 },
 504        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
 505        { 0, },
 506};
 507MODULE_DEVICE_TABLE(pci, via_pci_tbl);
 508
 509static struct pci_driver via_pci_driver = {
 510        .name           = "VIA_IDE",
 511        .id_table       = via_pci_tbl,
 512        .probe          = via_init_one,
 513        .remove         = via_remove,
 514        .suspend        = ide_pci_suspend,
 515        .resume         = ide_pci_resume,
 516};
 517
 518static int __init via_ide_init(void)
 519{
 520        return ide_pci_register_driver(&via_pci_driver);
 521}
 522
 523static void __exit via_ide_exit(void)
 524{
 525        pci_unregister_driver(&via_pci_driver);
 526}
 527
 528module_init(via_ide_init);
 529module_exit(via_ide_exit);
 530
 531MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
 532MODULE_DESCRIPTION("PCI driver module for VIA IDE");
 533MODULE_LICENSE("GPL");
 534