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8#include <linux/clk.h>
9#include <linux/delay.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/gpio/consumer.h>
13#include <linux/module.h>
14#include <linux/regulator/consumer.h>
15#include <linux/slab.h>
16#include <linux/spi/spi.h>
17
18#include <linux/iio/iio.h>
19#include <linux/iio/buffer.h>
20#include <linux/iio/trigger.h>
21#include <linux/iio/trigger_consumer.h>
22#include <linux/iio/triggered_buffer.h>
23
24struct ad7766_chip_info {
25 unsigned int decimation_factor;
26};
27
28enum {
29 AD7766_SUPPLY_AVDD = 0,
30 AD7766_SUPPLY_DVDD = 1,
31 AD7766_SUPPLY_VREF = 2,
32 AD7766_NUM_SUPPLIES = 3
33};
34
35struct ad7766 {
36 const struct ad7766_chip_info *chip_info;
37 struct spi_device *spi;
38 struct clk *mclk;
39 struct gpio_desc *pd_gpio;
40 struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES];
41
42 struct iio_trigger *trig;
43
44 struct spi_transfer xfer;
45 struct spi_message msg;
46
47
48
49
50
51
52
53 unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)]
54 ____cacheline_aligned;
55};
56
57
58
59
60
61enum ad7766_device_ids {
62 ID_AD7766,
63 ID_AD7766_1,
64 ID_AD7766_2,
65};
66
67static irqreturn_t ad7766_trigger_handler(int irq, void *p)
68{
69 struct iio_poll_func *pf = p;
70 struct iio_dev *indio_dev = pf->indio_dev;
71 struct ad7766 *ad7766 = iio_priv(indio_dev);
72 int ret;
73
74 ret = spi_sync(ad7766->spi, &ad7766->msg);
75 if (ret < 0)
76 goto done;
77
78 iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data,
79 pf->timestamp);
80done:
81 iio_trigger_notify_done(indio_dev->trig);
82
83 return IRQ_HANDLED;
84}
85
86static int ad7766_preenable(struct iio_dev *indio_dev)
87{
88 struct ad7766 *ad7766 = iio_priv(indio_dev);
89 int ret;
90
91 ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
92 if (ret < 0) {
93 dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n",
94 ret);
95 return ret;
96 }
97
98 ret = clk_prepare_enable(ad7766->mclk);
99 if (ret < 0) {
100 dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret);
101 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
102 return ret;
103 }
104
105 gpiod_set_value(ad7766->pd_gpio, 0);
106
107 return 0;
108}
109
110static int ad7766_postdisable(struct iio_dev *indio_dev)
111{
112 struct ad7766 *ad7766 = iio_priv(indio_dev);
113
114 gpiod_set_value(ad7766->pd_gpio, 1);
115
116
117
118
119
120 msleep(20);
121
122 clk_disable_unprepare(ad7766->mclk);
123 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
124
125 return 0;
126}
127
128static int ad7766_read_raw(struct iio_dev *indio_dev,
129 const struct iio_chan_spec *chan, int *val, int *val2, long info)
130{
131 struct ad7766 *ad7766 = iio_priv(indio_dev);
132 struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer;
133 int scale_uv;
134
135 switch (info) {
136 case IIO_CHAN_INFO_SCALE:
137 scale_uv = regulator_get_voltage(vref);
138 if (scale_uv < 0)
139 return scale_uv;
140 *val = scale_uv / 1000;
141 *val2 = chan->scan_type.realbits;
142 return IIO_VAL_FRACTIONAL_LOG2;
143 case IIO_CHAN_INFO_SAMP_FREQ:
144 *val = clk_get_rate(ad7766->mclk) /
145 ad7766->chip_info->decimation_factor;
146 return IIO_VAL_INT;
147 }
148 return -EINVAL;
149}
150
151static const struct iio_chan_spec ad7766_channels[] = {
152 {
153 .type = IIO_VOLTAGE,
154 .indexed = 1,
155 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
156 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
157 .scan_type = {
158 .sign = 's',
159 .realbits = 24,
160 .storagebits = 32,
161 .endianness = IIO_BE,
162 },
163 },
164 IIO_CHAN_SOFT_TIMESTAMP(1),
165};
166
167static const struct ad7766_chip_info ad7766_chip_info[] = {
168 [ID_AD7766] = {
169 .decimation_factor = 8,
170 },
171 [ID_AD7766_1] = {
172 .decimation_factor = 16,
173 },
174 [ID_AD7766_2] = {
175 .decimation_factor = 32,
176 },
177};
178
179static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
180 .preenable = &ad7766_preenable,
181 .postenable = &iio_triggered_buffer_postenable,
182 .predisable = &iio_triggered_buffer_predisable,
183 .postdisable = &ad7766_postdisable,
184};
185
186static const struct iio_info ad7766_info = {
187 .read_raw = &ad7766_read_raw,
188};
189
190static irqreturn_t ad7766_irq(int irq, void *private)
191{
192 iio_trigger_poll(private);
193 return IRQ_HANDLED;
194}
195
196static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
197{
198 struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig);
199
200 if (enable)
201 enable_irq(ad7766->spi->irq);
202 else
203 disable_irq(ad7766->spi->irq);
204
205 return 0;
206}
207
208static const struct iio_trigger_ops ad7766_trigger_ops = {
209 .set_trigger_state = ad7766_set_trigger_state,
210 .validate_device = iio_trigger_validate_own_device,
211};
212
213static int ad7766_probe(struct spi_device *spi)
214{
215 const struct spi_device_id *id = spi_get_device_id(spi);
216 struct iio_dev *indio_dev;
217 struct ad7766 *ad7766;
218 int ret;
219
220 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766));
221 if (!indio_dev)
222 return -ENOMEM;
223
224 ad7766 = iio_priv(indio_dev);
225 ad7766->chip_info = &ad7766_chip_info[id->driver_data];
226
227 ad7766->mclk = devm_clk_get(&spi->dev, "mclk");
228 if (IS_ERR(ad7766->mclk))
229 return PTR_ERR(ad7766->mclk);
230
231 ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd";
232 ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd";
233 ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref";
234
235 ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg),
236 ad7766->reg);
237 if (ret)
238 return ret;
239
240 ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",
241 GPIOD_OUT_HIGH);
242 if (IS_ERR(ad7766->pd_gpio))
243 return PTR_ERR(ad7766->pd_gpio);
244
245 indio_dev->dev.parent = &spi->dev;
246 indio_dev->name = spi_get_device_id(spi)->name;
247 indio_dev->modes = INDIO_DIRECT_MODE;
248 indio_dev->channels = ad7766_channels;
249 indio_dev->num_channels = ARRAY_SIZE(ad7766_channels);
250 indio_dev->info = &ad7766_info;
251
252 if (spi->irq > 0) {
253 ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
254 indio_dev->name, indio_dev->id);
255 if (!ad7766->trig)
256 return -ENOMEM;
257
258 ad7766->trig->ops = &ad7766_trigger_ops;
259 ad7766->trig->dev.parent = &spi->dev;
260 iio_trigger_set_drvdata(ad7766->trig, ad7766);
261
262 ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,
263 IRQF_TRIGGER_FALLING, dev_name(&spi->dev),
264 ad7766->trig);
265 if (ret < 0)
266 return ret;
267
268
269
270
271
272
273 disable_irq(spi->irq);
274
275 ret = devm_iio_trigger_register(&spi->dev, ad7766->trig);
276 if (ret)
277 return ret;
278 }
279
280 spi_set_drvdata(spi, indio_dev);
281
282 ad7766->spi = spi;
283
284
285 ad7766->xfer.rx_buf = &ad7766->data[1];
286 ad7766->xfer.len = 3;
287
288 spi_message_init(&ad7766->msg);
289 spi_message_add_tail(&ad7766->xfer, &ad7766->msg);
290
291 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
292 &iio_pollfunc_store_time, &ad7766_trigger_handler,
293 &ad7766_buffer_setup_ops);
294 if (ret)
295 return ret;
296
297 ret = devm_iio_device_register(&spi->dev, indio_dev);
298 if (ret)
299 return ret;
300 return 0;
301}
302
303static const struct spi_device_id ad7766_id[] = {
304 {"ad7766", ID_AD7766},
305 {"ad7766-1", ID_AD7766_1},
306 {"ad7766-2", ID_AD7766_2},
307 {"ad7767", ID_AD7766},
308 {"ad7767-1", ID_AD7766_1},
309 {"ad7767-2", ID_AD7766_2},
310 {}
311};
312MODULE_DEVICE_TABLE(spi, ad7766_id);
313
314static struct spi_driver ad7766_driver = {
315 .driver = {
316 .name = "ad7766",
317 },
318 .probe = ad7766_probe,
319 .id_table = ad7766_id,
320};
321module_spi_driver(ad7766_driver);
322
323MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
324MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support");
325MODULE_LICENSE("GPL v2");
326