linux/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3* Copyright (C) 2012 Invensense, Inc.
   4*/
   5
   6#include <linux/module.h>
   7#include <linux/slab.h>
   8#include <linux/i2c.h>
   9#include <linux/err.h>
  10#include <linux/delay.h>
  11#include <linux/sysfs.h>
  12#include <linux/jiffies.h>
  13#include <linux/irq.h>
  14#include <linux/interrupt.h>
  15#include <linux/iio/iio.h>
  16#include <linux/acpi.h>
  17#include <linux/platform_device.h>
  18#include <linux/regulator/consumer.h>
  19#include "inv_mpu_iio.h"
  20
  21/*
  22 * this is the gyro scale translated from dynamic range plus/minus
  23 * {250, 500, 1000, 2000} to rad/s
  24 */
  25static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
  26
  27/*
  28 * this is the accel scale translated from dynamic range plus/minus
  29 * {2, 4, 8, 16} to m/s^2
  30 */
  31static const int accel_scale[] = {598, 1196, 2392, 4785};
  32
  33static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
  34        .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  35        .lpf                    = INV_MPU6050_REG_CONFIG,
  36        .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  37        .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  38        .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  39        .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  40        .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  41        .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  42        .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  43        .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  44        .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  45        .temperature            = INV_MPU6050_REG_TEMPERATURE,
  46        .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  47        .int_status             = INV_MPU6050_REG_INT_STATUS,
  48        .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  49        .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  50        .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  51        .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  52        .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  53        .i2c_if                 = INV_ICM20602_REG_I2C_IF,
  54};
  55
  56static const struct inv_mpu6050_reg_map reg_set_6500 = {
  57        .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  58        .lpf                    = INV_MPU6050_REG_CONFIG,
  59        .accel_lpf              = INV_MPU6500_REG_ACCEL_CONFIG_2,
  60        .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  61        .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  62        .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  63        .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  64        .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  65        .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  66        .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  67        .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  68        .temperature            = INV_MPU6050_REG_TEMPERATURE,
  69        .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  70        .int_status             = INV_MPU6050_REG_INT_STATUS,
  71        .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  72        .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  73        .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  74        .accl_offset            = INV_MPU6500_REG_ACCEL_OFFSET,
  75        .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  76        .i2c_if                 = 0,
  77};
  78
  79static const struct inv_mpu6050_reg_map reg_set_6050 = {
  80        .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  81        .lpf                    = INV_MPU6050_REG_CONFIG,
  82        .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  83        .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  84        .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  85        .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  86        .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  87        .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  88        .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  89        .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  90        .temperature            = INV_MPU6050_REG_TEMPERATURE,
  91        .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  92        .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  93        .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  94        .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  95        .accl_offset            = INV_MPU6050_REG_ACCEL_OFFSET,
  96        .gyro_offset            = INV_MPU6050_REG_GYRO_OFFSET,
  97        .i2c_if                 = 0,
  98};
  99
 100static const struct inv_mpu6050_chip_config chip_config_6050 = {
 101        .fsr = INV_MPU6050_FSR_2000DPS,
 102        .lpf = INV_MPU6050_FILTER_20HZ,
 103        .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE),
 104        .gyro_fifo_enable = false,
 105        .accl_fifo_enable = false,
 106        .accl_fs = INV_MPU6050_FS_02G,
 107        .user_ctrl = 0,
 108};
 109
 110/* Indexed by enum inv_devices */
 111static const struct inv_mpu6050_hw hw_info[] = {
 112        {
 113                .whoami = INV_MPU6050_WHOAMI_VALUE,
 114                .name = "MPU6050",
 115                .reg = &reg_set_6050,
 116                .config = &chip_config_6050,
 117                .fifo_size = 1024,
 118        },
 119        {
 120                .whoami = INV_MPU6500_WHOAMI_VALUE,
 121                .name = "MPU6500",
 122                .reg = &reg_set_6500,
 123                .config = &chip_config_6050,
 124                .fifo_size = 512,
 125        },
 126        {
 127                .whoami = INV_MPU6515_WHOAMI_VALUE,
 128                .name = "MPU6515",
 129                .reg = &reg_set_6500,
 130                .config = &chip_config_6050,
 131                .fifo_size = 512,
 132        },
 133        {
 134                .whoami = INV_MPU6000_WHOAMI_VALUE,
 135                .name = "MPU6000",
 136                .reg = &reg_set_6050,
 137                .config = &chip_config_6050,
 138                .fifo_size = 1024,
 139        },
 140        {
 141                .whoami = INV_MPU9150_WHOAMI_VALUE,
 142                .name = "MPU9150",
 143                .reg = &reg_set_6050,
 144                .config = &chip_config_6050,
 145                .fifo_size = 1024,
 146        },
 147        {
 148                .whoami = INV_MPU9250_WHOAMI_VALUE,
 149                .name = "MPU9250",
 150                .reg = &reg_set_6500,
 151                .config = &chip_config_6050,
 152                .fifo_size = 512,
 153        },
 154        {
 155                .whoami = INV_MPU9255_WHOAMI_VALUE,
 156                .name = "MPU9255",
 157                .reg = &reg_set_6500,
 158                .config = &chip_config_6050,
 159                .fifo_size = 512,
 160        },
 161        {
 162                .whoami = INV_ICM20608_WHOAMI_VALUE,
 163                .name = "ICM20608",
 164                .reg = &reg_set_6500,
 165                .config = &chip_config_6050,
 166                .fifo_size = 512,
 167        },
 168        {
 169                .whoami = INV_ICM20602_WHOAMI_VALUE,
 170                .name = "ICM20602",
 171                .reg = &reg_set_icm20602,
 172                .config = &chip_config_6050,
 173                .fifo_size = 1008,
 174        },
 175};
 176
 177int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
 178{
 179        unsigned int d, mgmt_1;
 180        int result;
 181        /*
 182         * switch clock needs to be careful. Only when gyro is on, can
 183         * clock source be switched to gyro. Otherwise, it must be set to
 184         * internal clock
 185         */
 186        if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 187                result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
 188                if (result)
 189                        return result;
 190
 191                mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
 192        }
 193
 194        if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
 195                /*
 196                 * turning off gyro requires switch to internal clock first.
 197                 * Then turn off gyro engine
 198                 */
 199                mgmt_1 |= INV_CLK_INTERNAL;
 200                result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
 201                if (result)
 202                        return result;
 203        }
 204
 205        result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
 206        if (result)
 207                return result;
 208        if (en)
 209                d &= ~mask;
 210        else
 211                d |= mask;
 212        result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
 213        if (result)
 214                return result;
 215
 216        if (en) {
 217                /* Wait for output to stabilize */
 218                msleep(INV_MPU6050_TEMP_UP_TIME);
 219                if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
 220                        /* switch internal clock to PLL */
 221                        mgmt_1 |= INV_CLK_PLL;
 222                        result = regmap_write(st->map,
 223                                              st->reg->pwr_mgmt_1, mgmt_1);
 224                        if (result)
 225                                return result;
 226                }
 227        }
 228
 229        return 0;
 230}
 231
 232int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
 233{
 234        int result;
 235
 236        if (power_on) {
 237                if (!st->powerup_count) {
 238                        result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
 239                        if (result)
 240                                return result;
 241                        usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
 242                                     INV_MPU6050_REG_UP_TIME_MAX);
 243                }
 244                st->powerup_count++;
 245        } else {
 246                if (st->powerup_count == 1) {
 247                        result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 248                                              INV_MPU6050_BIT_SLEEP);
 249                        if (result)
 250                                return result;
 251                }
 252                st->powerup_count--;
 253        }
 254
 255        dev_dbg(regmap_get_device(st->map), "set power %d, count=%u\n",
 256                power_on, st->powerup_count);
 257
 258        return 0;
 259}
 260EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
 261
 262/**
 263 *  inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
 264 *
 265 *  MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
 266 *  MPU6500 and above have a dedicated register for accelerometer
 267 */
 268static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
 269                                    enum inv_mpu6050_filter_e val)
 270{
 271        int result;
 272
 273        result = regmap_write(st->map, st->reg->lpf, val);
 274        if (result)
 275                return result;
 276
 277        switch (st->chip_type) {
 278        case INV_MPU6050:
 279        case INV_MPU6000:
 280        case INV_MPU9150:
 281                /* old chips, nothing to do */
 282                result = 0;
 283                break;
 284        default:
 285                /* set accel lpf */
 286                result = regmap_write(st->map, st->reg->accel_lpf, val);
 287                break;
 288        }
 289
 290        return result;
 291}
 292
 293/**
 294 *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
 295 *
 296 *  Initial configuration:
 297 *  FSR: ± 2000DPS
 298 *  DLPF: 20Hz
 299 *  FIFO rate: 50Hz
 300 *  Clock source: Gyro PLL
 301 */
 302static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
 303{
 304        int result;
 305        u8 d;
 306        struct inv_mpu6050_state *st = iio_priv(indio_dev);
 307
 308        result = inv_mpu6050_set_power_itg(st, true);
 309        if (result)
 310                return result;
 311        d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 312        result = regmap_write(st->map, st->reg->gyro_config, d);
 313        if (result)
 314                goto error_power_off;
 315
 316        result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
 317        if (result)
 318                goto error_power_off;
 319
 320        d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE);
 321        result = regmap_write(st->map, st->reg->sample_rate_div, d);
 322        if (result)
 323                goto error_power_off;
 324
 325        d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 326        result = regmap_write(st->map, st->reg->accl_config, d);
 327        if (result)
 328                goto error_power_off;
 329
 330        result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
 331        if (result)
 332                return result;
 333
 334        memcpy(&st->chip_config, hw_info[st->chip_type].config,
 335               sizeof(struct inv_mpu6050_chip_config));
 336
 337        /*
 338         * Internal chip period is 1ms (1kHz).
 339         * Let's use at the beginning the theorical value before measuring
 340         * with interrupt timestamps.
 341         */
 342        st->chip_period = NSEC_PER_MSEC;
 343
 344        return inv_mpu6050_set_power_itg(st, false);
 345
 346error_power_off:
 347        inv_mpu6050_set_power_itg(st, false);
 348        return result;
 349}
 350
 351static int inv_mpu6050_sensor_set(struct inv_mpu6050_state  *st, int reg,
 352                                int axis, int val)
 353{
 354        int ind, result;
 355        __be16 d = cpu_to_be16(val);
 356
 357        ind = (axis - IIO_MOD_X) * 2;
 358        result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
 359        if (result)
 360                return -EINVAL;
 361
 362        return 0;
 363}
 364
 365static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
 366                                   int axis, int *val)
 367{
 368        int ind, result;
 369        __be16 d;
 370
 371        ind = (axis - IIO_MOD_X) * 2;
 372        result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
 373        if (result)
 374                return -EINVAL;
 375        *val = (short)be16_to_cpup(&d);
 376
 377        return IIO_VAL_INT;
 378}
 379
 380static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
 381                                         struct iio_chan_spec const *chan,
 382                                         int *val)
 383{
 384        struct inv_mpu6050_state *st = iio_priv(indio_dev);
 385        int result;
 386        int ret;
 387
 388        result = inv_mpu6050_set_power_itg(st, true);
 389        if (result)
 390                return result;
 391
 392        switch (chan->type) {
 393        case IIO_ANGL_VEL:
 394                result = inv_mpu6050_switch_engine(st, true,
 395                                INV_MPU6050_BIT_PWR_GYRO_STBY);
 396                if (result)
 397                        goto error_power_off;
 398                ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
 399                                              chan->channel2, val);
 400                result = inv_mpu6050_switch_engine(st, false,
 401                                INV_MPU6050_BIT_PWR_GYRO_STBY);
 402                if (result)
 403                        goto error_power_off;
 404                break;
 405        case IIO_ACCEL:
 406                result = inv_mpu6050_switch_engine(st, true,
 407                                INV_MPU6050_BIT_PWR_ACCL_STBY);
 408                if (result)
 409                        goto error_power_off;
 410                ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
 411                                              chan->channel2, val);
 412                result = inv_mpu6050_switch_engine(st, false,
 413                                INV_MPU6050_BIT_PWR_ACCL_STBY);
 414                if (result)
 415                        goto error_power_off;
 416                break;
 417        case IIO_TEMP:
 418                /* wait for stablization */
 419                msleep(INV_MPU6050_SENSOR_UP_TIME);
 420                ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
 421                                              IIO_MOD_X, val);
 422                break;
 423        default:
 424                ret = -EINVAL;
 425                break;
 426        }
 427
 428        result = inv_mpu6050_set_power_itg(st, false);
 429        if (result)
 430                goto error_power_off;
 431
 432        return ret;
 433
 434error_power_off:
 435        inv_mpu6050_set_power_itg(st, false);
 436        return result;
 437}
 438
 439static int
 440inv_mpu6050_read_raw(struct iio_dev *indio_dev,
 441                     struct iio_chan_spec const *chan,
 442                     int *val, int *val2, long mask)
 443{
 444        struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 445        int ret = 0;
 446
 447        switch (mask) {
 448        case IIO_CHAN_INFO_RAW:
 449                ret = iio_device_claim_direct_mode(indio_dev);
 450                if (ret)
 451                        return ret;
 452                mutex_lock(&st->lock);
 453                ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
 454                mutex_unlock(&st->lock);
 455                iio_device_release_direct_mode(indio_dev);
 456                return ret;
 457        case IIO_CHAN_INFO_SCALE:
 458                switch (chan->type) {
 459                case IIO_ANGL_VEL:
 460                        mutex_lock(&st->lock);
 461                        *val  = 0;
 462                        *val2 = gyro_scale_6050[st->chip_config.fsr];
 463                        mutex_unlock(&st->lock);
 464
 465                        return IIO_VAL_INT_PLUS_NANO;
 466                case IIO_ACCEL:
 467                        mutex_lock(&st->lock);
 468                        *val = 0;
 469                        *val2 = accel_scale[st->chip_config.accl_fs];
 470                        mutex_unlock(&st->lock);
 471
 472                        return IIO_VAL_INT_PLUS_MICRO;
 473                case IIO_TEMP:
 474                        *val = 0;
 475                        if (st->chip_type == INV_ICM20602)
 476                                *val2 = INV_ICM20602_TEMP_SCALE;
 477                        else
 478                                *val2 = INV_MPU6050_TEMP_SCALE;
 479
 480                        return IIO_VAL_INT_PLUS_MICRO;
 481                default:
 482                        return -EINVAL;
 483                }
 484        case IIO_CHAN_INFO_OFFSET:
 485                switch (chan->type) {
 486                case IIO_TEMP:
 487                        if (st->chip_type == INV_ICM20602)
 488                                *val = INV_ICM20602_TEMP_OFFSET;
 489                        else
 490                                *val = INV_MPU6050_TEMP_OFFSET;
 491
 492                        return IIO_VAL_INT;
 493                default:
 494                        return -EINVAL;
 495                }
 496        case IIO_CHAN_INFO_CALIBBIAS:
 497                switch (chan->type) {
 498                case IIO_ANGL_VEL:
 499                        mutex_lock(&st->lock);
 500                        ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
 501                                                chan->channel2, val);
 502                        mutex_unlock(&st->lock);
 503                        return IIO_VAL_INT;
 504                case IIO_ACCEL:
 505                        mutex_lock(&st->lock);
 506                        ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
 507                                                chan->channel2, val);
 508                        mutex_unlock(&st->lock);
 509                        return IIO_VAL_INT;
 510
 511                default:
 512                        return -EINVAL;
 513                }
 514        default:
 515                return -EINVAL;
 516        }
 517}
 518
 519static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
 520{
 521        int result, i;
 522        u8 d;
 523
 524        for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
 525                if (gyro_scale_6050[i] == val) {
 526                        d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 527                        result = regmap_write(st->map, st->reg->gyro_config, d);
 528                        if (result)
 529                                return result;
 530
 531                        st->chip_config.fsr = i;
 532                        return 0;
 533                }
 534        }
 535
 536        return -EINVAL;
 537}
 538
 539static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
 540                                 struct iio_chan_spec const *chan, long mask)
 541{
 542        switch (mask) {
 543        case IIO_CHAN_INFO_SCALE:
 544                switch (chan->type) {
 545                case IIO_ANGL_VEL:
 546                        return IIO_VAL_INT_PLUS_NANO;
 547                default:
 548                        return IIO_VAL_INT_PLUS_MICRO;
 549                }
 550        default:
 551                return IIO_VAL_INT_PLUS_MICRO;
 552        }
 553
 554        return -EINVAL;
 555}
 556
 557static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
 558{
 559        int result, i;
 560        u8 d;
 561
 562        for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
 563                if (accel_scale[i] == val) {
 564                        d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 565                        result = regmap_write(st->map, st->reg->accl_config, d);
 566                        if (result)
 567                                return result;
 568
 569                        st->chip_config.accl_fs = i;
 570                        return 0;
 571                }
 572        }
 573
 574        return -EINVAL;
 575}
 576
 577static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
 578                                 struct iio_chan_spec const *chan,
 579                                 int val, int val2, long mask)
 580{
 581        struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 582        int result;
 583
 584        /*
 585         * we should only update scale when the chip is disabled, i.e.
 586         * not running
 587         */
 588        result = iio_device_claim_direct_mode(indio_dev);
 589        if (result)
 590                return result;
 591
 592        mutex_lock(&st->lock);
 593        result = inv_mpu6050_set_power_itg(st, true);
 594        if (result)
 595                goto error_write_raw_unlock;
 596
 597        switch (mask) {
 598        case IIO_CHAN_INFO_SCALE:
 599                switch (chan->type) {
 600                case IIO_ANGL_VEL:
 601                        result = inv_mpu6050_write_gyro_scale(st, val2);
 602                        break;
 603                case IIO_ACCEL:
 604                        result = inv_mpu6050_write_accel_scale(st, val2);
 605                        break;
 606                default:
 607                        result = -EINVAL;
 608                        break;
 609                }
 610                break;
 611        case IIO_CHAN_INFO_CALIBBIAS:
 612                switch (chan->type) {
 613                case IIO_ANGL_VEL:
 614                        result = inv_mpu6050_sensor_set(st,
 615                                                        st->reg->gyro_offset,
 616                                                        chan->channel2, val);
 617                        break;
 618                case IIO_ACCEL:
 619                        result = inv_mpu6050_sensor_set(st,
 620                                                        st->reg->accl_offset,
 621                                                        chan->channel2, val);
 622                        break;
 623                default:
 624                        result = -EINVAL;
 625                        break;
 626                }
 627                break;
 628        default:
 629                result = -EINVAL;
 630                break;
 631        }
 632
 633        result |= inv_mpu6050_set_power_itg(st, false);
 634error_write_raw_unlock:
 635        mutex_unlock(&st->lock);
 636        iio_device_release_direct_mode(indio_dev);
 637
 638        return result;
 639}
 640
 641/**
 642 *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
 643 *
 644 *                  Based on the Nyquist principle, the sampling rate must
 645 *                  exceed twice of the bandwidth of the signal, or there
 646 *                  would be alising. This function basically search for the
 647 *                  correct low pass parameters based on the fifo rate, e.g,
 648 *                  sampling frequency.
 649 *
 650 *  lpf is set automatically when setting sampling rate to avoid any aliases.
 651 */
 652static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
 653{
 654        static const int hz[] = {188, 98, 42, 20, 10, 5};
 655        static const int d[] = {
 656                INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
 657                INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
 658                INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
 659        };
 660        int i, h, result;
 661        u8 data;
 662
 663        h = (rate >> 1);
 664        i = 0;
 665        while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
 666                i++;
 667        data = d[i];
 668        result = inv_mpu6050_set_lpf_regs(st, data);
 669        if (result)
 670                return result;
 671        st->chip_config.lpf = data;
 672
 673        return 0;
 674}
 675
 676/**
 677 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
 678 */
 679static ssize_t
 680inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
 681                            const char *buf, size_t count)
 682{
 683        int fifo_rate;
 684        u8 d;
 685        int result;
 686        struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 687        struct inv_mpu6050_state *st = iio_priv(indio_dev);
 688
 689        if (kstrtoint(buf, 10, &fifo_rate))
 690                return -EINVAL;
 691        if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
 692            fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
 693                return -EINVAL;
 694
 695        result = iio_device_claim_direct_mode(indio_dev);
 696        if (result)
 697                return result;
 698
 699        /* compute the chip sample rate divider */
 700        d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
 701        /* compute back the fifo rate to handle truncation cases */
 702        fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
 703
 704        mutex_lock(&st->lock);
 705        if (d == st->chip_config.divider) {
 706                result = 0;
 707                goto fifo_rate_fail_unlock;
 708        }
 709        result = inv_mpu6050_set_power_itg(st, true);
 710        if (result)
 711                goto fifo_rate_fail_unlock;
 712
 713        result = regmap_write(st->map, st->reg->sample_rate_div, d);
 714        if (result)
 715                goto fifo_rate_fail_power_off;
 716        st->chip_config.divider = d;
 717
 718        result = inv_mpu6050_set_lpf(st, fifo_rate);
 719        if (result)
 720                goto fifo_rate_fail_power_off;
 721
 722fifo_rate_fail_power_off:
 723        result |= inv_mpu6050_set_power_itg(st, false);
 724fifo_rate_fail_unlock:
 725        mutex_unlock(&st->lock);
 726        iio_device_release_direct_mode(indio_dev);
 727        if (result)
 728                return result;
 729
 730        return count;
 731}
 732
 733/**
 734 * inv_fifo_rate_show() - Get the current sampling rate.
 735 */
 736static ssize_t
 737inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
 738                   char *buf)
 739{
 740        struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 741        unsigned fifo_rate;
 742
 743        mutex_lock(&st->lock);
 744        fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
 745        mutex_unlock(&st->lock);
 746
 747        return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
 748}
 749
 750/**
 751 * inv_attr_show() - calling this function will show current
 752 *                    parameters.
 753 *
 754 * Deprecated in favor of IIO mounting matrix API.
 755 *
 756 * See inv_get_mount_matrix()
 757 */
 758static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
 759                             char *buf)
 760{
 761        struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 762        struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 763        s8 *m;
 764
 765        switch (this_attr->address) {
 766        /*
 767         * In MPU6050, the two matrix are the same because gyro and accel
 768         * are integrated in one chip
 769         */
 770        case ATTR_GYRO_MATRIX:
 771        case ATTR_ACCL_MATRIX:
 772                m = st->plat_data.orientation;
 773
 774                return scnprintf(buf, PAGE_SIZE,
 775                        "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
 776                        m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
 777        default:
 778                return -EINVAL;
 779        }
 780}
 781
 782/**
 783 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
 784 *                                  MPU6050 device.
 785 * @indio_dev: The IIO device
 786 * @trig: The new trigger
 787 *
 788 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
 789 * device, -EINVAL otherwise.
 790 */
 791static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
 792                                        struct iio_trigger *trig)
 793{
 794        struct inv_mpu6050_state *st = iio_priv(indio_dev);
 795
 796        if (st->trig != trig)
 797                return -EINVAL;
 798
 799        return 0;
 800}
 801
 802static const struct iio_mount_matrix *
 803inv_get_mount_matrix(const struct iio_dev *indio_dev,
 804                     const struct iio_chan_spec *chan)
 805{
 806        struct inv_mpu6050_state *data = iio_priv(indio_dev);
 807
 808        return &data->orientation;
 809}
 810
 811static const struct iio_chan_spec_ext_info inv_ext_info[] = {
 812        IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
 813        { }
 814};
 815
 816#define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
 817        {                                                             \
 818                .type = _type,                                        \
 819                .modified = 1,                                        \
 820                .channel2 = _channel2,                                \
 821                .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 822                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |        \
 823                                      BIT(IIO_CHAN_INFO_CALIBBIAS),   \
 824                .scan_index = _index,                                 \
 825                .scan_type = {                                        \
 826                                .sign = 's',                          \
 827                                .realbits = 16,                       \
 828                                .storagebits = 16,                    \
 829                                .shift = 0,                           \
 830                                .endianness = IIO_BE,                 \
 831                             },                                       \
 832                .ext_info = inv_ext_info,                             \
 833        }
 834
 835static const struct iio_chan_spec inv_mpu_channels[] = {
 836        IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
 837        /*
 838         * Note that temperature should only be via polled reading only,
 839         * not the final scan elements output.
 840         */
 841        {
 842                .type = IIO_TEMP,
 843                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
 844                                | BIT(IIO_CHAN_INFO_OFFSET)
 845                                | BIT(IIO_CHAN_INFO_SCALE),
 846                .scan_index = -1,
 847        },
 848        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 849        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 850        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 851
 852        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 853        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 854        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 855};
 856
 857static const unsigned long inv_mpu_scan_masks[] = {
 858        /* 3-axis accel */
 859        BIT(INV_MPU6050_SCAN_ACCL_X)
 860                | BIT(INV_MPU6050_SCAN_ACCL_Y)
 861                | BIT(INV_MPU6050_SCAN_ACCL_Z),
 862        /* 3-axis gyro */
 863        BIT(INV_MPU6050_SCAN_GYRO_X)
 864                | BIT(INV_MPU6050_SCAN_GYRO_Y)
 865                | BIT(INV_MPU6050_SCAN_GYRO_Z),
 866        /* 6-axis accel + gyro */
 867        BIT(INV_MPU6050_SCAN_ACCL_X)
 868                | BIT(INV_MPU6050_SCAN_ACCL_Y)
 869                | BIT(INV_MPU6050_SCAN_ACCL_Z)
 870                | BIT(INV_MPU6050_SCAN_GYRO_X)
 871                | BIT(INV_MPU6050_SCAN_GYRO_Y)
 872                | BIT(INV_MPU6050_SCAN_GYRO_Z),
 873        0,
 874};
 875
 876static const struct iio_chan_spec inv_icm20602_channels[] = {
 877        IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
 878        {
 879                .type = IIO_TEMP,
 880                .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
 881                                | BIT(IIO_CHAN_INFO_OFFSET)
 882                                | BIT(IIO_CHAN_INFO_SCALE),
 883                .scan_index = INV_ICM20602_SCAN_TEMP,
 884                .scan_type = {
 885                                .sign = 's',
 886                                .realbits = 16,
 887                                .storagebits = 16,
 888                                .shift = 0,
 889                                .endianness = IIO_BE,
 890                             },
 891        },
 892
 893        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_ICM20602_SCAN_GYRO_X),
 894        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_ICM20602_SCAN_GYRO_Y),
 895        INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_ICM20602_SCAN_GYRO_Z),
 896
 897        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_ICM20602_SCAN_ACCL_Y),
 898        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_ICM20602_SCAN_ACCL_X),
 899        INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
 900};
 901
 902static const unsigned long inv_icm20602_scan_masks[] = {
 903        /* 3-axis accel + temp (mandatory) */
 904        BIT(INV_ICM20602_SCAN_ACCL_X)
 905                | BIT(INV_ICM20602_SCAN_ACCL_Y)
 906                | BIT(INV_ICM20602_SCAN_ACCL_Z)
 907                | BIT(INV_ICM20602_SCAN_TEMP),
 908        /* 3-axis gyro + temp (mandatory) */
 909        BIT(INV_ICM20602_SCAN_GYRO_X)
 910                | BIT(INV_ICM20602_SCAN_GYRO_Y)
 911                | BIT(INV_ICM20602_SCAN_GYRO_Z)
 912                | BIT(INV_ICM20602_SCAN_TEMP),
 913        /* 6-axis accel + gyro + temp (mandatory) */
 914        BIT(INV_ICM20602_SCAN_ACCL_X)
 915                | BIT(INV_ICM20602_SCAN_ACCL_Y)
 916                | BIT(INV_ICM20602_SCAN_ACCL_Z)
 917                | BIT(INV_ICM20602_SCAN_GYRO_X)
 918                | BIT(INV_ICM20602_SCAN_GYRO_Y)
 919                | BIT(INV_ICM20602_SCAN_GYRO_Z)
 920                | BIT(INV_ICM20602_SCAN_TEMP),
 921        0,
 922};
 923
 924/*
 925 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
 926 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
 927 * low-pass filter. Specifically, each of these sampling rates are about twice
 928 * the bandwidth of a corresponding low-pass filter, which should eliminate
 929 * aliasing following the Nyquist principle. By picking a frequency different
 930 * from these, the user risks aliasing effects.
 931 */
 932static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
 933static IIO_CONST_ATTR(in_anglvel_scale_available,
 934                                          "0.000133090 0.000266181 0.000532362 0.001064724");
 935static IIO_CONST_ATTR(in_accel_scale_available,
 936                                          "0.000598 0.001196 0.002392 0.004785");
 937static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
 938        inv_mpu6050_fifo_rate_store);
 939
 940/* Deprecated: kept for userspace backward compatibility. */
 941static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
 942        ATTR_GYRO_MATRIX);
 943static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
 944        ATTR_ACCL_MATRIX);
 945
 946static struct attribute *inv_attributes[] = {
 947        &iio_dev_attr_in_gyro_matrix.dev_attr.attr,  /* deprecated */
 948        &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
 949        &iio_dev_attr_sampling_frequency.dev_attr.attr,
 950        &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 951        &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 952        &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 953        NULL,
 954};
 955
 956static const struct attribute_group inv_attribute_group = {
 957        .attrs = inv_attributes
 958};
 959
 960static const struct iio_info mpu_info = {
 961        .read_raw = &inv_mpu6050_read_raw,
 962        .write_raw = &inv_mpu6050_write_raw,
 963        .write_raw_get_fmt = &inv_write_raw_get_fmt,
 964        .attrs = &inv_attribute_group,
 965        .validate_trigger = inv_mpu6050_validate_trigger,
 966};
 967
 968/**
 969 *  inv_check_and_setup_chip() - check and setup chip.
 970 */
 971static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
 972{
 973        int result;
 974        unsigned int regval;
 975        int i;
 976
 977        st->hw  = &hw_info[st->chip_type];
 978        st->reg = hw_info[st->chip_type].reg;
 979
 980        /* check chip self-identification */
 981        result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, &regval);
 982        if (result)
 983                return result;
 984        if (regval != st->hw->whoami) {
 985                /* check whoami against all possible values */
 986                for (i = 0; i < INV_NUM_PARTS; ++i) {
 987                        if (regval == hw_info[i].whoami) {
 988                                dev_warn(regmap_get_device(st->map),
 989                                        "whoami mismatch got %#02x (%s)"
 990                                        "expected %#02hhx (%s)\n",
 991                                        regval, hw_info[i].name,
 992                                        st->hw->whoami, st->hw->name);
 993                                break;
 994                        }
 995                }
 996                if (i >= INV_NUM_PARTS) {
 997                        dev_err(regmap_get_device(st->map),
 998                                "invalid whoami %#02x expected %#02hhx (%s)\n",
 999                                regval, st->hw->whoami, st->hw->name);
1000                        return -ENODEV;
1001                }
1002        }
1003
1004        /* reset to make sure previous state are not there */
1005        result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1006                              INV_MPU6050_BIT_H_RESET);
1007        if (result)
1008                return result;
1009        msleep(INV_MPU6050_POWER_UP_TIME);
1010
1011        /*
1012         * Turn power on. After reset, the sleep bit could be on
1013         * or off depending on the OTP settings. Turning power on
1014         * make it in a definite state as well as making the hardware
1015         * state align with the software state
1016         */
1017        result = inv_mpu6050_set_power_itg(st, true);
1018        if (result)
1019                return result;
1020
1021        result = inv_mpu6050_switch_engine(st, false,
1022                                           INV_MPU6050_BIT_PWR_ACCL_STBY);
1023        if (result)
1024                goto error_power_off;
1025        result = inv_mpu6050_switch_engine(st, false,
1026                                           INV_MPU6050_BIT_PWR_GYRO_STBY);
1027        if (result)
1028                goto error_power_off;
1029
1030        return inv_mpu6050_set_power_itg(st, false);
1031
1032error_power_off:
1033        inv_mpu6050_set_power_itg(st, false);
1034        return result;
1035}
1036
1037static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st)
1038{
1039        int result;
1040
1041        result = regulator_enable(st->vddio_supply);
1042        if (result) {
1043                dev_err(regmap_get_device(st->map),
1044                        "Failed to enable regulator: %d\n", result);
1045        } else {
1046                /* Give the device a little bit of time to start up. */
1047                usleep_range(35000, 70000);
1048        }
1049
1050        return result;
1051}
1052
1053static int inv_mpu_core_disable_regulator(struct inv_mpu6050_state *st)
1054{
1055        int result;
1056
1057        result = regulator_disable(st->vddio_supply);
1058        if (result)
1059                dev_err(regmap_get_device(st->map),
1060                        "Failed to disable regulator: %d\n", result);
1061
1062        return result;
1063}
1064
1065static void inv_mpu_core_disable_regulator_action(void *_data)
1066{
1067        inv_mpu_core_disable_regulator(_data);
1068}
1069
1070int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1071                int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1072{
1073        struct inv_mpu6050_state *st;
1074        struct iio_dev *indio_dev;
1075        struct inv_mpu6050_platform_data *pdata;
1076        struct device *dev = regmap_get_device(regmap);
1077        int result;
1078        struct irq_data *desc;
1079        int irq_type;
1080
1081        indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1082        if (!indio_dev)
1083                return -ENOMEM;
1084
1085        BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1086        if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1087                dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1088                                chip_type, name);
1089                return -ENODEV;
1090        }
1091        st = iio_priv(indio_dev);
1092        mutex_init(&st->lock);
1093        st->chip_type = chip_type;
1094        st->powerup_count = 0;
1095        st->irq = irq;
1096        st->map = regmap;
1097
1098        pdata = dev_get_platdata(dev);
1099        if (!pdata) {
1100                result = iio_read_mount_matrix(dev, "mount-matrix",
1101                                               &st->orientation);
1102                if (result) {
1103                        dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1104                                result);
1105                        return result;
1106                }
1107        } else {
1108                st->plat_data = *pdata;
1109        }
1110
1111        desc = irq_get_irq_data(irq);
1112        if (!desc) {
1113                dev_err(dev, "Could not find IRQ %d\n", irq);
1114                return -EINVAL;
1115        }
1116
1117        irq_type = irqd_get_trigger_type(desc);
1118        if (!irq_type)
1119                irq_type = IRQF_TRIGGER_RISING;
1120        if (irq_type == IRQF_TRIGGER_RISING)
1121                st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1122        else if (irq_type == IRQF_TRIGGER_FALLING)
1123                st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1124        else if (irq_type == IRQF_TRIGGER_HIGH)
1125                st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1126                        INV_MPU6050_LATCH_INT_EN;
1127        else if (irq_type == IRQF_TRIGGER_LOW)
1128                st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1129                        INV_MPU6050_LATCH_INT_EN;
1130        else {
1131                dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1132                        irq_type);
1133                return -EINVAL;
1134        }
1135
1136        st->vddio_supply = devm_regulator_get(dev, "vddio");
1137        if (IS_ERR(st->vddio_supply)) {
1138                if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
1139                        dev_err(dev, "Failed to get vddio regulator %d\n",
1140                                (int)PTR_ERR(st->vddio_supply));
1141
1142                return PTR_ERR(st->vddio_supply);
1143        }
1144
1145        result = inv_mpu_core_enable_regulator(st);
1146        if (result)
1147                return result;
1148
1149        result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1150                                 st);
1151        if (result) {
1152                dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1153                        result);
1154                return result;
1155        }
1156
1157        /* power is turned on inside check chip type*/
1158        result = inv_check_and_setup_chip(st);
1159        if (result)
1160                return result;
1161
1162        result = inv_mpu6050_init_config(indio_dev);
1163        if (result) {
1164                dev_err(dev, "Could not initialize device.\n");
1165                return result;
1166        }
1167
1168        if (inv_mpu_bus_setup)
1169                inv_mpu_bus_setup(indio_dev);
1170
1171        dev_set_drvdata(dev, indio_dev);
1172        indio_dev->dev.parent = dev;
1173        /* name will be NULL when enumerated via ACPI */
1174        if (name)
1175                indio_dev->name = name;
1176        else
1177                indio_dev->name = dev_name(dev);
1178
1179        if (chip_type == INV_ICM20602) {
1180                indio_dev->channels = inv_icm20602_channels;
1181                indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
1182                indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1183        } else {
1184                indio_dev->channels = inv_mpu_channels;
1185                indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1186                indio_dev->available_scan_masks = inv_mpu_scan_masks;
1187        }
1188
1189        indio_dev->info = &mpu_info;
1190        indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1191
1192        result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1193                                                 iio_pollfunc_store_time,
1194                                                 inv_mpu6050_read_fifo,
1195                                                 NULL);
1196        if (result) {
1197                dev_err(dev, "configure buffer fail %d\n", result);
1198                return result;
1199        }
1200        result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1201        if (result) {
1202                dev_err(dev, "trigger probe fail %d\n", result);
1203                return result;
1204        }
1205
1206        result = devm_iio_device_register(dev, indio_dev);
1207        if (result) {
1208                dev_err(dev, "IIO register fail %d\n", result);
1209                return result;
1210        }
1211
1212        return 0;
1213}
1214EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1215
1216#ifdef CONFIG_PM_SLEEP
1217
1218static int inv_mpu_resume(struct device *dev)
1219{
1220        struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1221        int result;
1222
1223        mutex_lock(&st->lock);
1224        result = inv_mpu_core_enable_regulator(st);
1225        if (result)
1226                goto out_unlock;
1227
1228        result = inv_mpu6050_set_power_itg(st, true);
1229out_unlock:
1230        mutex_unlock(&st->lock);
1231
1232        return result;
1233}
1234
1235static int inv_mpu_suspend(struct device *dev)
1236{
1237        struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1238        int result;
1239
1240        mutex_lock(&st->lock);
1241        result = inv_mpu6050_set_power_itg(st, false);
1242        inv_mpu_core_disable_regulator(st);
1243        mutex_unlock(&st->lock);
1244
1245        return result;
1246}
1247#endif /* CONFIG_PM_SLEEP */
1248
1249SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1250EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1251
1252MODULE_AUTHOR("Invensense Corporation");
1253MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1254MODULE_LICENSE("GPL");
1255