LXR linux/drivers/infiniband/hw/i40iw/i40iw

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   2*
   3* Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4*
   5* This software is available to you under a choice of one of two
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   7* General Public License (GPL) Version 2, available from the file
   8* COPYING in the main directory of this source tree, or the
   9* OpenFabrics.org BSD license below:
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  11*   Redistribution and use in source and binary forms, with or
  12*   without modification, are permitted provided that the following
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  15*    - Redistributions of source code must retain the above
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  33*******************************************************************************/
  34
  35#ifndef I40IW_VERBS_H
  36#define I40IW_VERBS_H
  37
  38struct i40iw_ucontext {
  39        struct ib_ucontext ibucontext;
  40        struct i40iw_device *iwdev;
  41        struct list_head cq_reg_mem_list;
  42        spinlock_t cq_reg_mem_list_lock; /* memory list for cq's */
  43        struct list_head qp_reg_mem_list;
  44        spinlock_t qp_reg_mem_list_lock; /* memory list for qp's */
  45        int abi_ver;
  46};
  47
  48struct i40iw_pd {
  49        struct ib_pd ibpd;
  50        struct i40iw_sc_pd sc_pd;
  51        atomic_t usecount;
  52};
  53
  54struct i40iw_hmc_pble {
  55        union {
  56                u32 idx;
  57                dma_addr_t addr;
  58        };
  59};
  60
  61struct i40iw_cq_mr {
  62        struct i40iw_hmc_pble cq_pbl;
  63        dma_addr_t shadow;
  64};
  65
  66struct i40iw_qp_mr {
  67        struct i40iw_hmc_pble sq_pbl;
  68        struct i40iw_hmc_pble rq_pbl;
  69        dma_addr_t shadow;
  70        struct page *sq_page;
  71};
  72
  73struct i40iw_pbl {
  74        struct list_head list;
  75        union {
  76                struct i40iw_qp_mr qp_mr;
  77                struct i40iw_cq_mr cq_mr;
  78        };
  79
  80        bool pbl_allocated;
  81        bool on_list;
  82        u64 user_base;
  83        struct i40iw_pble_alloc pble_alloc;
  84        struct i40iw_mr *iwmr;
  85};
  86
  87#define MAX_SAVE_PAGE_ADDRS     4
  88struct i40iw_mr {
  89        union {
  90                struct ib_mr ibmr;
  91                struct ib_mw ibmw;
  92                struct ib_fmr ibfmr;
  93        };
  94        struct ib_umem *region;
  95        u16 type;
  96        u32 page_cnt;
  97        u64 page_size;
  98        u32 npages;
  99        u32 stag;
 100        u64 length;
 101        u64 pgaddrmem[MAX_SAVE_PAGE_ADDRS];
 102        struct i40iw_pbl iwpbl;
 103};
 104
 105struct i40iw_cq {
 106        struct ib_cq ibcq;
 107        struct i40iw_sc_cq sc_cq;
 108        u16 cq_head;
 109        u16 cq_size;
 110        u16 cq_number;
 111        bool user_mode;
 112        u32 polled_completions;
 113        u32 cq_mem_size;
 114        struct i40iw_dma_mem kmem;
 115        spinlock_t lock; /* for poll cq */
 116        struct i40iw_pbl *iwpbl;
 117};
 118
 119struct disconn_work {
 120        struct work_struct work;
 121        struct i40iw_qp *iwqp;
 122};
 123
 124struct iw_cm_id;
 125struct ietf_mpa_frame;
 126struct i40iw_ud_file;
 127
 128struct i40iw_qp_kmode {
 129        struct i40iw_dma_mem dma_mem;
 130        u64 *wrid_mem;
 131};
 132
 133struct i40iw_qp {
 134        struct ib_qp ibqp;
 135        struct i40iw_sc_qp sc_qp;
 136        struct i40iw_device *iwdev;
 137        struct i40iw_cq *iwscq;
 138        struct i40iw_cq *iwrcq;
 139        struct i40iw_pd *iwpd;
 140        struct i40iw_qp_host_ctx_info ctx_info;
 141        struct i40iwarp_offload_info iwarp_info;
 142        void *allocated_buffer;
 143        atomic_t refcount;
 144        struct iw_cm_id *cm_id;
 145        void *cm_node;
 146        struct ib_mr *lsmm_mr;
 147        struct work_struct work;
 148        enum ib_qp_state ibqp_state;
 149        u32 iwarp_state;
 150        u32 qp_mem_size;
 151        u32 last_aeq;
 152        atomic_t close_timer_started;
 153        spinlock_t lock; /* for post work requests */
 154        struct i40iw_qp_context *iwqp_context;
 155        void *pbl_vbase;
 156        dma_addr_t pbl_pbase;
 157        struct page *page;
 158        u8 active_conn:1;
 159        u8 user_mode:1;
 160        u8 hte_added:1;
 161        u8 flush_issued:1;
 162        u8 destroyed:1;
 163        u8 sig_all:1;
 164        u8 pau_mode:1;
 165        u8 rsvd:1;
 166        u16 term_sq_flush_code;
 167        u16 term_rq_flush_code;
 168        u8 hw_iwarp_state;
 169        u8 hw_tcp_state;
 170        struct i40iw_qp_kmode kqp;
 171        struct i40iw_dma_mem host_ctx;
 172        struct timer_list terminate_timer;
 173        struct i40iw_pbl iwpbl;
 174        struct i40iw_dma_mem q2_ctx_mem;
 175        struct i40iw_dma_mem ietf_mem;
 176        struct completion sq_drained;
 177        struct completion rq_drained;
 178};
 179#endif
 180