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11#include <linux/types.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/iommu.h>
15#include <linux/module.h>
16
17#include <asm/apic.h>
18#include <asm/cpu.h>
19#include <asm/hw_irq.h>
20#include <asm/io_apic.h>
21#include <asm/irq_remapping.h>
22#include <asm/hypervisor.h>
23
24#include "irq_remapping.h"
25
26#ifdef CONFIG_IRQ_REMAP
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32
33#define IOAPIC_REMAPPING_ENTRY 24
34
35static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
36static struct irq_domain *ioapic_ir_domain;
37
38static int hyperv_ir_set_affinity(struct irq_data *data,
39 const struct cpumask *mask, bool force)
40{
41 struct irq_data *parent = data->parent_data;
42 struct irq_cfg *cfg = irqd_cfg(data);
43 struct IO_APIC_route_entry *entry;
44 int ret;
45
46
47 if (!cpumask_subset(mask, &ioapic_max_cpumask))
48 return -EINVAL;
49
50 ret = parent->chip->irq_set_affinity(parent, mask, force);
51 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
52 return ret;
53
54 entry = data->chip_data;
55 entry->dest = cfg->dest_apicid;
56 entry->vector = cfg->vector;
57 send_cleanup_vector(cfg);
58
59 return 0;
60}
61
62static struct irq_chip hyperv_ir_chip = {
63 .name = "HYPERV-IR",
64 .irq_ack = apic_ack_irq,
65 .irq_set_affinity = hyperv_ir_set_affinity,
66};
67
68static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
69 unsigned int virq, unsigned int nr_irqs,
70 void *arg)
71{
72 struct irq_alloc_info *info = arg;
73 struct irq_data *irq_data;
74 struct irq_desc *desc;
75 int ret = 0;
76
77 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
78 return -EINVAL;
79
80 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
81 if (ret < 0)
82 return ret;
83
84 irq_data = irq_domain_get_irq_data(domain, virq);
85 if (!irq_data) {
86 irq_domain_free_irqs_common(domain, virq, nr_irqs);
87 return -EINVAL;
88 }
89
90 irq_data->chip = &hyperv_ir_chip;
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104 irq_data->chip_data = info->ioapic_entry;
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110 desc = irq_data_to_desc(irq_data);
111 cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask);
112
113 return 0;
114}
115
116static void hyperv_irq_remapping_free(struct irq_domain *domain,
117 unsigned int virq, unsigned int nr_irqs)
118{
119 irq_domain_free_irqs_common(domain, virq, nr_irqs);
120}
121
122static int hyperv_irq_remapping_activate(struct irq_domain *domain,
123 struct irq_data *irq_data, bool reserve)
124{
125 struct irq_cfg *cfg = irqd_cfg(irq_data);
126 struct IO_APIC_route_entry *entry = irq_data->chip_data;
127
128 entry->dest = cfg->dest_apicid;
129 entry->vector = cfg->vector;
130
131 return 0;
132}
133
134static struct irq_domain_ops hyperv_ir_domain_ops = {
135 .alloc = hyperv_irq_remapping_alloc,
136 .free = hyperv_irq_remapping_free,
137 .activate = hyperv_irq_remapping_activate,
138};
139
140static int __init hyperv_prepare_irq_remapping(void)
141{
142 struct fwnode_handle *fn;
143 int i;
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145 if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
146 !x2apic_supported())
147 return -ENODEV;
148
149 fn = irq_domain_alloc_named_id_fwnode("HYPERV-IR", 0);
150 if (!fn)
151 return -ENOMEM;
152
153 ioapic_ir_domain =
154 irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
155 0, IOAPIC_REMAPPING_ENTRY, fn,
156 &hyperv_ir_domain_ops, NULL);
157
158 irq_domain_free_fwnode(fn);
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170 for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
171 if (cpu_physical_id(i) < 256)
172 cpumask_set_cpu(i, &ioapic_max_cpumask);
173
174 return 0;
175}
176
177static int __init hyperv_enable_irq_remapping(void)
178{
179 return IRQ_REMAP_X2APIC_MODE;
180}
181
182static struct irq_domain *hyperv_get_ir_irq_domain(struct irq_alloc_info *info)
183{
184 if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC)
185 return ioapic_ir_domain;
186 else
187 return NULL;
188}
189
190struct irq_remap_ops hyperv_irq_remap_ops = {
191 .prepare = hyperv_prepare_irq_remapping,
192 .enable = hyperv_enable_irq_remapping,
193 .get_ir_irq_domain = hyperv_get_ir_irq_domain,
194};
195
196#endif
197