1
2
3
4
5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include "ice.h"
9#include "ice_lib.h"
10#include "ice_dcb_lib.h"
11
12#define DRV_VERSION_MAJOR 0
13#define DRV_VERSION_MINOR 8
14#define DRV_VERSION_BUILD 1
15
16#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
17 __stringify(DRV_VERSION_MINOR) "." \
18 __stringify(DRV_VERSION_BUILD) "-k"
19#define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver"
20const char ice_drv_ver[] = DRV_VERSION;
21static const char ice_driver_string[] = DRV_SUMMARY;
22static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation.";
23
24
25#define ICE_DDP_PKG_PATH "intel/ice/ddp/"
26#define ICE_DDP_PKG_FILE ICE_DDP_PKG_PATH "ice.pkg"
27
28MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
29MODULE_DESCRIPTION(DRV_SUMMARY);
30MODULE_LICENSE("GPL v2");
31MODULE_VERSION(DRV_VERSION);
32MODULE_FIRMWARE(ICE_DDP_PKG_FILE);
33
34static int debug = -1;
35module_param(debug, int, 0644);
36#ifndef CONFIG_DYNAMIC_DEBUG
37MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all), hw debug_mask (0x8XXXXXXX)");
38#else
39MODULE_PARM_DESC(debug, "netif level (0=none,...,16=all)");
40#endif
41
42static struct workqueue_struct *ice_wq;
43static const struct net_device_ops ice_netdev_safe_mode_ops;
44static const struct net_device_ops ice_netdev_ops;
45
46static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type);
47
48static void ice_vsi_release_all(struct ice_pf *pf);
49
50
51
52
53
54static u16 ice_get_tx_pending(struct ice_ring *ring)
55{
56 u16 head, tail;
57
58 head = ring->next_to_clean;
59 tail = ring->next_to_use;
60
61 if (head != tail)
62 return (head < tail) ?
63 tail - head : (tail + ring->count - head);
64 return 0;
65}
66
67
68
69
70
71static void ice_check_for_hang_subtask(struct ice_pf *pf)
72{
73 struct ice_vsi *vsi = NULL;
74 struct ice_hw *hw;
75 unsigned int i;
76 int packets;
77 u32 v;
78
79 ice_for_each_vsi(pf, v)
80 if (pf->vsi[v] && pf->vsi[v]->type == ICE_VSI_PF) {
81 vsi = pf->vsi[v];
82 break;
83 }
84
85 if (!vsi || test_bit(__ICE_DOWN, vsi->state))
86 return;
87
88 if (!(vsi->netdev && netif_carrier_ok(vsi->netdev)))
89 return;
90
91 hw = &vsi->back->hw;
92
93 for (i = 0; i < vsi->num_txq; i++) {
94 struct ice_ring *tx_ring = vsi->tx_rings[i];
95
96 if (tx_ring && tx_ring->desc) {
97
98
99
100
101
102
103
104 packets = tx_ring->stats.pkts & INT_MAX;
105 if (tx_ring->tx_stats.prev_pkt == packets) {
106
107 ice_trigger_sw_intr(hw, tx_ring->q_vector);
108 continue;
109 }
110
111
112
113
114 smp_rmb();
115 tx_ring->tx_stats.prev_pkt =
116 ice_get_tx_pending(tx_ring) ? packets : -1;
117 }
118 }
119}
120
121
122
123
124
125
126
127
128
129static int ice_init_mac_fltr(struct ice_pf *pf)
130{
131 enum ice_status status;
132 u8 broadcast[ETH_ALEN];
133 struct ice_vsi *vsi;
134
135 vsi = ice_get_main_vsi(pf);
136 if (!vsi)
137 return -EINVAL;
138
139
140
141
142
143
144 status = ice_vsi_cfg_mac_fltr(vsi, vsi->port_info->mac.perm_addr, true);
145 if (status)
146 goto unregister;
147
148
149
150
151 eth_broadcast_addr(broadcast);
152 status = ice_vsi_cfg_mac_fltr(vsi, broadcast, true);
153 if (status)
154 goto unregister;
155
156 return 0;
157unregister:
158
159
160
161 if (status && vsi->netdev->reg_state == NETREG_REGISTERED) {
162 dev_err(&pf->pdev->dev,
163 "Could not add MAC filters error %d. Unregistering device\n",
164 status);
165 unregister_netdev(vsi->netdev);
166 free_netdev(vsi->netdev);
167 vsi->netdev = NULL;
168 }
169
170 return -EIO;
171}
172
173
174
175
176
177
178
179
180
181
182
183static int ice_add_mac_to_sync_list(struct net_device *netdev, const u8 *addr)
184{
185 struct ice_netdev_priv *np = netdev_priv(netdev);
186 struct ice_vsi *vsi = np->vsi;
187
188 if (ice_add_mac_to_list(vsi, &vsi->tmp_sync_list, addr))
189 return -EINVAL;
190
191 return 0;
192}
193
194
195
196
197
198
199
200
201
202
203
204static int ice_add_mac_to_unsync_list(struct net_device *netdev, const u8 *addr)
205{
206 struct ice_netdev_priv *np = netdev_priv(netdev);
207 struct ice_vsi *vsi = np->vsi;
208
209 if (ice_add_mac_to_list(vsi, &vsi->tmp_unsync_list, addr))
210 return -EINVAL;
211
212 return 0;
213}
214
215
216
217
218
219
220
221static bool ice_vsi_fltr_changed(struct ice_vsi *vsi)
222{
223 return test_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags) ||
224 test_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags) ||
225 test_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
226}
227
228
229
230
231
232
233
234
235static int ice_cfg_promisc(struct ice_vsi *vsi, u8 promisc_m, bool set_promisc)
236{
237 struct ice_hw *hw = &vsi->back->hw;
238 enum ice_status status = 0;
239
240 if (vsi->type != ICE_VSI_PF)
241 return 0;
242
243 if (vsi->vlan_ena) {
244 status = ice_set_vlan_vsi_promisc(hw, vsi->idx, promisc_m,
245 set_promisc);
246 } else {
247 if (set_promisc)
248 status = ice_set_vsi_promisc(hw, vsi->idx, promisc_m,
249 0);
250 else
251 status = ice_clear_vsi_promisc(hw, vsi->idx, promisc_m,
252 0);
253 }
254
255 if (status)
256 return -EIO;
257
258 return 0;
259}
260
261
262
263
264
265
266
267static int ice_vsi_sync_fltr(struct ice_vsi *vsi)
268{
269 struct device *dev = &vsi->back->pdev->dev;
270 struct net_device *netdev = vsi->netdev;
271 bool promisc_forced_on = false;
272 struct ice_pf *pf = vsi->back;
273 struct ice_hw *hw = &pf->hw;
274 enum ice_status status = 0;
275 u32 changed_flags = 0;
276 u8 promisc_m;
277 int err = 0;
278
279 if (!vsi->netdev)
280 return -EINVAL;
281
282 while (test_and_set_bit(__ICE_CFG_BUSY, vsi->state))
283 usleep_range(1000, 2000);
284
285 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
286 vsi->current_netdev_flags = vsi->netdev->flags;
287
288 INIT_LIST_HEAD(&vsi->tmp_sync_list);
289 INIT_LIST_HEAD(&vsi->tmp_unsync_list);
290
291 if (ice_vsi_fltr_changed(vsi)) {
292 clear_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
293 clear_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
294 clear_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
295
296
297 netif_addr_lock_bh(netdev);
298 __dev_uc_sync(netdev, ice_add_mac_to_sync_list,
299 ice_add_mac_to_unsync_list);
300 __dev_mc_sync(netdev, ice_add_mac_to_sync_list,
301 ice_add_mac_to_unsync_list);
302
303 netif_addr_unlock_bh(netdev);
304 }
305
306
307 status = ice_remove_mac(hw, &vsi->tmp_unsync_list);
308 ice_free_fltr_list(dev, &vsi->tmp_unsync_list);
309 if (status) {
310 netdev_err(netdev, "Failed to delete MAC filters\n");
311
312 if (status == ICE_ERR_NO_MEMORY) {
313 err = -ENOMEM;
314 goto out;
315 }
316 }
317
318
319 status = ice_add_mac(hw, &vsi->tmp_sync_list);
320 ice_free_fltr_list(dev, &vsi->tmp_sync_list);
321
322
323
324
325 if (status && status != ICE_ERR_ALREADY_EXISTS) {
326 netdev_err(netdev, "Failed to add MAC filters\n");
327
328
329
330
331 if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOSPC &&
332 !test_and_set_bit(__ICE_FLTR_OVERFLOW_PROMISC,
333 vsi->state)) {
334 promisc_forced_on = true;
335 netdev_warn(netdev,
336 "Reached MAC filter limit, forcing promisc mode on VSI %d\n",
337 vsi->vsi_num);
338 } else {
339 err = -EIO;
340 goto out;
341 }
342 }
343
344 if (changed_flags & IFF_ALLMULTI) {
345 if (vsi->current_netdev_flags & IFF_ALLMULTI) {
346 if (vsi->vlan_ena)
347 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
348 else
349 promisc_m = ICE_MCAST_PROMISC_BITS;
350
351 err = ice_cfg_promisc(vsi, promisc_m, true);
352 if (err) {
353 netdev_err(netdev, "Error setting Multicast promiscuous mode on VSI %i\n",
354 vsi->vsi_num);
355 vsi->current_netdev_flags &= ~IFF_ALLMULTI;
356 goto out_promisc;
357 }
358 } else if (!(vsi->current_netdev_flags & IFF_ALLMULTI)) {
359 if (vsi->vlan_ena)
360 promisc_m = ICE_MCAST_VLAN_PROMISC_BITS;
361 else
362 promisc_m = ICE_MCAST_PROMISC_BITS;
363
364 err = ice_cfg_promisc(vsi, promisc_m, false);
365 if (err) {
366 netdev_err(netdev, "Error clearing Multicast promiscuous mode on VSI %i\n",
367 vsi->vsi_num);
368 vsi->current_netdev_flags |= IFF_ALLMULTI;
369 goto out_promisc;
370 }
371 }
372 }
373
374 if (((changed_flags & IFF_PROMISC) || promisc_forced_on) ||
375 test_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags)) {
376 clear_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags);
377 if (vsi->current_netdev_flags & IFF_PROMISC) {
378
379 status = ice_cfg_dflt_vsi(hw, vsi->idx, true,
380 ICE_FLTR_RX);
381 if (status) {
382 netdev_err(netdev, "Error setting default VSI %i Rx rule\n",
383 vsi->vsi_num);
384 vsi->current_netdev_flags &= ~IFF_PROMISC;
385 err = -EIO;
386 goto out_promisc;
387 }
388 } else {
389
390 status = ice_cfg_dflt_vsi(hw, vsi->idx, false,
391 ICE_FLTR_RX);
392 if (status) {
393 netdev_err(netdev, "Error clearing default VSI %i Rx rule\n",
394 vsi->vsi_num);
395 vsi->current_netdev_flags |= IFF_PROMISC;
396 err = -EIO;
397 goto out_promisc;
398 }
399 }
400 }
401 goto exit;
402
403out_promisc:
404 set_bit(ICE_VSI_FLAG_PROMISC_CHANGED, vsi->flags);
405 goto exit;
406out:
407
408 set_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
409 set_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
410exit:
411 clear_bit(__ICE_CFG_BUSY, vsi->state);
412 return err;
413}
414
415
416
417
418
419static void ice_sync_fltr_subtask(struct ice_pf *pf)
420{
421 int v;
422
423 if (!pf || !(test_bit(ICE_FLAG_FLTR_SYNC, pf->flags)))
424 return;
425
426 clear_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
427
428 ice_for_each_vsi(pf, v)
429 if (pf->vsi[v] && ice_vsi_fltr_changed(pf->vsi[v]) &&
430 ice_vsi_sync_fltr(pf->vsi[v])) {
431
432 set_bit(ICE_FLAG_FLTR_SYNC, pf->flags);
433 break;
434 }
435}
436
437
438
439
440
441
442static void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
443{
444 if (test_bit(__ICE_DOWN, vsi->state))
445 return;
446
447 set_bit(__ICE_NEEDS_RESTART, vsi->state);
448
449 if (vsi->type == ICE_VSI_PF && vsi->netdev) {
450 if (netif_running(vsi->netdev)) {
451 if (!locked)
452 rtnl_lock();
453
454 ice_stop(vsi->netdev);
455
456 if (!locked)
457 rtnl_unlock();
458 } else {
459 ice_vsi_close(vsi);
460 }
461 }
462}
463
464
465
466
467
468
469#ifdef CONFIG_DCB
470void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked)
471#else
472static void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked)
473#endif
474{
475 int v;
476
477 ice_for_each_vsi(pf, v)
478 if (pf->vsi[v])
479 ice_dis_vsi(pf->vsi[v], locked);
480}
481
482
483
484
485
486
487
488static void
489ice_prepare_for_reset(struct ice_pf *pf)
490{
491 struct ice_hw *hw = &pf->hw;
492 int i;
493
494
495 if (test_bit(__ICE_PREPARED_FOR_RESET, pf->state))
496 return;
497
498
499 if (ice_check_sq_alive(hw, &hw->mailboxq))
500 ice_vc_notify_reset(pf);
501
502
503 for (i = 0; i < pf->num_alloc_vfs; i++)
504 ice_set_vf_state_qs_dis(&pf->vf[i]);
505
506
507 ice_clear_hw_tbls(hw);
508
509 ice_pf_dis_all_vsi(pf, false);
510
511 if (hw->port_info)
512 ice_sched_clear_port(hw->port_info);
513
514 ice_shutdown_all_ctrlq(hw);
515
516 set_bit(__ICE_PREPARED_FOR_RESET, pf->state);
517}
518
519
520
521
522
523
524
525static void ice_do_reset(struct ice_pf *pf, enum ice_reset_req reset_type)
526{
527 struct device *dev = &pf->pdev->dev;
528 struct ice_hw *hw = &pf->hw;
529
530 dev_dbg(dev, "reset_type 0x%x requested\n", reset_type);
531 WARN_ON(in_interrupt());
532
533 ice_prepare_for_reset(pf);
534
535
536 if (ice_reset(hw, reset_type)) {
537 dev_err(dev, "reset %d failed\n", reset_type);
538 set_bit(__ICE_RESET_FAILED, pf->state);
539 clear_bit(__ICE_RESET_OICR_RECV, pf->state);
540 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
541 clear_bit(__ICE_PFR_REQ, pf->state);
542 clear_bit(__ICE_CORER_REQ, pf->state);
543 clear_bit(__ICE_GLOBR_REQ, pf->state);
544 return;
545 }
546
547
548
549
550
551 if (reset_type == ICE_RESET_PFR) {
552 pf->pfr_count++;
553 ice_rebuild(pf, reset_type);
554 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
555 clear_bit(__ICE_PFR_REQ, pf->state);
556 ice_reset_all_vfs(pf, true);
557 }
558}
559
560
561
562
563
564static void ice_reset_subtask(struct ice_pf *pf)
565{
566 enum ice_reset_req reset_type = ICE_RESET_INVAL;
567
568
569
570
571
572
573
574
575
576
577
578 if (test_bit(__ICE_RESET_OICR_RECV, pf->state)) {
579
580 if (test_and_clear_bit(__ICE_CORER_RECV, pf->state))
581 reset_type = ICE_RESET_CORER;
582 if (test_and_clear_bit(__ICE_GLOBR_RECV, pf->state))
583 reset_type = ICE_RESET_GLOBR;
584 if (test_and_clear_bit(__ICE_EMPR_RECV, pf->state))
585 reset_type = ICE_RESET_EMPR;
586
587 if (reset_type == ICE_RESET_INVAL)
588 return;
589 ice_prepare_for_reset(pf);
590
591
592 if (ice_check_reset(&pf->hw)) {
593 set_bit(__ICE_RESET_FAILED, pf->state);
594 } else {
595
596 pf->hw.reset_ongoing = false;
597 ice_rebuild(pf, reset_type);
598
599
600
601 clear_bit(__ICE_RESET_OICR_RECV, pf->state);
602 clear_bit(__ICE_PREPARED_FOR_RESET, pf->state);
603 clear_bit(__ICE_PFR_REQ, pf->state);
604 clear_bit(__ICE_CORER_REQ, pf->state);
605 clear_bit(__ICE_GLOBR_REQ, pf->state);
606 ice_reset_all_vfs(pf, true);
607 }
608
609 return;
610 }
611
612
613 if (test_bit(__ICE_PFR_REQ, pf->state))
614 reset_type = ICE_RESET_PFR;
615 if (test_bit(__ICE_CORER_REQ, pf->state))
616 reset_type = ICE_RESET_CORER;
617 if (test_bit(__ICE_GLOBR_REQ, pf->state))
618 reset_type = ICE_RESET_GLOBR;
619
620 if (reset_type == ICE_RESET_INVAL)
621 return;
622
623
624 if (!test_bit(__ICE_DOWN, pf->state) &&
625 !test_bit(__ICE_CFG_BUSY, pf->state)) {
626 ice_do_reset(pf, reset_type);
627 }
628}
629
630
631
632
633
634static void ice_print_topo_conflict(struct ice_vsi *vsi)
635{
636 switch (vsi->port_info->phy.link_info.topo_media_conflict) {
637 case ICE_AQ_LINK_TOPO_CONFLICT:
638 case ICE_AQ_LINK_MEDIA_CONFLICT:
639 netdev_info(vsi->netdev, "Possible mis-configuration of the Ethernet port detected, please use the Intel(R) Ethernet Port Configuration Tool application to address the issue.\n");
640 break;
641 default:
642 break;
643 }
644}
645
646
647
648
649
650
651void ice_print_link_msg(struct ice_vsi *vsi, bool isup)
652{
653 struct ice_aqc_get_phy_caps_data *caps;
654 enum ice_status status;
655 const char *fec_req;
656 const char *speed;
657 const char *fec;
658 const char *fc;
659 const char *an;
660
661 if (!vsi)
662 return;
663
664 if (vsi->current_isup == isup)
665 return;
666
667 vsi->current_isup = isup;
668
669 if (!isup) {
670 netdev_info(vsi->netdev, "NIC Link is Down\n");
671 return;
672 }
673
674 switch (vsi->port_info->phy.link_info.link_speed) {
675 case ICE_AQ_LINK_SPEED_100GB:
676 speed = "100 G";
677 break;
678 case ICE_AQ_LINK_SPEED_50GB:
679 speed = "50 G";
680 break;
681 case ICE_AQ_LINK_SPEED_40GB:
682 speed = "40 G";
683 break;
684 case ICE_AQ_LINK_SPEED_25GB:
685 speed = "25 G";
686 break;
687 case ICE_AQ_LINK_SPEED_20GB:
688 speed = "20 G";
689 break;
690 case ICE_AQ_LINK_SPEED_10GB:
691 speed = "10 G";
692 break;
693 case ICE_AQ_LINK_SPEED_5GB:
694 speed = "5 G";
695 break;
696 case ICE_AQ_LINK_SPEED_2500MB:
697 speed = "2.5 G";
698 break;
699 case ICE_AQ_LINK_SPEED_1000MB:
700 speed = "1 G";
701 break;
702 case ICE_AQ_LINK_SPEED_100MB:
703 speed = "100 M";
704 break;
705 default:
706 speed = "Unknown";
707 break;
708 }
709
710 switch (vsi->port_info->fc.current_mode) {
711 case ICE_FC_FULL:
712 fc = "Rx/Tx";
713 break;
714 case ICE_FC_TX_PAUSE:
715 fc = "Tx";
716 break;
717 case ICE_FC_RX_PAUSE:
718 fc = "Rx";
719 break;
720 case ICE_FC_NONE:
721 fc = "None";
722 break;
723 default:
724 fc = "Unknown";
725 break;
726 }
727
728
729 switch (vsi->port_info->phy.link_info.fec_info) {
730 case ICE_AQ_LINK_25G_RS_528_FEC_EN:
731
732 case ICE_AQ_LINK_25G_RS_544_FEC_EN:
733 fec = "RS-FEC";
734 break;
735 case ICE_AQ_LINK_25G_KR_FEC_EN:
736 fec = "FC-FEC/BASE-R";
737 break;
738 default:
739 fec = "NONE";
740 break;
741 }
742
743
744 if (vsi->port_info->phy.link_info.an_info & ICE_AQ_AN_COMPLETED)
745 an = "True";
746 else
747 an = "False";
748
749
750 caps = devm_kzalloc(&vsi->back->pdev->dev, sizeof(*caps), GFP_KERNEL);
751 if (!caps) {
752 fec_req = "Unknown";
753 goto done;
754 }
755
756 status = ice_aq_get_phy_caps(vsi->port_info, false,
757 ICE_AQC_REPORT_SW_CFG, caps, NULL);
758 if (status)
759 netdev_info(vsi->netdev, "Get phy capability failed.\n");
760
761 if (caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_528_REQ ||
762 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_544_REQ)
763 fec_req = "RS-FEC";
764 else if (caps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ ||
765 caps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_REQ)
766 fec_req = "FC-FEC/BASE-R";
767 else
768 fec_req = "NONE";
769
770 devm_kfree(&vsi->back->pdev->dev, caps);
771
772done:
773 netdev_info(vsi->netdev, "NIC Link is up %sbps, Requested FEC: %s, FEC: %s, Autoneg: %s, Flow Control: %s\n",
774 speed, fec_req, fec, an, fc);
775 ice_print_topo_conflict(vsi);
776}
777
778
779
780
781
782
783static void ice_vsi_link_event(struct ice_vsi *vsi, bool link_up)
784{
785 if (!vsi)
786 return;
787
788 if (test_bit(__ICE_DOWN, vsi->state) || !vsi->netdev)
789 return;
790
791 if (vsi->type == ICE_VSI_PF) {
792 if (link_up == netif_carrier_ok(vsi->netdev))
793 return;
794
795 if (link_up) {
796 netif_carrier_on(vsi->netdev);
797 netif_tx_wake_all_queues(vsi->netdev);
798 } else {
799 netif_carrier_off(vsi->netdev);
800 netif_tx_stop_all_queues(vsi->netdev);
801 }
802 }
803}
804
805
806
807
808
809
810
811
812
813
814static int
815ice_link_event(struct ice_pf *pf, struct ice_port_info *pi, bool link_up,
816 u16 link_speed)
817{
818 struct ice_phy_info *phy_info;
819 struct ice_vsi *vsi;
820 u16 old_link_speed;
821 bool old_link;
822 int result;
823
824 phy_info = &pi->phy;
825 phy_info->link_info_old = phy_info->link_info;
826
827 old_link = !!(phy_info->link_info_old.link_info & ICE_AQ_LINK_UP);
828 old_link_speed = phy_info->link_info_old.link_speed;
829
830
831
832
833 result = ice_update_link_info(pi);
834 if (result)
835 dev_dbg(&pf->pdev->dev,
836 "Failed to update link status and re-enable link events for port %d\n",
837 pi->lport);
838
839
840 if (link_up == old_link && link_speed == old_link_speed)
841 return result;
842
843 vsi = ice_get_main_vsi(pf);
844 if (!vsi || !vsi->port_info)
845 return -EINVAL;
846
847
848 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags) &&
849 !(pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE)) {
850 set_bit(ICE_FLAG_NO_MEDIA, pf->flags);
851
852 result = ice_aq_set_link_restart_an(pi, false, NULL);
853 if (result) {
854 dev_dbg(&pf->pdev->dev,
855 "Failed to set link down, VSI %d error %d\n",
856 vsi->vsi_num, result);
857 return result;
858 }
859 }
860
861 ice_vsi_link_event(vsi, link_up);
862 ice_print_link_msg(vsi, link_up);
863
864 if (pf->num_alloc_vfs)
865 ice_vc_notify_link_state(pf);
866
867 return result;
868}
869
870
871
872
873
874static void ice_watchdog_subtask(struct ice_pf *pf)
875{
876 int i;
877
878
879 if (test_bit(__ICE_DOWN, pf->state) ||
880 test_bit(__ICE_CFG_BUSY, pf->state))
881 return;
882
883
884 if (time_before(jiffies,
885 pf->serv_tmr_prev + pf->serv_tmr_period))
886 return;
887
888 pf->serv_tmr_prev = jiffies;
889
890
891
892
893 ice_update_pf_stats(pf);
894 ice_for_each_vsi(pf, i)
895 if (pf->vsi[i] && pf->vsi[i]->netdev)
896 ice_update_vsi_stats(pf->vsi[i]);
897}
898
899
900
901
902
903
904
905static int ice_init_link_events(struct ice_port_info *pi)
906{
907 u16 mask;
908
909 mask = ~((u16)(ICE_AQ_LINK_EVENT_UPDOWN | ICE_AQ_LINK_EVENT_MEDIA_NA |
910 ICE_AQ_LINK_EVENT_MODULE_QUAL_FAIL));
911
912 if (ice_aq_set_event_mask(pi->hw, pi->lport, mask, NULL)) {
913 dev_dbg(ice_hw_to_dev(pi->hw),
914 "Failed to set link event mask for port %d\n",
915 pi->lport);
916 return -EIO;
917 }
918
919 if (ice_aq_get_link_info(pi, true, NULL, NULL)) {
920 dev_dbg(ice_hw_to_dev(pi->hw),
921 "Failed to enable link events for port %d\n",
922 pi->lport);
923 return -EIO;
924 }
925
926 return 0;
927}
928
929
930
931
932
933
934static int
935ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event)
936{
937 struct ice_aqc_get_link_status_data *link_data;
938 struct ice_port_info *port_info;
939 int status;
940
941 link_data = (struct ice_aqc_get_link_status_data *)event->msg_buf;
942 port_info = pf->hw.port_info;
943 if (!port_info)
944 return -EINVAL;
945
946 status = ice_link_event(pf, port_info,
947 !!(link_data->link_info & ICE_AQ_LINK_UP),
948 le16_to_cpu(link_data->link_speed));
949 if (status)
950 dev_dbg(&pf->pdev->dev,
951 "Could not process link event, error %d\n", status);
952
953 return status;
954}
955
956
957
958
959
960
961static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type)
962{
963 struct ice_rq_event_info event;
964 struct ice_hw *hw = &pf->hw;
965 struct ice_ctl_q_info *cq;
966 u16 pending, i = 0;
967 const char *qtype;
968 u32 oldval, val;
969
970
971 if (test_bit(__ICE_RESET_FAILED, pf->state))
972 return 0;
973
974 switch (q_type) {
975 case ICE_CTL_Q_ADMIN:
976 cq = &hw->adminq;
977 qtype = "Admin";
978 break;
979 case ICE_CTL_Q_MAILBOX:
980 cq = &hw->mailboxq;
981 qtype = "Mailbox";
982 break;
983 default:
984 dev_warn(&pf->pdev->dev, "Unknown control queue type 0x%x\n",
985 q_type);
986 return 0;
987 }
988
989
990
991
992 val = rd32(hw, cq->rq.len);
993 if (val & (PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
994 PF_FW_ARQLEN_ARQCRIT_M)) {
995 oldval = val;
996 if (val & PF_FW_ARQLEN_ARQVFE_M)
997 dev_dbg(&pf->pdev->dev,
998 "%s Receive Queue VF Error detected\n", qtype);
999 if (val & PF_FW_ARQLEN_ARQOVFL_M) {
1000 dev_dbg(&pf->pdev->dev,
1001 "%s Receive Queue Overflow Error detected\n",
1002 qtype);
1003 }
1004 if (val & PF_FW_ARQLEN_ARQCRIT_M)
1005 dev_dbg(&pf->pdev->dev,
1006 "%s Receive Queue Critical Error detected\n",
1007 qtype);
1008 val &= ~(PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
1009 PF_FW_ARQLEN_ARQCRIT_M);
1010 if (oldval != val)
1011 wr32(hw, cq->rq.len, val);
1012 }
1013
1014 val = rd32(hw, cq->sq.len);
1015 if (val & (PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1016 PF_FW_ATQLEN_ATQCRIT_M)) {
1017 oldval = val;
1018 if (val & PF_FW_ATQLEN_ATQVFE_M)
1019 dev_dbg(&pf->pdev->dev,
1020 "%s Send Queue VF Error detected\n", qtype);
1021 if (val & PF_FW_ATQLEN_ATQOVFL_M) {
1022 dev_dbg(&pf->pdev->dev,
1023 "%s Send Queue Overflow Error detected\n",
1024 qtype);
1025 }
1026 if (val & PF_FW_ATQLEN_ATQCRIT_M)
1027 dev_dbg(&pf->pdev->dev,
1028 "%s Send Queue Critical Error detected\n",
1029 qtype);
1030 val &= ~(PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
1031 PF_FW_ATQLEN_ATQCRIT_M);
1032 if (oldval != val)
1033 wr32(hw, cq->sq.len, val);
1034 }
1035
1036 event.buf_len = cq->rq_buf_size;
1037 event.msg_buf = devm_kzalloc(&pf->pdev->dev, event.buf_len,
1038 GFP_KERNEL);
1039 if (!event.msg_buf)
1040 return 0;
1041
1042 do {
1043 enum ice_status ret;
1044 u16 opcode;
1045
1046 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
1047 if (ret == ICE_ERR_AQ_NO_WORK)
1048 break;
1049 if (ret) {
1050 dev_err(&pf->pdev->dev,
1051 "%s Receive Queue event error %d\n", qtype,
1052 ret);
1053 break;
1054 }
1055
1056 opcode = le16_to_cpu(event.desc.opcode);
1057
1058 switch (opcode) {
1059 case ice_aqc_opc_get_link_status:
1060 if (ice_handle_link_event(pf, &event))
1061 dev_err(&pf->pdev->dev,
1062 "Could not handle link event\n");
1063 break;
1064 case ice_mbx_opc_send_msg_to_pf:
1065 ice_vc_process_vf_msg(pf, &event);
1066 break;
1067 case ice_aqc_opc_fw_logging:
1068 ice_output_fw_log(hw, &event.desc, event.msg_buf);
1069 break;
1070 case ice_aqc_opc_lldp_set_mib_change:
1071 ice_dcb_process_lldp_set_mib_change(pf, &event);
1072 break;
1073 default:
1074 dev_dbg(&pf->pdev->dev,
1075 "%s Receive Queue unknown event 0x%04x ignored\n",
1076 qtype, opcode);
1077 break;
1078 }
1079 } while (pending && (i++ < ICE_DFLT_IRQ_WORK));
1080
1081 devm_kfree(&pf->pdev->dev, event.msg_buf);
1082
1083 return pending && (i == ICE_DFLT_IRQ_WORK);
1084}
1085
1086
1087
1088
1089
1090
1091
1092
1093static bool ice_ctrlq_pending(struct ice_hw *hw, struct ice_ctl_q_info *cq)
1094{
1095 u16 ntu;
1096
1097 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
1098 return cq->rq.next_to_clean != ntu;
1099}
1100
1101
1102
1103
1104
1105static void ice_clean_adminq_subtask(struct ice_pf *pf)
1106{
1107 struct ice_hw *hw = &pf->hw;
1108
1109 if (!test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
1110 return;
1111
1112 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN))
1113 return;
1114
1115 clear_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
1116
1117
1118
1119
1120
1121
1122 if (ice_ctrlq_pending(hw, &hw->adminq))
1123 __ice_clean_ctrlq(pf, ICE_CTL_Q_ADMIN);
1124
1125 ice_flush(hw);
1126}
1127
1128
1129
1130
1131
1132static void ice_clean_mailboxq_subtask(struct ice_pf *pf)
1133{
1134 struct ice_hw *hw = &pf->hw;
1135
1136 if (!test_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state))
1137 return;
1138
1139 if (__ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX))
1140 return;
1141
1142 clear_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state);
1143
1144 if (ice_ctrlq_pending(hw, &hw->mailboxq))
1145 __ice_clean_ctrlq(pf, ICE_CTL_Q_MAILBOX);
1146
1147 ice_flush(hw);
1148}
1149
1150
1151
1152
1153
1154
1155
1156static void ice_service_task_schedule(struct ice_pf *pf)
1157{
1158 if (!test_bit(__ICE_SERVICE_DIS, pf->state) &&
1159 !test_and_set_bit(__ICE_SERVICE_SCHED, pf->state) &&
1160 !test_bit(__ICE_NEEDS_RESTART, pf->state))
1161 queue_work(ice_wq, &pf->serv_task);
1162}
1163
1164
1165
1166
1167
1168static void ice_service_task_complete(struct ice_pf *pf)
1169{
1170 WARN_ON(!test_bit(__ICE_SERVICE_SCHED, pf->state));
1171
1172
1173 smp_mb__before_atomic();
1174 clear_bit(__ICE_SERVICE_SCHED, pf->state);
1175}
1176
1177
1178
1179
1180
1181static void ice_service_task_stop(struct ice_pf *pf)
1182{
1183 set_bit(__ICE_SERVICE_DIS, pf->state);
1184
1185 if (pf->serv_tmr.function)
1186 del_timer_sync(&pf->serv_tmr);
1187 if (pf->serv_task.func)
1188 cancel_work_sync(&pf->serv_task);
1189
1190 clear_bit(__ICE_SERVICE_SCHED, pf->state);
1191}
1192
1193
1194
1195
1196
1197
1198
1199static void ice_service_task_restart(struct ice_pf *pf)
1200{
1201 clear_bit(__ICE_SERVICE_DIS, pf->state);
1202 ice_service_task_schedule(pf);
1203}
1204
1205
1206
1207
1208
1209static void ice_service_timer(struct timer_list *t)
1210{
1211 struct ice_pf *pf = from_timer(pf, t, serv_tmr);
1212
1213 mod_timer(&pf->serv_tmr, round_jiffies(pf->serv_tmr_period + jiffies));
1214 ice_service_task_schedule(pf);
1215}
1216
1217
1218
1219
1220
1221
1222
1223static void ice_handle_mdd_event(struct ice_pf *pf)
1224{
1225 struct ice_hw *hw = &pf->hw;
1226 bool mdd_detected = false;
1227 u32 reg;
1228 int i;
1229
1230 if (!test_and_clear_bit(__ICE_MDD_EVENT_PENDING, pf->state))
1231 return;
1232
1233
1234 reg = rd32(hw, GL_MDET_TX_PQM);
1235 if (reg & GL_MDET_TX_PQM_VALID_M) {
1236 u8 pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1237 GL_MDET_TX_PQM_PF_NUM_S;
1238 u16 vf_num = (reg & GL_MDET_TX_PQM_VF_NUM_M) >>
1239 GL_MDET_TX_PQM_VF_NUM_S;
1240 u8 event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1241 GL_MDET_TX_PQM_MAL_TYPE_S;
1242 u16 queue = ((reg & GL_MDET_TX_PQM_QNUM_M) >>
1243 GL_MDET_TX_PQM_QNUM_S);
1244
1245 if (netif_msg_tx_err(pf))
1246 dev_info(&pf->pdev->dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1247 event, queue, pf_num, vf_num);
1248 wr32(hw, GL_MDET_TX_PQM, 0xffffffff);
1249 mdd_detected = true;
1250 }
1251
1252 reg = rd32(hw, GL_MDET_TX_TCLAN);
1253 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1254 u8 pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1255 GL_MDET_TX_TCLAN_PF_NUM_S;
1256 u16 vf_num = (reg & GL_MDET_TX_TCLAN_VF_NUM_M) >>
1257 GL_MDET_TX_TCLAN_VF_NUM_S;
1258 u8 event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1259 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1260 u16 queue = ((reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1261 GL_MDET_TX_TCLAN_QNUM_S);
1262
1263 if (netif_msg_rx_err(pf))
1264 dev_info(&pf->pdev->dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",
1265 event, queue, pf_num, vf_num);
1266 wr32(hw, GL_MDET_TX_TCLAN, 0xffffffff);
1267 mdd_detected = true;
1268 }
1269
1270 reg = rd32(hw, GL_MDET_RX);
1271 if (reg & GL_MDET_RX_VALID_M) {
1272 u8 pf_num = (reg & GL_MDET_RX_PF_NUM_M) >>
1273 GL_MDET_RX_PF_NUM_S;
1274 u16 vf_num = (reg & GL_MDET_RX_VF_NUM_M) >>
1275 GL_MDET_RX_VF_NUM_S;
1276 u8 event = (reg & GL_MDET_RX_MAL_TYPE_M) >>
1277 GL_MDET_RX_MAL_TYPE_S;
1278 u16 queue = ((reg & GL_MDET_RX_QNUM_M) >>
1279 GL_MDET_RX_QNUM_S);
1280
1281 if (netif_msg_rx_err(pf))
1282 dev_info(&pf->pdev->dev, "Malicious Driver Detection event %d on RX queue %d PF# %d VF# %d\n",
1283 event, queue, pf_num, vf_num);
1284 wr32(hw, GL_MDET_RX, 0xffffffff);
1285 mdd_detected = true;
1286 }
1287
1288 if (mdd_detected) {
1289 bool pf_mdd_detected = false;
1290
1291 reg = rd32(hw, PF_MDET_TX_PQM);
1292 if (reg & PF_MDET_TX_PQM_VALID_M) {
1293 wr32(hw, PF_MDET_TX_PQM, 0xFFFF);
1294 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
1295 pf_mdd_detected = true;
1296 }
1297
1298 reg = rd32(hw, PF_MDET_TX_TCLAN);
1299 if (reg & PF_MDET_TX_TCLAN_VALID_M) {
1300 wr32(hw, PF_MDET_TX_TCLAN, 0xFFFF);
1301 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
1302 pf_mdd_detected = true;
1303 }
1304
1305 reg = rd32(hw, PF_MDET_RX);
1306 if (reg & PF_MDET_RX_VALID_M) {
1307 wr32(hw, PF_MDET_RX, 0xFFFF);
1308 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
1309 pf_mdd_detected = true;
1310 }
1311
1312 if (pf_mdd_detected) {
1313 set_bit(__ICE_NEEDS_RESTART, pf->state);
1314 ice_service_task_schedule(pf);
1315 }
1316 }
1317
1318
1319 for (i = 0; i < pf->num_alloc_vfs; i++) {
1320 struct ice_vf *vf = &pf->vf[i];
1321
1322 bool vf_mdd_detected = false;
1323
1324 reg = rd32(hw, VP_MDET_TX_PQM(i));
1325 if (reg & VP_MDET_TX_PQM_VALID_M) {
1326 wr32(hw, VP_MDET_TX_PQM(i), 0xFFFF);
1327 vf_mdd_detected = true;
1328 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
1329 i);
1330 }
1331
1332 reg = rd32(hw, VP_MDET_TX_TCLAN(i));
1333 if (reg & VP_MDET_TX_TCLAN_VALID_M) {
1334 wr32(hw, VP_MDET_TX_TCLAN(i), 0xFFFF);
1335 vf_mdd_detected = true;
1336 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
1337 i);
1338 }
1339
1340 reg = rd32(hw, VP_MDET_TX_TDPU(i));
1341 if (reg & VP_MDET_TX_TDPU_VALID_M) {
1342 wr32(hw, VP_MDET_TX_TDPU(i), 0xFFFF);
1343 vf_mdd_detected = true;
1344 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
1345 i);
1346 }
1347
1348 reg = rd32(hw, VP_MDET_RX(i));
1349 if (reg & VP_MDET_RX_VALID_M) {
1350 wr32(hw, VP_MDET_RX(i), 0xFFFF);
1351 vf_mdd_detected = true;
1352 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
1353 i);
1354 }
1355
1356 if (vf_mdd_detected) {
1357 vf->num_mdd_events++;
1358 if (vf->num_mdd_events &&
1359 vf->num_mdd_events <= ICE_MDD_EVENTS_THRESHOLD)
1360 dev_info(&pf->pdev->dev,
1361 "VF %d has had %llu MDD events since last boot, Admin might need to reload AVF driver with this number of events\n",
1362 i, vf->num_mdd_events);
1363 }
1364 }
1365}
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379static int ice_force_phys_link_state(struct ice_vsi *vsi, bool link_up)
1380{
1381 struct ice_aqc_get_phy_caps_data *pcaps;
1382 struct ice_aqc_set_phy_cfg_data *cfg;
1383 struct ice_port_info *pi;
1384 struct device *dev;
1385 int retcode;
1386
1387 if (!vsi || !vsi->port_info || !vsi->back)
1388 return -EINVAL;
1389 if (vsi->type != ICE_VSI_PF)
1390 return 0;
1391
1392 dev = &vsi->back->pdev->dev;
1393
1394 pi = vsi->port_info;
1395
1396 pcaps = devm_kzalloc(dev, sizeof(*pcaps), GFP_KERNEL);
1397 if (!pcaps)
1398 return -ENOMEM;
1399
1400 retcode = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
1401 NULL);
1402 if (retcode) {
1403 dev_err(dev,
1404 "Failed to get phy capabilities, VSI %d error %d\n",
1405 vsi->vsi_num, retcode);
1406 retcode = -EIO;
1407 goto out;
1408 }
1409
1410
1411 if (link_up == !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) &&
1412 link_up == !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP))
1413 goto out;
1414
1415 cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
1416 if (!cfg) {
1417 retcode = -ENOMEM;
1418 goto out;
1419 }
1420
1421 cfg->phy_type_low = pcaps->phy_type_low;
1422 cfg->phy_type_high = pcaps->phy_type_high;
1423 cfg->caps = pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
1424 cfg->low_power_ctrl = pcaps->low_power_ctrl;
1425 cfg->eee_cap = pcaps->eee_cap;
1426 cfg->eeer_value = pcaps->eeer_value;
1427 cfg->link_fec_opt = pcaps->link_fec_options;
1428 if (link_up)
1429 cfg->caps |= ICE_AQ_PHY_ENA_LINK;
1430 else
1431 cfg->caps &= ~ICE_AQ_PHY_ENA_LINK;
1432
1433 retcode = ice_aq_set_phy_cfg(&vsi->back->hw, pi->lport, cfg, NULL);
1434 if (retcode) {
1435 dev_err(dev, "Failed to set phy config, VSI %d error %d\n",
1436 vsi->vsi_num, retcode);
1437 retcode = -EIO;
1438 }
1439
1440 devm_kfree(dev, cfg);
1441out:
1442 devm_kfree(dev, pcaps);
1443 return retcode;
1444}
1445
1446
1447
1448
1449
1450static void ice_check_media_subtask(struct ice_pf *pf)
1451{
1452 struct ice_port_info *pi;
1453 struct ice_vsi *vsi;
1454 int err;
1455
1456 vsi = ice_get_main_vsi(pf);
1457 if (!vsi)
1458 return;
1459
1460
1461
1462
1463 if (!test_bit(ICE_FLAG_NO_MEDIA, pf->flags) ||
1464 test_bit(__ICE_DOWN, vsi->state))
1465 return;
1466
1467
1468 pi = vsi->port_info;
1469 err = ice_update_link_info(pi);
1470 if (err)
1471 return;
1472
1473 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
1474 err = ice_force_phys_link_state(vsi, true);
1475 if (err)
1476 return;
1477 clear_bit(ICE_FLAG_NO_MEDIA, pf->flags);
1478
1479
1480
1481
1482 }
1483}
1484
1485
1486
1487
1488
1489static void ice_service_task(struct work_struct *work)
1490{
1491 struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);
1492 unsigned long start_time = jiffies;
1493
1494
1495
1496
1497 ice_reset_subtask(pf);
1498
1499
1500 if (ice_is_reset_in_progress(pf->state) ||
1501 test_bit(__ICE_SUSPENDED, pf->state) ||
1502 test_bit(__ICE_NEEDS_RESTART, pf->state)) {
1503 ice_service_task_complete(pf);
1504 return;
1505 }
1506
1507 ice_clean_adminq_subtask(pf);
1508 ice_check_media_subtask(pf);
1509 ice_check_for_hang_subtask(pf);
1510 ice_sync_fltr_subtask(pf);
1511 ice_handle_mdd_event(pf);
1512 ice_watchdog_subtask(pf);
1513
1514 if (ice_is_safe_mode(pf)) {
1515 ice_service_task_complete(pf);
1516 return;
1517 }
1518
1519 ice_process_vflr_event(pf);
1520 ice_clean_mailboxq_subtask(pf);
1521
1522
1523 ice_service_task_complete(pf);
1524
1525
1526
1527
1528
1529 if (time_after(jiffies, (start_time + pf->serv_tmr_period)) ||
1530 test_bit(__ICE_MDD_EVENT_PENDING, pf->state) ||
1531 test_bit(__ICE_VFLR_EVENT_PENDING, pf->state) ||
1532 test_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state) ||
1533 test_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state))
1534 mod_timer(&pf->serv_tmr, jiffies);
1535}
1536
1537
1538
1539
1540
1541static void ice_set_ctrlq_len(struct ice_hw *hw)
1542{
1543 hw->adminq.num_rq_entries = ICE_AQ_LEN;
1544 hw->adminq.num_sq_entries = ICE_AQ_LEN;
1545 hw->adminq.rq_buf_size = ICE_AQ_MAX_BUF_LEN;
1546 hw->adminq.sq_buf_size = ICE_AQ_MAX_BUF_LEN;
1547 hw->mailboxq.num_rq_entries = ICE_MBXRQ_LEN;
1548 hw->mailboxq.num_sq_entries = ICE_MBXSQ_LEN;
1549 hw->mailboxq.rq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
1550 hw->mailboxq.sq_buf_size = ICE_MBXQ_MAX_BUF_LEN;
1551}
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561static void
1562ice_irq_affinity_notify(struct irq_affinity_notify *notify,
1563 const cpumask_t *mask)
1564{
1565 struct ice_q_vector *q_vector =
1566 container_of(notify, struct ice_q_vector, affinity_notify);
1567
1568 cpumask_copy(&q_vector->affinity_mask, mask);
1569}
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579static void ice_irq_affinity_release(struct kref __always_unused *ref) {}
1580
1581
1582
1583
1584
1585static int ice_vsi_ena_irq(struct ice_vsi *vsi)
1586{
1587 struct ice_hw *hw = &vsi->back->hw;
1588 int i;
1589
1590 ice_for_each_q_vector(vsi, i)
1591 ice_irq_dynamic_ena(hw, vsi, vsi->q_vectors[i]);
1592
1593 ice_flush(hw);
1594 return 0;
1595}
1596
1597
1598
1599
1600
1601
1602static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)
1603{
1604 int q_vectors = vsi->num_q_vectors;
1605 struct ice_pf *pf = vsi->back;
1606 int base = vsi->base_vector;
1607 int rx_int_idx = 0;
1608 int tx_int_idx = 0;
1609 int vector, err;
1610 int irq_num;
1611
1612 for (vector = 0; vector < q_vectors; vector++) {
1613 struct ice_q_vector *q_vector = vsi->q_vectors[vector];
1614
1615 irq_num = pf->msix_entries[base + vector].vector;
1616
1617 if (q_vector->tx.ring && q_vector->rx.ring) {
1618 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1619 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
1620 tx_int_idx++;
1621 } else if (q_vector->rx.ring) {
1622 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1623 "%s-%s-%d", basename, "rx", rx_int_idx++);
1624 } else if (q_vector->tx.ring) {
1625 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1626 "%s-%s-%d", basename, "tx", tx_int_idx++);
1627 } else {
1628
1629 continue;
1630 }
1631 err = devm_request_irq(&pf->pdev->dev, irq_num,
1632 vsi->irq_handler, 0,
1633 q_vector->name, q_vector);
1634 if (err) {
1635 netdev_err(vsi->netdev,
1636 "MSIX request_irq failed, error: %d\n", err);
1637 goto free_q_irqs;
1638 }
1639
1640
1641 q_vector->affinity_notify.notify = ice_irq_affinity_notify;
1642 q_vector->affinity_notify.release = ice_irq_affinity_release;
1643 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
1644
1645
1646 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
1647 }
1648
1649 vsi->irqs_ready = true;
1650 return 0;
1651
1652free_q_irqs:
1653 while (vector) {
1654 vector--;
1655 irq_num = pf->msix_entries[base + vector].vector,
1656 irq_set_affinity_notifier(irq_num, NULL);
1657 irq_set_affinity_hint(irq_num, NULL);
1658 devm_free_irq(&pf->pdev->dev, irq_num, &vsi->q_vectors[vector]);
1659 }
1660 return err;
1661}
1662
1663
1664
1665
1666
1667static void ice_ena_misc_vector(struct ice_pf *pf)
1668{
1669 struct ice_hw *hw = &pf->hw;
1670 u32 val;
1671
1672
1673 wr32(hw, PFINT_OICR_ENA, 0);
1674 rd32(hw, PFINT_OICR);
1675
1676 val = (PFINT_OICR_ECC_ERR_M |
1677 PFINT_OICR_MAL_DETECT_M |
1678 PFINT_OICR_GRST_M |
1679 PFINT_OICR_PCI_EXCEPTION_M |
1680 PFINT_OICR_VFLR_M |
1681 PFINT_OICR_HMC_ERR_M |
1682 PFINT_OICR_PE_CRITERR_M);
1683
1684 wr32(hw, PFINT_OICR_ENA, val);
1685
1686
1687 wr32(hw, GLINT_DYN_CTL(pf->oicr_idx),
1688 GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M);
1689}
1690
1691
1692
1693
1694
1695
1696static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)
1697{
1698 struct ice_pf *pf = (struct ice_pf *)data;
1699 struct ice_hw *hw = &pf->hw;
1700 irqreturn_t ret = IRQ_NONE;
1701 u32 oicr, ena_mask;
1702
1703 set_bit(__ICE_ADMINQ_EVENT_PENDING, pf->state);
1704 set_bit(__ICE_MAILBOXQ_EVENT_PENDING, pf->state);
1705
1706 oicr = rd32(hw, PFINT_OICR);
1707 ena_mask = rd32(hw, PFINT_OICR_ENA);
1708
1709 if (oicr & PFINT_OICR_SWINT_M) {
1710 ena_mask &= ~PFINT_OICR_SWINT_M;
1711 pf->sw_int_count++;
1712 }
1713
1714 if (oicr & PFINT_OICR_MAL_DETECT_M) {
1715 ena_mask &= ~PFINT_OICR_MAL_DETECT_M;
1716 set_bit(__ICE_MDD_EVENT_PENDING, pf->state);
1717 }
1718 if (oicr & PFINT_OICR_VFLR_M) {
1719 ena_mask &= ~PFINT_OICR_VFLR_M;
1720 set_bit(__ICE_VFLR_EVENT_PENDING, pf->state);
1721 }
1722
1723 if (oicr & PFINT_OICR_GRST_M) {
1724 u32 reset;
1725
1726
1727 ena_mask &= ~PFINT_OICR_GRST_M;
1728 reset = (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
1729 GLGEN_RSTAT_RESET_TYPE_S;
1730
1731 if (reset == ICE_RESET_CORER)
1732 pf->corer_count++;
1733 else if (reset == ICE_RESET_GLOBR)
1734 pf->globr_count++;
1735 else if (reset == ICE_RESET_EMPR)
1736 pf->empr_count++;
1737 else
1738 dev_dbg(&pf->pdev->dev, "Invalid reset type %d\n",
1739 reset);
1740
1741
1742
1743
1744
1745
1746 if (!test_and_set_bit(__ICE_RESET_OICR_RECV, pf->state)) {
1747 if (reset == ICE_RESET_CORER)
1748 set_bit(__ICE_CORER_RECV, pf->state);
1749 else if (reset == ICE_RESET_GLOBR)
1750 set_bit(__ICE_GLOBR_RECV, pf->state);
1751 else
1752 set_bit(__ICE_EMPR_RECV, pf->state);
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767 hw->reset_ongoing = true;
1768 }
1769 }
1770
1771 if (oicr & PFINT_OICR_HMC_ERR_M) {
1772 ena_mask &= ~PFINT_OICR_HMC_ERR_M;
1773 dev_dbg(&pf->pdev->dev,
1774 "HMC Error interrupt - info 0x%x, data 0x%x\n",
1775 rd32(hw, PFHMC_ERRORINFO),
1776 rd32(hw, PFHMC_ERRORDATA));
1777 }
1778
1779
1780 oicr &= ena_mask;
1781 if (oicr) {
1782 dev_dbg(&pf->pdev->dev, "unhandled interrupt oicr=0x%08x\n",
1783 oicr);
1784
1785
1786
1787 if (oicr & (PFINT_OICR_PE_CRITERR_M |
1788 PFINT_OICR_PCI_EXCEPTION_M |
1789 PFINT_OICR_ECC_ERR_M)) {
1790 set_bit(__ICE_PFR_REQ, pf->state);
1791 ice_service_task_schedule(pf);
1792 }
1793 }
1794 ret = IRQ_HANDLED;
1795
1796 if (!test_bit(__ICE_DOWN, pf->state)) {
1797 ice_service_task_schedule(pf);
1798 ice_irq_dynamic_ena(hw, NULL, NULL);
1799 }
1800
1801 return ret;
1802}
1803
1804
1805
1806
1807
1808static void ice_dis_ctrlq_interrupts(struct ice_hw *hw)
1809{
1810
1811 wr32(hw, PFINT_FW_CTL,
1812 rd32(hw, PFINT_FW_CTL) & ~PFINT_FW_CTL_CAUSE_ENA_M);
1813
1814
1815 wr32(hw, PFINT_MBX_CTL,
1816 rd32(hw, PFINT_MBX_CTL) & ~PFINT_MBX_CTL_CAUSE_ENA_M);
1817
1818
1819 wr32(hw, PFINT_OICR_CTL,
1820 rd32(hw, PFINT_OICR_CTL) & ~PFINT_OICR_CTL_CAUSE_ENA_M);
1821
1822 ice_flush(hw);
1823}
1824
1825
1826
1827
1828
1829static void ice_free_irq_msix_misc(struct ice_pf *pf)
1830{
1831 struct ice_hw *hw = &pf->hw;
1832
1833 ice_dis_ctrlq_interrupts(hw);
1834
1835
1836 wr32(hw, PFINT_OICR_ENA, 0);
1837 ice_flush(hw);
1838
1839 if (pf->msix_entries) {
1840 synchronize_irq(pf->msix_entries[pf->oicr_idx].vector);
1841 devm_free_irq(&pf->pdev->dev,
1842 pf->msix_entries[pf->oicr_idx].vector, pf);
1843 }
1844
1845 pf->num_avail_sw_msix += 1;
1846 ice_free_res(pf->irq_tracker, pf->oicr_idx, ICE_RES_MISC_VEC_ID);
1847}
1848
1849
1850
1851
1852
1853
1854static void ice_ena_ctrlq_interrupts(struct ice_hw *hw, u16 reg_idx)
1855{
1856 u32 val;
1857
1858 val = ((reg_idx & PFINT_OICR_CTL_MSIX_INDX_M) |
1859 PFINT_OICR_CTL_CAUSE_ENA_M);
1860 wr32(hw, PFINT_OICR_CTL, val);
1861
1862
1863 val = ((reg_idx & PFINT_FW_CTL_MSIX_INDX_M) |
1864 PFINT_FW_CTL_CAUSE_ENA_M);
1865 wr32(hw, PFINT_FW_CTL, val);
1866
1867
1868 val = ((reg_idx & PFINT_MBX_CTL_MSIX_INDX_M) |
1869 PFINT_MBX_CTL_CAUSE_ENA_M);
1870 wr32(hw, PFINT_MBX_CTL, val);
1871
1872 ice_flush(hw);
1873}
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883static int ice_req_irq_msix_misc(struct ice_pf *pf)
1884{
1885 struct ice_hw *hw = &pf->hw;
1886 int oicr_idx, err = 0;
1887
1888 if (!pf->int_name[0])
1889 snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc",
1890 dev_driver_string(&pf->pdev->dev),
1891 dev_name(&pf->pdev->dev));
1892
1893
1894
1895
1896
1897 if (ice_is_reset_in_progress(pf->state))
1898 goto skip_req_irq;
1899
1900
1901 oicr_idx = ice_get_res(pf, pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
1902 if (oicr_idx < 0)
1903 return oicr_idx;
1904
1905 pf->num_avail_sw_msix -= 1;
1906 pf->oicr_idx = oicr_idx;
1907
1908 err = devm_request_irq(&pf->pdev->dev,
1909 pf->msix_entries[pf->oicr_idx].vector,
1910 ice_misc_intr, 0, pf->int_name, pf);
1911 if (err) {
1912 dev_err(&pf->pdev->dev,
1913 "devm_request_irq for %s failed: %d\n",
1914 pf->int_name, err);
1915 ice_free_res(pf->irq_tracker, 1, ICE_RES_MISC_VEC_ID);
1916 pf->num_avail_sw_msix += 1;
1917 return err;
1918 }
1919
1920skip_req_irq:
1921 ice_ena_misc_vector(pf);
1922
1923 ice_ena_ctrlq_interrupts(hw, pf->oicr_idx);
1924 wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_idx),
1925 ITR_REG_ALIGN(ICE_ITR_8K) >> ICE_ITR_GRAN_S);
1926
1927 ice_flush(hw);
1928 ice_irq_dynamic_ena(hw, NULL, NULL);
1929
1930 return 0;
1931}
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941static void ice_napi_add(struct ice_vsi *vsi)
1942{
1943 int v_idx;
1944
1945 if (!vsi->netdev)
1946 return;
1947
1948 ice_for_each_q_vector(vsi, v_idx)
1949 netif_napi_add(vsi->netdev, &vsi->q_vectors[v_idx]->napi,
1950 ice_napi_poll, NAPI_POLL_WEIGHT);
1951}
1952
1953
1954
1955
1956
1957static void ice_set_ops(struct net_device *netdev)
1958{
1959 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1960
1961 if (ice_is_safe_mode(pf)) {
1962 netdev->netdev_ops = &ice_netdev_safe_mode_ops;
1963 ice_set_ethtool_safe_mode_ops(netdev);
1964 return;
1965 }
1966
1967 netdev->netdev_ops = &ice_netdev_ops;
1968 ice_set_ethtool_ops(netdev);
1969}
1970
1971
1972
1973
1974
1975static void ice_set_netdev_features(struct net_device *netdev)
1976{
1977 struct ice_pf *pf = ice_netdev_to_pf(netdev);
1978 netdev_features_t csumo_features;
1979 netdev_features_t vlano_features;
1980 netdev_features_t dflt_features;
1981 netdev_features_t tso_features;
1982
1983 if (ice_is_safe_mode(pf)) {
1984
1985 netdev->features = NETIF_F_SG | NETIF_F_HIGHDMA;
1986 netdev->hw_features = netdev->features;
1987 return;
1988 }
1989
1990 dflt_features = NETIF_F_SG |
1991 NETIF_F_HIGHDMA |
1992 NETIF_F_RXHASH;
1993
1994 csumo_features = NETIF_F_RXCSUM |
1995 NETIF_F_IP_CSUM |
1996 NETIF_F_SCTP_CRC |
1997 NETIF_F_IPV6_CSUM;
1998
1999 vlano_features = NETIF_F_HW_VLAN_CTAG_FILTER |
2000 NETIF_F_HW_VLAN_CTAG_TX |
2001 NETIF_F_HW_VLAN_CTAG_RX;
2002
2003 tso_features = NETIF_F_TSO;
2004
2005
2006 netdev->hw_features = dflt_features | csumo_features |
2007 vlano_features | tso_features;
2008
2009
2010 netdev->features |= netdev->hw_features;
2011
2012 netdev->hw_enc_features |= dflt_features | csumo_features |
2013 tso_features;
2014 netdev->vlan_features |= dflt_features | csumo_features |
2015 tso_features;
2016}
2017
2018
2019
2020
2021
2022
2023
2024static int ice_cfg_netdev(struct ice_vsi *vsi)
2025{
2026 struct ice_pf *pf = vsi->back;
2027 struct ice_netdev_priv *np;
2028 struct net_device *netdev;
2029 u8 mac_addr[ETH_ALEN];
2030 int err;
2031
2032 netdev = alloc_etherdev_mqs(sizeof(*np), vsi->alloc_txq,
2033 vsi->alloc_rxq);
2034 if (!netdev)
2035 return -ENOMEM;
2036
2037 vsi->netdev = netdev;
2038 np = netdev_priv(netdev);
2039 np->vsi = vsi;
2040
2041 ice_set_netdev_features(netdev);
2042
2043 ice_set_ops(netdev);
2044
2045 if (vsi->type == ICE_VSI_PF) {
2046 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
2047 ether_addr_copy(mac_addr, vsi->port_info->mac.perm_addr);
2048 ether_addr_copy(netdev->dev_addr, mac_addr);
2049 ether_addr_copy(netdev->perm_addr, mac_addr);
2050 }
2051
2052 netdev->priv_flags |= IFF_UNICAST_FLT;
2053
2054
2055 ice_vsi_cfg_netdev_tc(vsi, vsi->tc_cfg.ena_tc);
2056
2057
2058 netdev->watchdog_timeo = 5 * HZ;
2059
2060 netdev->min_mtu = ETH_MIN_MTU;
2061 netdev->max_mtu = ICE_MAX_MTU;
2062
2063 err = register_netdev(vsi->netdev);
2064 if (err)
2065 return err;
2066
2067 netif_carrier_off(vsi->netdev);
2068
2069
2070 netif_tx_stop_all_queues(vsi->netdev);
2071
2072 return 0;
2073}
2074
2075
2076
2077
2078
2079
2080
2081void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size)
2082{
2083 u16 i;
2084
2085 for (i = 0; i < rss_table_size; i++)
2086 lut[i] = i % rss_size;
2087}
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097static struct ice_vsi *
2098ice_pf_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
2099{
2100 return ice_vsi_setup(pf, pi, ICE_VSI_PF, ICE_INVAL_VFID);
2101}
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111struct ice_vsi *
2112ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi)
2113{
2114 return ice_vsi_setup(pf, pi, ICE_VSI_LB, ICE_INVAL_VFID);
2115}
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125static int
2126ice_vlan_rx_add_vid(struct net_device *netdev, __always_unused __be16 proto,
2127 u16 vid)
2128{
2129 struct ice_netdev_priv *np = netdev_priv(netdev);
2130 struct ice_vsi *vsi = np->vsi;
2131 int ret;
2132
2133 if (vid >= VLAN_N_VID) {
2134 netdev_err(netdev, "VLAN id requested %d is out of range %d\n",
2135 vid, VLAN_N_VID);
2136 return -EINVAL;
2137 }
2138
2139 if (vsi->info.pvid)
2140 return -EINVAL;
2141
2142
2143 if (unlikely(!vid)) {
2144 ret = ice_cfg_vlan_pruning(vsi, true, false);
2145 if (ret)
2146 return ret;
2147 }
2148
2149
2150
2151
2152
2153 ret = ice_vsi_add_vlan(vsi, vid);
2154 if (!ret) {
2155 vsi->vlan_ena = true;
2156 set_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
2157 }
2158
2159 return ret;
2160}
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170static int
2171ice_vlan_rx_kill_vid(struct net_device *netdev, __always_unused __be16 proto,
2172 u16 vid)
2173{
2174 struct ice_netdev_priv *np = netdev_priv(netdev);
2175 struct ice_vsi *vsi = np->vsi;
2176 int ret;
2177
2178 if (vsi->info.pvid)
2179 return -EINVAL;
2180
2181
2182
2183
2184 ret = ice_vsi_kill_vlan(vsi, vid);
2185 if (ret)
2186 return ret;
2187
2188
2189 if (unlikely(!vid))
2190 ret = ice_cfg_vlan_pruning(vsi, false, false);
2191
2192 vsi->vlan_ena = false;
2193 set_bit(ICE_VSI_FLAG_VLAN_FLTR_CHANGED, vsi->flags);
2194 return ret;
2195}
2196
2197
2198
2199
2200
2201
2202
2203static int ice_setup_pf_sw(struct ice_pf *pf)
2204{
2205 struct ice_vsi *vsi;
2206 int status = 0;
2207
2208 if (ice_is_reset_in_progress(pf->state))
2209 return -EBUSY;
2210
2211 vsi = ice_pf_vsi_setup(pf, pf->hw.port_info);
2212 if (!vsi) {
2213 status = -ENOMEM;
2214 goto unroll_vsi_setup;
2215 }
2216
2217 status = ice_cfg_netdev(vsi);
2218 if (status) {
2219 status = -ENODEV;
2220 goto unroll_vsi_setup;
2221 }
2222
2223
2224
2225
2226
2227 ice_napi_add(vsi);
2228
2229 status = ice_init_mac_fltr(pf);
2230 if (status)
2231 goto unroll_napi_add;
2232
2233 return status;
2234
2235unroll_napi_add:
2236 if (vsi) {
2237 ice_napi_del(vsi);
2238 if (vsi->netdev) {
2239 if (vsi->netdev->reg_state == NETREG_REGISTERED)
2240 unregister_netdev(vsi->netdev);
2241 free_netdev(vsi->netdev);
2242 vsi->netdev = NULL;
2243 }
2244 }
2245
2246unroll_vsi_setup:
2247 if (vsi) {
2248 ice_vsi_free_q_vectors(vsi);
2249 ice_vsi_delete(vsi);
2250 ice_vsi_put_qs(vsi);
2251 ice_vsi_clear(vsi);
2252 }
2253 return status;
2254}
2255
2256
2257
2258
2259
2260
2261
2262static u16
2263ice_get_avail_q_count(unsigned long *pf_qmap, struct mutex *lock, u16 size)
2264{
2265 u16 count = 0, bit;
2266
2267 mutex_lock(lock);
2268 for_each_clear_bit(bit, pf_qmap, size)
2269 count++;
2270 mutex_unlock(lock);
2271
2272 return count;
2273}
2274
2275
2276
2277
2278
2279u16 ice_get_avail_txq_count(struct ice_pf *pf)
2280{
2281 return ice_get_avail_q_count(pf->avail_txqs, &pf->avail_q_mutex,
2282 pf->max_pf_txqs);
2283}
2284
2285
2286
2287
2288
2289u16 ice_get_avail_rxq_count(struct ice_pf *pf)
2290{
2291 return ice_get_avail_q_count(pf->avail_rxqs, &pf->avail_q_mutex,
2292 pf->max_pf_rxqs);
2293}
2294
2295
2296
2297
2298
2299static void ice_deinit_pf(struct ice_pf *pf)
2300{
2301 ice_service_task_stop(pf);
2302 mutex_destroy(&pf->sw_mutex);
2303 mutex_destroy(&pf->avail_q_mutex);
2304
2305 if (pf->avail_txqs) {
2306 bitmap_free(pf->avail_txqs);
2307 pf->avail_txqs = NULL;
2308 }
2309
2310 if (pf->avail_rxqs) {
2311 bitmap_free(pf->avail_rxqs);
2312 pf->avail_rxqs = NULL;
2313 }
2314}
2315
2316
2317
2318
2319
2320static void ice_set_pf_caps(struct ice_pf *pf)
2321{
2322 struct ice_hw_func_caps *func_caps = &pf->hw.func_caps;
2323
2324 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
2325 if (func_caps->common_cap.dcb)
2326 set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
2327#ifdef CONFIG_PCI_IOV
2328 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
2329 if (func_caps->common_cap.sr_iov_1_1) {
2330 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
2331 pf->num_vfs_supported = min_t(int, func_caps->num_allocd_vfs,
2332 ICE_MAX_VF_COUNT);
2333 }
2334#endif
2335 clear_bit(ICE_FLAG_RSS_ENA, pf->flags);
2336 if (func_caps->common_cap.rss_table_size)
2337 set_bit(ICE_FLAG_RSS_ENA, pf->flags);
2338
2339 pf->max_pf_txqs = func_caps->common_cap.num_txq;
2340 pf->max_pf_rxqs = func_caps->common_cap.num_rxq;
2341}
2342
2343
2344
2345
2346
2347static int ice_init_pf(struct ice_pf *pf)
2348{
2349 ice_set_pf_caps(pf);
2350
2351 mutex_init(&pf->sw_mutex);
2352
2353
2354 timer_setup(&pf->serv_tmr, ice_service_timer, 0);
2355 pf->serv_tmr_period = HZ;
2356 INIT_WORK(&pf->serv_task, ice_service_task);
2357 clear_bit(__ICE_SERVICE_SCHED, pf->state);
2358
2359 mutex_init(&pf->avail_q_mutex);
2360 pf->avail_txqs = bitmap_zalloc(pf->max_pf_txqs, GFP_KERNEL);
2361 if (!pf->avail_txqs)
2362 return -ENOMEM;
2363
2364 pf->avail_rxqs = bitmap_zalloc(pf->max_pf_rxqs, GFP_KERNEL);
2365 if (!pf->avail_rxqs) {
2366 devm_kfree(&pf->pdev->dev, pf->avail_txqs);
2367 pf->avail_txqs = NULL;
2368 return -ENOMEM;
2369 }
2370
2371 return 0;
2372}
2373
2374
2375
2376
2377
2378
2379
2380
2381static int ice_ena_msix_range(struct ice_pf *pf)
2382{
2383 int v_left, v_actual, v_budget = 0;
2384 int needed, err, i;
2385
2386 v_left = pf->hw.func_caps.common_cap.num_msix_vectors;
2387
2388
2389 needed = 1;
2390 if (v_left < needed)
2391 goto no_hw_vecs_left_err;
2392 v_budget += needed;
2393 v_left -= needed;
2394
2395
2396 needed = min_t(int, num_online_cpus(), v_left);
2397 if (v_left < needed)
2398 goto no_hw_vecs_left_err;
2399 pf->num_lan_msix = needed;
2400 v_budget += needed;
2401 v_left -= needed;
2402
2403 pf->msix_entries = devm_kcalloc(&pf->pdev->dev, v_budget,
2404 sizeof(*pf->msix_entries), GFP_KERNEL);
2405
2406 if (!pf->msix_entries) {
2407 err = -ENOMEM;
2408 goto exit_err;
2409 }
2410
2411 for (i = 0; i < v_budget; i++)
2412 pf->msix_entries[i].entry = i;
2413
2414
2415 v_actual = pci_enable_msix_range(pf->pdev, pf->msix_entries,
2416 ICE_MIN_MSIX, v_budget);
2417
2418 if (v_actual < 0) {
2419 dev_err(&pf->pdev->dev, "unable to reserve MSI-X vectors\n");
2420 err = v_actual;
2421 goto msix_err;
2422 }
2423
2424 if (v_actual < v_budget) {
2425 dev_warn(&pf->pdev->dev,
2426 "not enough OS MSI-X vectors. requested = %d, obtained = %d\n",
2427 v_budget, v_actual);
2428
2429#define ICE_MIN_LAN_VECS 2
2430
2431 if (v_actual < ICE_MIN_LAN_VECS) {
2432
2433 pci_disable_msix(pf->pdev);
2434 err = -ERANGE;
2435 goto msix_err;
2436 } else {
2437 pf->num_lan_msix = ICE_MIN_LAN_VECS;
2438 }
2439 }
2440
2441 return v_actual;
2442
2443msix_err:
2444 devm_kfree(&pf->pdev->dev, pf->msix_entries);
2445 goto exit_err;
2446
2447no_hw_vecs_left_err:
2448 dev_err(&pf->pdev->dev,
2449 "not enough device MSI-X vectors. requested = %d, available = %d\n",
2450 needed, v_left);
2451 err = -ERANGE;
2452exit_err:
2453 pf->num_lan_msix = 0;
2454 return err;
2455}
2456
2457
2458
2459
2460
2461static void ice_dis_msix(struct ice_pf *pf)
2462{
2463 pci_disable_msix(pf->pdev);
2464 devm_kfree(&pf->pdev->dev, pf->msix_entries);
2465 pf->msix_entries = NULL;
2466}
2467
2468
2469
2470
2471
2472static void ice_clear_interrupt_scheme(struct ice_pf *pf)
2473{
2474 ice_dis_msix(pf);
2475
2476 if (pf->irq_tracker) {
2477 devm_kfree(&pf->pdev->dev, pf->irq_tracker);
2478 pf->irq_tracker = NULL;
2479 }
2480}
2481
2482
2483
2484
2485
2486static int ice_init_interrupt_scheme(struct ice_pf *pf)
2487{
2488 int vectors;
2489
2490 vectors = ice_ena_msix_range(pf);
2491
2492 if (vectors < 0)
2493 return vectors;
2494
2495
2496 pf->irq_tracker =
2497 devm_kzalloc(&pf->pdev->dev, sizeof(*pf->irq_tracker) +
2498 (sizeof(u16) * vectors), GFP_KERNEL);
2499 if (!pf->irq_tracker) {
2500 ice_dis_msix(pf);
2501 return -ENOMEM;
2502 }
2503
2504
2505 pf->num_avail_sw_msix = vectors;
2506 pf->irq_tracker->num_entries = vectors;
2507 pf->irq_tracker->end = pf->irq_tracker->num_entries;
2508
2509 return 0;
2510}
2511
2512
2513
2514
2515
2516
2517static void
2518ice_log_pkg_init(struct ice_hw *hw, enum ice_status *status)
2519{
2520 struct ice_pf *pf = (struct ice_pf *)hw->back;
2521 struct device *dev = &pf->pdev->dev;
2522
2523 switch (*status) {
2524 case ICE_SUCCESS:
2525
2526
2527
2528
2529 if (hw->pkg_ver.major == hw->active_pkg_ver.major &&
2530 hw->pkg_ver.minor == hw->active_pkg_ver.minor &&
2531 hw->pkg_ver.update == hw->active_pkg_ver.update &&
2532 hw->pkg_ver.draft == hw->active_pkg_ver.draft &&
2533 !memcmp(hw->pkg_name, hw->active_pkg_name,
2534 sizeof(hw->pkg_name))) {
2535 if (hw->pkg_dwnld_status == ICE_AQ_RC_EEXIST)
2536 dev_info(dev,
2537 "DDP package already present on device: %s version %d.%d.%d.%d\n",
2538 hw->active_pkg_name,
2539 hw->active_pkg_ver.major,
2540 hw->active_pkg_ver.minor,
2541 hw->active_pkg_ver.update,
2542 hw->active_pkg_ver.draft);
2543 else
2544 dev_info(dev,
2545 "The DDP package was successfully loaded: %s version %d.%d.%d.%d\n",
2546 hw->active_pkg_name,
2547 hw->active_pkg_ver.major,
2548 hw->active_pkg_ver.minor,
2549 hw->active_pkg_ver.update,
2550 hw->active_pkg_ver.draft);
2551 } else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||
2552 hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {
2553 dev_err(dev,
2554 "The device has a DDP package that is not supported by the driver. The device has package '%s' version %d.%d.x.x. The driver requires version %d.%d.x.x. Entering Safe Mode.\n",
2555 hw->active_pkg_name,
2556 hw->active_pkg_ver.major,
2557 hw->active_pkg_ver.minor,
2558 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
2559 *status = ICE_ERR_NOT_SUPPORTED;
2560 } else if (hw->active_pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
2561 hw->active_pkg_ver.minor == ICE_PKG_SUPP_VER_MNR) {
2562 dev_info(dev,
2563 "The driver could not load the DDP package file because a compatible DDP package is already present on the device. The device has package '%s' version %d.%d.%d.%d. The package file found by the driver: '%s' version %d.%d.%d.%d.\n",
2564 hw->active_pkg_name,
2565 hw->active_pkg_ver.major,
2566 hw->active_pkg_ver.minor,
2567 hw->active_pkg_ver.update,
2568 hw->active_pkg_ver.draft,
2569 hw->pkg_name,
2570 hw->pkg_ver.major,
2571 hw->pkg_ver.minor,
2572 hw->pkg_ver.update,
2573 hw->pkg_ver.draft);
2574 } else {
2575 dev_err(dev,
2576 "An unknown error occurred when loading the DDP package, please reboot the system. If the problem persists, update the NVM. Entering Safe Mode.\n");
2577 *status = ICE_ERR_NOT_SUPPORTED;
2578 }
2579 break;
2580 case ICE_ERR_BUF_TOO_SHORT:
2581
2582 case ICE_ERR_CFG:
2583 dev_err(dev,
2584 "The DDP package file is invalid. Entering Safe Mode.\n");
2585 break;
2586 case ICE_ERR_NOT_SUPPORTED:
2587
2588 if (hw->pkg_ver.major > ICE_PKG_SUPP_VER_MAJ ||
2589 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
2590 hw->pkg_ver.minor > ICE_PKG_SUPP_VER_MNR))
2591 dev_err(dev,
2592 "The DDP package file version is higher than the driver supports. Please use an updated driver. Entering Safe Mode.\n");
2593 else if (hw->pkg_ver.major < ICE_PKG_SUPP_VER_MAJ ||
2594 (hw->pkg_ver.major == ICE_PKG_SUPP_VER_MAJ &&
2595 hw->pkg_ver.minor < ICE_PKG_SUPP_VER_MNR))
2596 dev_err(dev,
2597 "The DDP package file version is lower than the driver supports. The driver requires version %d.%d.x.x. Please use an updated DDP Package file. Entering Safe Mode.\n",
2598 ICE_PKG_SUPP_VER_MAJ, ICE_PKG_SUPP_VER_MNR);
2599 break;
2600 case ICE_ERR_AQ_ERROR:
2601 switch (hw->adminq.sq_last_status) {
2602 case ICE_AQ_RC_ENOSEC:
2603 case ICE_AQ_RC_EBADSIG:
2604 dev_err(dev,
2605 "The DDP package could not be loaded because its signature is not valid. Please use a valid DDP Package. Entering Safe Mode.\n");
2606 return;
2607 case ICE_AQ_RC_ESVN:
2608 dev_err(dev,
2609 "The DDP Package could not be loaded because its security revision is too low. Please use an updated DDP Package. Entering Safe Mode.\n");
2610 return;
2611 case ICE_AQ_RC_EBADMAN:
2612 case ICE_AQ_RC_EBADBUF:
2613 dev_err(dev,
2614 "An error occurred on the device while loading the DDP package. The device will be reset.\n");
2615 return;
2616 default:
2617 break;
2618 }
2619
2620 default:
2621 dev_err(dev,
2622 "An unknown error (%d) occurred when loading the DDP package. Entering Safe Mode.\n",
2623 *status);
2624 break;
2625 }
2626}
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636static void
2637ice_load_pkg(const struct firmware *firmware, struct ice_pf *pf)
2638{
2639 enum ice_status status = ICE_ERR_PARAM;
2640 struct device *dev = &pf->pdev->dev;
2641 struct ice_hw *hw = &pf->hw;
2642
2643
2644 if (firmware && !hw->pkg_copy) {
2645 status = ice_copy_and_init_pkg(hw, firmware->data,
2646 firmware->size);
2647 ice_log_pkg_init(hw, &status);
2648 } else if (!firmware && hw->pkg_copy) {
2649
2650 status = ice_init_pkg(hw, hw->pkg_copy, hw->pkg_size);
2651 ice_log_pkg_init(hw, &status);
2652 } else {
2653 dev_err(dev,
2654 "The DDP package file failed to load. Entering Safe Mode.\n");
2655 }
2656
2657 if (status) {
2658
2659 clear_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
2660 return;
2661 }
2662
2663
2664
2665
2666 set_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
2667}
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677static void ice_verify_cacheline_size(struct ice_pf *pf)
2678{
2679 if (rd32(&pf->hw, GLPCI_CNF2) & GLPCI_CNF2_CACHELINE_SIZE_M)
2680 dev_warn(&pf->pdev->dev,
2681 "%d Byte cache line assumption is invalid, driver may have Tx timeouts!\n",
2682 ICE_CACHE_LINE_BYTES);
2683}
2684
2685
2686
2687
2688
2689
2690
2691static enum ice_status ice_send_version(struct ice_pf *pf)
2692{
2693 struct ice_driver_ver dv;
2694
2695 dv.major_ver = DRV_VERSION_MAJOR;
2696 dv.minor_ver = DRV_VERSION_MINOR;
2697 dv.build_ver = DRV_VERSION_BUILD;
2698 dv.subbuild_ver = 0;
2699 strscpy((char *)dv.driver_string, DRV_VERSION,
2700 sizeof(dv.driver_string));
2701 return ice_aq_send_driver_ver(&pf->hw, &dv, NULL);
2702}
2703
2704
2705
2706
2707
2708static char *ice_get_opt_fw_name(struct ice_pf *pf)
2709{
2710
2711
2712
2713 struct pci_dev *pdev = pf->pdev;
2714 char *opt_fw_filename = NULL;
2715 u32 dword;
2716 u8 dsn[8];
2717 int pos;
2718
2719
2720
2721
2722 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DSN);
2723 if (pos) {
2724 opt_fw_filename = kzalloc(NAME_MAX, GFP_KERNEL);
2725 if (!opt_fw_filename)
2726 return NULL;
2727
2728 pci_read_config_dword(pdev, pos + 4, &dword);
2729 put_unaligned_le32(dword, &dsn[0]);
2730 pci_read_config_dword(pdev, pos + 8, &dword);
2731 put_unaligned_le32(dword, &dsn[4]);
2732 snprintf(opt_fw_filename, NAME_MAX,
2733 "%sice-%02x%02x%02x%02x%02x%02x%02x%02x.pkg",
2734 ICE_DDP_PKG_PATH,
2735 dsn[7], dsn[6], dsn[5], dsn[4],
2736 dsn[3], dsn[2], dsn[1], dsn[0]);
2737 }
2738
2739 return opt_fw_filename;
2740}
2741
2742
2743
2744
2745
2746static void ice_request_fw(struct ice_pf *pf)
2747{
2748 char *opt_fw_filename = ice_get_opt_fw_name(pf);
2749 const struct firmware *firmware = NULL;
2750 struct device *dev = &pf->pdev->dev;
2751 int err = 0;
2752
2753
2754
2755
2756
2757 if (opt_fw_filename) {
2758 err = firmware_request_nowarn(&firmware, opt_fw_filename, dev);
2759 if (err) {
2760 kfree(opt_fw_filename);
2761 goto dflt_pkg_load;
2762 }
2763
2764
2765 ice_load_pkg(firmware, pf);
2766 kfree(opt_fw_filename);
2767 release_firmware(firmware);
2768 return;
2769 }
2770
2771dflt_pkg_load:
2772 err = request_firmware(&firmware, ICE_DDP_PKG_FILE, dev);
2773 if (err) {
2774 dev_err(dev,
2775 "The DDP package file was not found or could not be read. Entering Safe Mode\n");
2776 return;
2777 }
2778
2779
2780 ice_load_pkg(firmware, pf);
2781 release_firmware(firmware);
2782}
2783
2784
2785
2786
2787
2788
2789
2790
2791static int
2792ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)
2793{
2794 struct device *dev = &pdev->dev;
2795 struct ice_pf *pf;
2796 struct ice_hw *hw;
2797 int err;
2798
2799
2800 err = pcim_enable_device(pdev);
2801 if (err)
2802 return err;
2803
2804 err = pcim_iomap_regions(pdev, BIT(ICE_BAR0), pci_name(pdev));
2805 if (err) {
2806 dev_err(dev, "BAR0 I/O map error %d\n", err);
2807 return err;
2808 }
2809
2810 pf = devm_kzalloc(dev, sizeof(*pf), GFP_KERNEL);
2811 if (!pf)
2812 return -ENOMEM;
2813
2814
2815 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
2816 if (err)
2817 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
2818 if (err) {
2819 dev_err(dev, "DMA configuration failed: 0x%x\n", err);
2820 return err;
2821 }
2822
2823 pci_enable_pcie_error_reporting(pdev);
2824 pci_set_master(pdev);
2825
2826 pf->pdev = pdev;
2827 pci_set_drvdata(pdev, pf);
2828 set_bit(__ICE_DOWN, pf->state);
2829
2830 set_bit(__ICE_SERVICE_DIS, pf->state);
2831
2832 hw = &pf->hw;
2833 hw->hw_addr = pcim_iomap_table(pdev)[ICE_BAR0];
2834 hw->back = pf;
2835 hw->vendor_id = pdev->vendor;
2836 hw->device_id = pdev->device;
2837 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2838 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2839 hw->subsystem_device_id = pdev->subsystem_device;
2840 hw->bus.device = PCI_SLOT(pdev->devfn);
2841 hw->bus.func = PCI_FUNC(pdev->devfn);
2842 ice_set_ctrlq_len(hw);
2843
2844 pf->msg_enable = netif_msg_init(debug, ICE_DFLT_NETIF_M);
2845
2846#ifndef CONFIG_DYNAMIC_DEBUG
2847 if (debug < -1)
2848 hw->debug_mask = debug;
2849#endif
2850
2851 err = ice_init_hw(hw);
2852 if (err) {
2853 dev_err(dev, "ice_init_hw failed: %d\n", err);
2854 err = -EIO;
2855 goto err_exit_unroll;
2856 }
2857
2858 dev_info(dev, "firmware %d.%d.%d api %d.%d.%d nvm %s build 0x%08x\n",
2859 hw->fw_maj_ver, hw->fw_min_ver, hw->fw_patch,
2860 hw->api_maj_ver, hw->api_min_ver, hw->api_patch,
2861 ice_nvm_version_str(hw), hw->fw_build);
2862
2863 ice_request_fw(pf);
2864
2865
2866
2867
2868
2869 if (ice_is_safe_mode(pf)) {
2870 dev_err(dev,
2871 "Package download failed. Advanced features disabled - Device now in Safe Mode\n");
2872
2873
2874
2875
2876
2877 ice_set_safe_mode_caps(hw);
2878 }
2879
2880 err = ice_init_pf(pf);
2881 if (err) {
2882 dev_err(dev, "ice_init_pf failed: %d\n", err);
2883 goto err_init_pf_unroll;
2884 }
2885
2886 pf->num_alloc_vsi = hw->func_caps.guar_num_vsi;
2887 if (!pf->num_alloc_vsi) {
2888 err = -EIO;
2889 goto err_init_pf_unroll;
2890 }
2891
2892 pf->vsi = devm_kcalloc(dev, pf->num_alloc_vsi, sizeof(*pf->vsi),
2893 GFP_KERNEL);
2894 if (!pf->vsi) {
2895 err = -ENOMEM;
2896 goto err_init_pf_unroll;
2897 }
2898
2899 err = ice_init_interrupt_scheme(pf);
2900 if (err) {
2901 dev_err(dev, "ice_init_interrupt_scheme failed: %d\n", err);
2902 err = -EIO;
2903 goto err_init_interrupt_unroll;
2904 }
2905
2906
2907 clear_bit(__ICE_DOWN, pf->state);
2908
2909
2910
2911
2912
2913
2914 err = ice_req_irq_msix_misc(pf);
2915 if (err) {
2916 dev_err(dev, "setup of misc vector failed: %d\n", err);
2917 goto err_init_interrupt_unroll;
2918 }
2919
2920
2921 pf->first_sw = devm_kzalloc(dev, sizeof(*pf->first_sw), GFP_KERNEL);
2922 if (!pf->first_sw) {
2923 err = -ENOMEM;
2924 goto err_msix_misc_unroll;
2925 }
2926
2927 if (hw->evb_veb)
2928 pf->first_sw->bridge_mode = BRIDGE_MODE_VEB;
2929 else
2930 pf->first_sw->bridge_mode = BRIDGE_MODE_VEPA;
2931
2932 pf->first_sw->pf = pf;
2933
2934
2935 pf->first_sw->sw_id = hw->port_info->sw_id;
2936
2937 err = ice_setup_pf_sw(pf);
2938 if (err) {
2939 dev_err(dev, "probe failed due to setup PF switch:%d\n", err);
2940 goto err_alloc_sw_unroll;
2941 }
2942
2943 clear_bit(__ICE_SERVICE_DIS, pf->state);
2944
2945
2946 err = ice_send_version(pf);
2947 if (err) {
2948 dev_err(dev,
2949 "probe failed sending driver version %s. error: %d\n",
2950 ice_drv_ver, err);
2951 goto err_alloc_sw_unroll;
2952 }
2953
2954
2955 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
2956
2957 err = ice_init_link_events(pf->hw.port_info);
2958 if (err) {
2959 dev_err(dev, "ice_init_link_events failed: %d\n", err);
2960 goto err_alloc_sw_unroll;
2961 }
2962
2963 ice_verify_cacheline_size(pf);
2964
2965
2966 if (ice_is_safe_mode(pf))
2967 return 0;
2968
2969
2970
2971
2972 if (ice_init_pf_dcb(pf, false)) {
2973 clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags);
2974 clear_bit(ICE_FLAG_DCB_ENA, pf->flags);
2975 } else {
2976 ice_cfg_lldp_mib_change(&pf->hw, true);
2977 }
2978
2979 return 0;
2980
2981err_alloc_sw_unroll:
2982 set_bit(__ICE_SERVICE_DIS, pf->state);
2983 set_bit(__ICE_DOWN, pf->state);
2984 devm_kfree(&pf->pdev->dev, pf->first_sw);
2985err_msix_misc_unroll:
2986 ice_free_irq_msix_misc(pf);
2987err_init_interrupt_unroll:
2988 ice_clear_interrupt_scheme(pf);
2989 devm_kfree(dev, pf->vsi);
2990err_init_pf_unroll:
2991 ice_deinit_pf(pf);
2992 ice_deinit_hw(hw);
2993err_exit_unroll:
2994 pci_disable_pcie_error_reporting(pdev);
2995 return err;
2996}
2997
2998
2999
3000
3001
3002static void ice_remove(struct pci_dev *pdev)
3003{
3004 struct ice_pf *pf = pci_get_drvdata(pdev);
3005 int i;
3006
3007 if (!pf)
3008 return;
3009
3010 for (i = 0; i < ICE_MAX_RESET_WAIT; i++) {
3011 if (!ice_is_reset_in_progress(pf->state))
3012 break;
3013 msleep(100);
3014 }
3015
3016 set_bit(__ICE_DOWN, pf->state);
3017 ice_service_task_stop(pf);
3018
3019 if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags))
3020 ice_free_vfs(pf);
3021 ice_vsi_release_all(pf);
3022 ice_free_irq_msix_misc(pf);
3023 ice_for_each_vsi(pf, i) {
3024 if (!pf->vsi[i])
3025 continue;
3026 ice_vsi_free_q_vectors(pf->vsi[i]);
3027 }
3028 ice_deinit_pf(pf);
3029 ice_deinit_hw(&pf->hw);
3030 ice_clear_interrupt_scheme(pf);
3031
3032
3033
3034
3035 ice_reset(&pf->hw, ICE_RESET_PFR);
3036 pci_disable_pcie_error_reporting(pdev);
3037}
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047static pci_ers_result_t
3048ice_pci_err_detected(struct pci_dev *pdev, enum pci_channel_state err)
3049{
3050 struct ice_pf *pf = pci_get_drvdata(pdev);
3051
3052 if (!pf) {
3053 dev_err(&pdev->dev, "%s: unrecoverable device error %d\n",
3054 __func__, err);
3055 return PCI_ERS_RESULT_DISCONNECT;
3056 }
3057
3058 if (!test_bit(__ICE_SUSPENDED, pf->state)) {
3059 ice_service_task_stop(pf);
3060
3061 if (!test_bit(__ICE_PREPARED_FOR_RESET, pf->state)) {
3062 set_bit(__ICE_PFR_REQ, pf->state);
3063 ice_prepare_for_reset(pf);
3064 }
3065 }
3066
3067 return PCI_ERS_RESULT_NEED_RESET;
3068}
3069
3070
3071
3072
3073
3074
3075
3076
3077static pci_ers_result_t ice_pci_err_slot_reset(struct pci_dev *pdev)
3078{
3079 struct ice_pf *pf = pci_get_drvdata(pdev);
3080 pci_ers_result_t result;
3081 int err;
3082 u32 reg;
3083
3084 err = pci_enable_device_mem(pdev);
3085 if (err) {
3086 dev_err(&pdev->dev,
3087 "Cannot re-enable PCI device after reset, error %d\n",
3088 err);
3089 result = PCI_ERS_RESULT_DISCONNECT;
3090 } else {
3091 pci_set_master(pdev);
3092 pci_restore_state(pdev);
3093 pci_save_state(pdev);
3094 pci_wake_from_d3(pdev, false);
3095
3096
3097 reg = rd32(&pf->hw, GLGEN_RTRIG);
3098 if (!reg)
3099 result = PCI_ERS_RESULT_RECOVERED;
3100 else
3101 result = PCI_ERS_RESULT_DISCONNECT;
3102 }
3103
3104 err = pci_cleanup_aer_uncorrect_error_status(pdev);
3105 if (err)
3106 dev_dbg(&pdev->dev,
3107 "pci_cleanup_aer_uncorrect_error_status failed, error %d\n",
3108 err);
3109
3110
3111 return result;
3112}
3113
3114
3115
3116
3117
3118
3119
3120
3121static void ice_pci_err_resume(struct pci_dev *pdev)
3122{
3123 struct ice_pf *pf = pci_get_drvdata(pdev);
3124
3125 if (!pf) {
3126 dev_err(&pdev->dev,
3127 "%s failed, device is unrecoverable\n", __func__);
3128 return;
3129 }
3130
3131 if (test_bit(__ICE_SUSPENDED, pf->state)) {
3132 dev_dbg(&pdev->dev, "%s failed to resume normal operations!\n",
3133 __func__);
3134 return;
3135 }
3136
3137 ice_do_reset(pf, ICE_RESET_PFR);
3138 ice_service_task_restart(pf);
3139 mod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));
3140}
3141
3142
3143
3144
3145
3146static void ice_pci_err_reset_prepare(struct pci_dev *pdev)
3147{
3148 struct ice_pf *pf = pci_get_drvdata(pdev);
3149
3150 if (!test_bit(__ICE_SUSPENDED, pf->state)) {
3151 ice_service_task_stop(pf);
3152
3153 if (!test_bit(__ICE_PREPARED_FOR_RESET, pf->state)) {
3154 set_bit(__ICE_PFR_REQ, pf->state);
3155 ice_prepare_for_reset(pf);
3156 }
3157 }
3158}
3159
3160
3161
3162
3163
3164static void ice_pci_err_reset_done(struct pci_dev *pdev)
3165{
3166 ice_pci_err_resume(pdev);
3167}
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177static const struct pci_device_id ice_pci_tbl[] = {
3178 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_BACKPLANE), 0 },
3179 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_QSFP), 0 },
3180 { PCI_VDEVICE(INTEL, ICE_DEV_ID_E810C_SFP), 0 },
3181
3182 { 0, }
3183};
3184MODULE_DEVICE_TABLE(pci, ice_pci_tbl);
3185
3186static const struct pci_error_handlers ice_pci_err_handler = {
3187 .error_detected = ice_pci_err_detected,
3188 .slot_reset = ice_pci_err_slot_reset,
3189 .reset_prepare = ice_pci_err_reset_prepare,
3190 .reset_done = ice_pci_err_reset_done,
3191 .resume = ice_pci_err_resume
3192};
3193
3194static struct pci_driver ice_driver = {
3195 .name = KBUILD_MODNAME,
3196 .id_table = ice_pci_tbl,
3197 .probe = ice_probe,
3198 .remove = ice_remove,
3199 .sriov_configure = ice_sriov_configure,
3200 .err_handler = &ice_pci_err_handler
3201};
3202
3203
3204
3205
3206
3207
3208
3209static int __init ice_module_init(void)
3210{
3211 int status;
3212
3213 pr_info("%s - version %s\n", ice_driver_string, ice_drv_ver);
3214 pr_info("%s\n", ice_copyright);
3215
3216 ice_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, KBUILD_MODNAME);
3217 if (!ice_wq) {
3218 pr_err("Failed to create workqueue\n");
3219 return -ENOMEM;
3220 }
3221
3222 status = pci_register_driver(&ice_driver);
3223 if (status) {
3224 pr_err("failed to register PCI driver, err %d\n", status);
3225 destroy_workqueue(ice_wq);
3226 }
3227
3228 return status;
3229}
3230module_init(ice_module_init);
3231
3232
3233
3234
3235
3236
3237
3238static void __exit ice_module_exit(void)
3239{
3240 pci_unregister_driver(&ice_driver);
3241 destroy_workqueue(ice_wq);
3242 pr_info("module unloaded\n");
3243}
3244module_exit(ice_module_exit);
3245
3246
3247
3248
3249
3250
3251
3252
3253static int ice_set_mac_address(struct net_device *netdev, void *pi)
3254{
3255 struct ice_netdev_priv *np = netdev_priv(netdev);
3256 struct ice_vsi *vsi = np->vsi;
3257 struct ice_pf *pf = vsi->back;
3258 struct ice_hw *hw = &pf->hw;
3259 struct sockaddr *addr = pi;
3260 enum ice_status status;
3261 u8 flags = 0;
3262 int err = 0;
3263 u8 *mac;
3264
3265 mac = (u8 *)addr->sa_data;
3266
3267 if (!is_valid_ether_addr(mac))
3268 return -EADDRNOTAVAIL;
3269
3270 if (ether_addr_equal(netdev->dev_addr, mac)) {
3271 netdev_warn(netdev, "already using mac %pM\n", mac);
3272 return 0;
3273 }
3274
3275 if (test_bit(__ICE_DOWN, pf->state) ||
3276 ice_is_reset_in_progress(pf->state)) {
3277 netdev_err(netdev, "can't set mac %pM. device not ready\n",
3278 mac);
3279 return -EBUSY;
3280 }
3281
3282
3283
3284
3285
3286
3287
3288
3289 status = ice_vsi_cfg_mac_fltr(vsi, netdev->dev_addr, false);
3290 if (status) {
3291 err = -EADDRNOTAVAIL;
3292 goto err_update_filters;
3293 }
3294
3295 status = ice_vsi_cfg_mac_fltr(vsi, mac, true);
3296 if (status) {
3297 err = -EADDRNOTAVAIL;
3298 goto err_update_filters;
3299 }
3300
3301err_update_filters:
3302 if (err) {
3303 netdev_err(netdev, "can't set MAC %pM. filter update failed\n",
3304 mac);
3305 return err;
3306 }
3307
3308
3309 memcpy(netdev->dev_addr, mac, netdev->addr_len);
3310 netdev_dbg(vsi->netdev, "updated MAC address to %pM\n",
3311 netdev->dev_addr);
3312
3313
3314 flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
3315 status = ice_aq_manage_mac_write(hw, mac, flags, NULL);
3316 if (status) {
3317 netdev_err(netdev, "can't set MAC %pM. write to firmware failed error %d\n",
3318 mac, status);
3319 }
3320 return 0;
3321}
3322
3323
3324
3325
3326
3327static void ice_set_rx_mode(struct net_device *netdev)
3328{
3329 struct ice_netdev_priv *np = netdev_priv(netdev);
3330 struct ice_vsi *vsi = np->vsi;
3331
3332 if (!vsi)
3333 return;
3334
3335
3336
3337
3338
3339 set_bit(ICE_VSI_FLAG_UMAC_FLTR_CHANGED, vsi->flags);
3340 set_bit(ICE_VSI_FLAG_MMAC_FLTR_CHANGED, vsi->flags);
3341 set_bit(ICE_FLAG_FLTR_SYNC, vsi->back->flags);
3342
3343
3344
3345
3346 ice_service_task_schedule(vsi->back);
3347}
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359static int
3360ice_fdb_add(struct ndmsg *ndm, struct nlattr __always_unused *tb[],
3361 struct net_device *dev, const unsigned char *addr, u16 vid,
3362 u16 flags, struct netlink_ext_ack __always_unused *extack)
3363{
3364 int err;
3365
3366 if (vid) {
3367 netdev_err(dev, "VLANs aren't supported yet for dev_uc|mc_add()\n");
3368 return -EINVAL;
3369 }
3370 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
3371 netdev_err(dev, "FDB only supports static addresses\n");
3372 return -EINVAL;
3373 }
3374
3375 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
3376 err = dev_uc_add_excl(dev, addr);
3377 else if (is_multicast_ether_addr(addr))
3378 err = dev_mc_add_excl(dev, addr);
3379 else
3380 err = -EINVAL;
3381
3382
3383 if (err == -EEXIST && !(flags & NLM_F_EXCL))
3384 err = 0;
3385
3386 return err;
3387}
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397static int
3398ice_fdb_del(struct ndmsg *ndm, __always_unused struct nlattr *tb[],
3399 struct net_device *dev, const unsigned char *addr,
3400 __always_unused u16 vid)
3401{
3402 int err;
3403
3404 if (ndm->ndm_state & NUD_PERMANENT) {
3405 netdev_err(dev, "FDB only supports static addresses\n");
3406 return -EINVAL;
3407 }
3408
3409 if (is_unicast_ether_addr(addr))
3410 err = dev_uc_del(dev, addr);
3411 else if (is_multicast_ether_addr(addr))
3412 err = dev_mc_del(dev, addr);
3413 else
3414 err = -EINVAL;
3415
3416 return err;
3417}
3418
3419
3420
3421
3422
3423
3424static int
3425ice_set_features(struct net_device *netdev, netdev_features_t features)
3426{
3427 struct ice_netdev_priv *np = netdev_priv(netdev);
3428 struct ice_vsi *vsi = np->vsi;
3429 int ret = 0;
3430
3431
3432 if (ice_is_safe_mode(vsi->back)) {
3433 dev_err(&vsi->back->pdev->dev,
3434 "Device is in Safe Mode - not enabling advanced netdev features\n");
3435 return ret;
3436 }
3437
3438
3439
3440
3441 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
3442 ret = ice_vsi_manage_rss_lut(vsi, true);
3443 else if (!(features & NETIF_F_RXHASH) &&
3444 netdev->features & NETIF_F_RXHASH)
3445 ret = ice_vsi_manage_rss_lut(vsi, false);
3446
3447 if ((features & NETIF_F_HW_VLAN_CTAG_RX) &&
3448 !(netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
3449 ret = ice_vsi_manage_vlan_stripping(vsi, true);
3450 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) &&
3451 (netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
3452 ret = ice_vsi_manage_vlan_stripping(vsi, false);
3453
3454 if ((features & NETIF_F_HW_VLAN_CTAG_TX) &&
3455 !(netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
3456 ret = ice_vsi_manage_vlan_insertion(vsi);
3457 else if (!(features & NETIF_F_HW_VLAN_CTAG_TX) &&
3458 (netdev->features & NETIF_F_HW_VLAN_CTAG_TX))
3459 ret = ice_vsi_manage_vlan_insertion(vsi);
3460
3461 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
3462 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
3463 ret = ice_cfg_vlan_pruning(vsi, true, false);
3464 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) &&
3465 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
3466 ret = ice_cfg_vlan_pruning(vsi, false, false);
3467
3468 return ret;
3469}
3470
3471
3472
3473
3474
3475static int ice_vsi_vlan_setup(struct ice_vsi *vsi)
3476{
3477 int ret = 0;
3478
3479 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3480 ret = ice_vsi_manage_vlan_stripping(vsi, true);
3481 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)
3482 ret = ice_vsi_manage_vlan_insertion(vsi);
3483
3484 return ret;
3485}
3486
3487
3488
3489
3490
3491
3492
3493int ice_vsi_cfg(struct ice_vsi *vsi)
3494{
3495 int err;
3496
3497 if (vsi->netdev) {
3498 ice_set_rx_mode(vsi->netdev);
3499
3500 err = ice_vsi_vlan_setup(vsi);
3501
3502 if (err)
3503 return err;
3504 }
3505 ice_vsi_cfg_dcb_rings(vsi);
3506
3507 err = ice_vsi_cfg_lan_txqs(vsi);
3508 if (!err)
3509 err = ice_vsi_cfg_rxqs(vsi);
3510
3511 return err;
3512}
3513
3514
3515
3516
3517
3518static void ice_napi_enable_all(struct ice_vsi *vsi)
3519{
3520 int q_idx;
3521
3522 if (!vsi->netdev)
3523 return;
3524
3525 ice_for_each_q_vector(vsi, q_idx) {
3526 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
3527
3528 if (q_vector->rx.ring || q_vector->tx.ring)
3529 napi_enable(&q_vector->napi);
3530 }
3531}
3532
3533
3534
3535
3536
3537
3538
3539static int ice_up_complete(struct ice_vsi *vsi)
3540{
3541 struct ice_pf *pf = vsi->back;
3542 int err;
3543
3544 ice_vsi_cfg_msix(vsi);
3545
3546
3547
3548
3549
3550 err = ice_vsi_start_rx_rings(vsi);
3551 if (err)
3552 return err;
3553
3554 clear_bit(__ICE_DOWN, vsi->state);
3555 ice_napi_enable_all(vsi);
3556 ice_vsi_ena_irq(vsi);
3557
3558 if (vsi->port_info &&
3559 (vsi->port_info->phy.link_info.link_info & ICE_AQ_LINK_UP) &&
3560 vsi->netdev) {
3561 ice_print_link_msg(vsi, true);
3562 netif_tx_start_all_queues(vsi->netdev);
3563 netif_carrier_on(vsi->netdev);
3564 }
3565
3566 ice_service_task_schedule(pf);
3567
3568 return 0;
3569}
3570
3571
3572
3573
3574
3575int ice_up(struct ice_vsi *vsi)
3576{
3577 int err;
3578
3579 err = ice_vsi_cfg(vsi);
3580 if (!err)
3581 err = ice_up_complete(vsi);
3582
3583 return err;
3584}
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595static void
3596ice_fetch_u64_stats_per_ring(struct ice_ring *ring, u64 *pkts, u64 *bytes)
3597{
3598 unsigned int start;
3599 *pkts = 0;
3600 *bytes = 0;
3601
3602 if (!ring)
3603 return;
3604 do {
3605 start = u64_stats_fetch_begin_irq(&ring->syncp);
3606 *pkts = ring->stats.pkts;
3607 *bytes = ring->stats.bytes;
3608 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
3609}
3610
3611
3612
3613
3614
3615static void ice_update_vsi_ring_stats(struct ice_vsi *vsi)
3616{
3617 struct rtnl_link_stats64 *vsi_stats = &vsi->net_stats;
3618 struct ice_ring *ring;
3619 u64 pkts, bytes;
3620 int i;
3621
3622
3623 vsi_stats->tx_packets = 0;
3624 vsi_stats->tx_bytes = 0;
3625 vsi_stats->rx_packets = 0;
3626 vsi_stats->rx_bytes = 0;
3627
3628
3629 vsi->tx_restart = 0;
3630 vsi->tx_busy = 0;
3631 vsi->tx_linearize = 0;
3632 vsi->rx_buf_failed = 0;
3633 vsi->rx_page_failed = 0;
3634
3635 rcu_read_lock();
3636
3637
3638 ice_for_each_txq(vsi, i) {
3639 ring = READ_ONCE(vsi->tx_rings[i]);
3640 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
3641 vsi_stats->tx_packets += pkts;
3642 vsi_stats->tx_bytes += bytes;
3643 vsi->tx_restart += ring->tx_stats.restart_q;
3644 vsi->tx_busy += ring->tx_stats.tx_busy;
3645 vsi->tx_linearize += ring->tx_stats.tx_linearize;
3646 }
3647
3648
3649 ice_for_each_rxq(vsi, i) {
3650 ring = READ_ONCE(vsi->rx_rings[i]);
3651 ice_fetch_u64_stats_per_ring(ring, &pkts, &bytes);
3652 vsi_stats->rx_packets += pkts;
3653 vsi_stats->rx_bytes += bytes;
3654 vsi->rx_buf_failed += ring->rx_stats.alloc_buf_failed;
3655 vsi->rx_page_failed += ring->rx_stats.alloc_page_failed;
3656 }
3657
3658 rcu_read_unlock();
3659}
3660
3661
3662
3663
3664
3665void ice_update_vsi_stats(struct ice_vsi *vsi)
3666{
3667 struct rtnl_link_stats64 *cur_ns = &vsi->net_stats;
3668 struct ice_eth_stats *cur_es = &vsi->eth_stats;
3669 struct ice_pf *pf = vsi->back;
3670
3671 if (test_bit(__ICE_DOWN, vsi->state) ||
3672 test_bit(__ICE_CFG_BUSY, pf->state))
3673 return;
3674
3675
3676 ice_update_vsi_ring_stats(vsi);
3677
3678
3679 ice_update_eth_stats(vsi);
3680
3681 cur_ns->tx_errors = cur_es->tx_errors;
3682 cur_ns->rx_dropped = cur_es->rx_discards;
3683 cur_ns->tx_dropped = cur_es->tx_discards;
3684 cur_ns->multicast = cur_es->rx_multicast;
3685
3686
3687 if (vsi->type == ICE_VSI_PF) {
3688 cur_ns->rx_crc_errors = pf->stats.crc_errors;
3689 cur_ns->rx_errors = pf->stats.crc_errors +
3690 pf->stats.illegal_bytes;
3691 cur_ns->rx_length_errors = pf->stats.rx_len_errors;
3692
3693 cur_ns->rx_missed_errors = pf->stats.eth.rx_discards;
3694 }
3695}
3696
3697
3698
3699
3700
3701void ice_update_pf_stats(struct ice_pf *pf)
3702{
3703 struct ice_hw_port_stats *prev_ps, *cur_ps;
3704 struct ice_hw *hw = &pf->hw;
3705 u8 port;
3706
3707 port = hw->port_info->lport;
3708 prev_ps = &pf->stats_prev;
3709 cur_ps = &pf->stats;
3710
3711 ice_stat_update40(hw, GLPRT_GORCL(port), pf->stat_prev_loaded,
3712 &prev_ps->eth.rx_bytes,
3713 &cur_ps->eth.rx_bytes);
3714
3715 ice_stat_update40(hw, GLPRT_UPRCL(port), pf->stat_prev_loaded,
3716 &prev_ps->eth.rx_unicast,
3717 &cur_ps->eth.rx_unicast);
3718
3719 ice_stat_update40(hw, GLPRT_MPRCL(port), pf->stat_prev_loaded,
3720 &prev_ps->eth.rx_multicast,
3721 &cur_ps->eth.rx_multicast);
3722
3723 ice_stat_update40(hw, GLPRT_BPRCL(port), pf->stat_prev_loaded,
3724 &prev_ps->eth.rx_broadcast,
3725 &cur_ps->eth.rx_broadcast);
3726
3727 ice_stat_update32(hw, PRTRPB_RDPC, pf->stat_prev_loaded,
3728 &prev_ps->eth.rx_discards,
3729 &cur_ps->eth.rx_discards);
3730
3731 ice_stat_update40(hw, GLPRT_GOTCL(port), pf->stat_prev_loaded,
3732 &prev_ps->eth.tx_bytes,
3733 &cur_ps->eth.tx_bytes);
3734
3735 ice_stat_update40(hw, GLPRT_UPTCL(port), pf->stat_prev_loaded,
3736 &prev_ps->eth.tx_unicast,
3737 &cur_ps->eth.tx_unicast);
3738
3739 ice_stat_update40(hw, GLPRT_MPTCL(port), pf->stat_prev_loaded,
3740 &prev_ps->eth.tx_multicast,
3741 &cur_ps->eth.tx_multicast);
3742
3743 ice_stat_update40(hw, GLPRT_BPTCL(port), pf->stat_prev_loaded,
3744 &prev_ps->eth.tx_broadcast,
3745 &cur_ps->eth.tx_broadcast);
3746
3747 ice_stat_update32(hw, GLPRT_TDOLD(port), pf->stat_prev_loaded,
3748 &prev_ps->tx_dropped_link_down,
3749 &cur_ps->tx_dropped_link_down);
3750
3751 ice_stat_update40(hw, GLPRT_PRC64L(port), pf->stat_prev_loaded,
3752 &prev_ps->rx_size_64, &cur_ps->rx_size_64);
3753
3754 ice_stat_update40(hw, GLPRT_PRC127L(port), pf->stat_prev_loaded,
3755 &prev_ps->rx_size_127, &cur_ps->rx_size_127);
3756
3757 ice_stat_update40(hw, GLPRT_PRC255L(port), pf->stat_prev_loaded,
3758 &prev_ps->rx_size_255, &cur_ps->rx_size_255);
3759
3760 ice_stat_update40(hw, GLPRT_PRC511L(port), pf->stat_prev_loaded,
3761 &prev_ps->rx_size_511, &cur_ps->rx_size_511);
3762
3763 ice_stat_update40(hw, GLPRT_PRC1023L(port), pf->stat_prev_loaded,
3764 &prev_ps->rx_size_1023, &cur_ps->rx_size_1023);
3765
3766 ice_stat_update40(hw, GLPRT_PRC1522L(port), pf->stat_prev_loaded,
3767 &prev_ps->rx_size_1522, &cur_ps->rx_size_1522);
3768
3769 ice_stat_update40(hw, GLPRT_PRC9522L(port), pf->stat_prev_loaded,
3770 &prev_ps->rx_size_big, &cur_ps->rx_size_big);
3771
3772 ice_stat_update40(hw, GLPRT_PTC64L(port), pf->stat_prev_loaded,
3773 &prev_ps->tx_size_64, &cur_ps->tx_size_64);
3774
3775 ice_stat_update40(hw, GLPRT_PTC127L(port), pf->stat_prev_loaded,
3776 &prev_ps->tx_size_127, &cur_ps->tx_size_127);
3777
3778 ice_stat_update40(hw, GLPRT_PTC255L(port), pf->stat_prev_loaded,
3779 &prev_ps->tx_size_255, &cur_ps->tx_size_255);
3780
3781 ice_stat_update40(hw, GLPRT_PTC511L(port), pf->stat_prev_loaded,
3782 &prev_ps->tx_size_511, &cur_ps->tx_size_511);
3783
3784 ice_stat_update40(hw, GLPRT_PTC1023L(port), pf->stat_prev_loaded,
3785 &prev_ps->tx_size_1023, &cur_ps->tx_size_1023);
3786
3787 ice_stat_update40(hw, GLPRT_PTC1522L(port), pf->stat_prev_loaded,
3788 &prev_ps->tx_size_1522, &cur_ps->tx_size_1522);
3789
3790 ice_stat_update40(hw, GLPRT_PTC9522L(port), pf->stat_prev_loaded,
3791 &prev_ps->tx_size_big, &cur_ps->tx_size_big);
3792
3793 ice_stat_update32(hw, GLPRT_LXONRXC(port), pf->stat_prev_loaded,
3794 &prev_ps->link_xon_rx, &cur_ps->link_xon_rx);
3795
3796 ice_stat_update32(hw, GLPRT_LXOFFRXC(port), pf->stat_prev_loaded,
3797 &prev_ps->link_xoff_rx, &cur_ps->link_xoff_rx);
3798
3799 ice_stat_update32(hw, GLPRT_LXONTXC(port), pf->stat_prev_loaded,
3800 &prev_ps->link_xon_tx, &cur_ps->link_xon_tx);
3801
3802 ice_stat_update32(hw, GLPRT_LXOFFTXC(port), pf->stat_prev_loaded,
3803 &prev_ps->link_xoff_tx, &cur_ps->link_xoff_tx);
3804
3805 ice_update_dcb_stats(pf);
3806
3807 ice_stat_update32(hw, GLPRT_CRCERRS(port), pf->stat_prev_loaded,
3808 &prev_ps->crc_errors, &cur_ps->crc_errors);
3809
3810 ice_stat_update32(hw, GLPRT_ILLERRC(port), pf->stat_prev_loaded,
3811 &prev_ps->illegal_bytes, &cur_ps->illegal_bytes);
3812
3813 ice_stat_update32(hw, GLPRT_MLFC(port), pf->stat_prev_loaded,
3814 &prev_ps->mac_local_faults,
3815 &cur_ps->mac_local_faults);
3816
3817 ice_stat_update32(hw, GLPRT_MRFC(port), pf->stat_prev_loaded,
3818 &prev_ps->mac_remote_faults,
3819 &cur_ps->mac_remote_faults);
3820
3821 ice_stat_update32(hw, GLPRT_RLEC(port), pf->stat_prev_loaded,
3822 &prev_ps->rx_len_errors, &cur_ps->rx_len_errors);
3823
3824 ice_stat_update32(hw, GLPRT_RUC(port), pf->stat_prev_loaded,
3825 &prev_ps->rx_undersize, &cur_ps->rx_undersize);
3826
3827 ice_stat_update32(hw, GLPRT_RFC(port), pf->stat_prev_loaded,
3828 &prev_ps->rx_fragments, &cur_ps->rx_fragments);
3829
3830 ice_stat_update32(hw, GLPRT_ROC(port), pf->stat_prev_loaded,
3831 &prev_ps->rx_oversize, &cur_ps->rx_oversize);
3832
3833 ice_stat_update32(hw, GLPRT_RJC(port), pf->stat_prev_loaded,
3834 &prev_ps->rx_jabber, &cur_ps->rx_jabber);
3835
3836 pf->stat_prev_loaded = true;
3837}
3838
3839
3840
3841
3842
3843
3844static
3845void ice_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
3846{
3847 struct ice_netdev_priv *np = netdev_priv(netdev);
3848 struct rtnl_link_stats64 *vsi_stats;
3849 struct ice_vsi *vsi = np->vsi;
3850
3851 vsi_stats = &vsi->net_stats;
3852
3853 if (!vsi->num_txq || !vsi->num_rxq)
3854 return;
3855
3856
3857
3858
3859
3860
3861 if (!test_bit(__ICE_DOWN, vsi->state))
3862 ice_update_vsi_ring_stats(vsi);
3863 stats->tx_packets = vsi_stats->tx_packets;
3864 stats->tx_bytes = vsi_stats->tx_bytes;
3865 stats->rx_packets = vsi_stats->rx_packets;
3866 stats->rx_bytes = vsi_stats->rx_bytes;
3867
3868
3869
3870
3871
3872 stats->multicast = vsi_stats->multicast;
3873 stats->tx_errors = vsi_stats->tx_errors;
3874 stats->tx_dropped = vsi_stats->tx_dropped;
3875 stats->rx_errors = vsi_stats->rx_errors;
3876 stats->rx_dropped = vsi_stats->rx_dropped;
3877 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
3878 stats->rx_length_errors = vsi_stats->rx_length_errors;
3879}
3880
3881
3882
3883
3884
3885static void ice_napi_disable_all(struct ice_vsi *vsi)
3886{
3887 int q_idx;
3888
3889 if (!vsi->netdev)
3890 return;
3891
3892 ice_for_each_q_vector(vsi, q_idx) {
3893 struct ice_q_vector *q_vector = vsi->q_vectors[q_idx];
3894
3895 if (q_vector->rx.ring || q_vector->tx.ring)
3896 napi_disable(&q_vector->napi);
3897 }
3898}
3899
3900
3901
3902
3903
3904int ice_down(struct ice_vsi *vsi)
3905{
3906 int i, tx_err, rx_err, link_err = 0;
3907
3908
3909
3910
3911 if (vsi->netdev) {
3912 netif_carrier_off(vsi->netdev);
3913 netif_tx_disable(vsi->netdev);
3914 }
3915
3916 ice_vsi_dis_irq(vsi);
3917
3918 tx_err = ice_vsi_stop_lan_tx_rings(vsi, ICE_NO_RESET, 0);
3919 if (tx_err)
3920 netdev_err(vsi->netdev,
3921 "Failed stop Tx rings, VSI %d error %d\n",
3922 vsi->vsi_num, tx_err);
3923
3924 rx_err = ice_vsi_stop_rx_rings(vsi);
3925 if (rx_err)
3926 netdev_err(vsi->netdev,
3927 "Failed stop Rx rings, VSI %d error %d\n",
3928 vsi->vsi_num, rx_err);
3929
3930 ice_napi_disable_all(vsi);
3931
3932 if (test_bit(ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags)) {
3933 link_err = ice_force_phys_link_state(vsi, false);
3934 if (link_err)
3935 netdev_err(vsi->netdev,
3936 "Failed to set physical link down, VSI %d error %d\n",
3937 vsi->vsi_num, link_err);
3938 }
3939
3940 ice_for_each_txq(vsi, i)
3941 ice_clean_tx_ring(vsi->tx_rings[i]);
3942
3943 ice_for_each_rxq(vsi, i)
3944 ice_clean_rx_ring(vsi->rx_rings[i]);
3945
3946 if (tx_err || rx_err || link_err) {
3947 netdev_err(vsi->netdev,
3948 "Failed to close VSI 0x%04X on switch 0x%04X\n",
3949 vsi->vsi_num, vsi->vsw->sw_id);
3950 return -EIO;
3951 }
3952
3953 return 0;
3954}
3955
3956
3957
3958
3959
3960
3961
3962int ice_vsi_setup_tx_rings(struct ice_vsi *vsi)
3963{
3964 int i, err = 0;
3965
3966 if (!vsi->num_txq) {
3967 dev_err(&vsi->back->pdev->dev, "VSI %d has 0 Tx queues\n",
3968 vsi->vsi_num);
3969 return -EINVAL;
3970 }
3971
3972 ice_for_each_txq(vsi, i) {
3973 vsi->tx_rings[i]->netdev = vsi->netdev;
3974 err = ice_setup_tx_ring(vsi->tx_rings[i]);
3975 if (err)
3976 break;
3977 }
3978
3979 return err;
3980}
3981
3982
3983
3984
3985
3986
3987
3988int ice_vsi_setup_rx_rings(struct ice_vsi *vsi)
3989{
3990 int i, err = 0;
3991
3992 if (!vsi->num_rxq) {
3993 dev_err(&vsi->back->pdev->dev, "VSI %d has 0 Rx queues\n",
3994 vsi->vsi_num);
3995 return -EINVAL;
3996 }
3997
3998 ice_for_each_rxq(vsi, i) {
3999 vsi->rx_rings[i]->netdev = vsi->netdev;
4000 err = ice_setup_rx_ring(vsi->rx_rings[i]);
4001 if (err)
4002 break;
4003 }
4004
4005 return err;
4006}
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016static int ice_vsi_open(struct ice_vsi *vsi)
4017{
4018 char int_name[ICE_INT_NAME_STR_LEN];
4019 struct ice_pf *pf = vsi->back;
4020 int err;
4021
4022
4023 err = ice_vsi_setup_tx_rings(vsi);
4024 if (err)
4025 goto err_setup_tx;
4026
4027 err = ice_vsi_setup_rx_rings(vsi);
4028 if (err)
4029 goto err_setup_rx;
4030
4031 err = ice_vsi_cfg(vsi);
4032 if (err)
4033 goto err_setup_rx;
4034
4035 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4036 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4037 err = ice_vsi_req_irq_msix(vsi, int_name);
4038 if (err)
4039 goto err_setup_rx;
4040
4041
4042 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_txq);
4043 if (err)
4044 goto err_set_qs;
4045
4046 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_rxq);
4047 if (err)
4048 goto err_set_qs;
4049
4050 err = ice_up_complete(vsi);
4051 if (err)
4052 goto err_up_complete;
4053
4054 return 0;
4055
4056err_up_complete:
4057 ice_down(vsi);
4058err_set_qs:
4059 ice_vsi_free_irq(vsi);
4060err_setup_rx:
4061 ice_vsi_free_rx_rings(vsi);
4062err_setup_tx:
4063 ice_vsi_free_tx_rings(vsi);
4064
4065 return err;
4066}
4067
4068
4069
4070
4071
4072static void ice_vsi_release_all(struct ice_pf *pf)
4073{
4074 int err, i;
4075
4076 if (!pf->vsi)
4077 return;
4078
4079 ice_for_each_vsi(pf, i) {
4080 if (!pf->vsi[i])
4081 continue;
4082
4083 err = ice_vsi_release(pf->vsi[i]);
4084 if (err)
4085 dev_dbg(&pf->pdev->dev,
4086 "Failed to release pf->vsi[%d], err %d, vsi_num = %d\n",
4087 i, err, pf->vsi[i]->vsi_num);
4088 }
4089}
4090
4091
4092
4093
4094
4095
4096static int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
4097{
4098 int err = 0;
4099
4100 if (!test_bit(__ICE_NEEDS_RESTART, vsi->state))
4101 return 0;
4102
4103 clear_bit(__ICE_NEEDS_RESTART, vsi->state);
4104
4105 if (vsi->netdev && vsi->type == ICE_VSI_PF) {
4106 if (netif_running(vsi->netdev)) {
4107 if (!locked)
4108 rtnl_lock();
4109
4110 err = ice_open(vsi->netdev);
4111
4112 if (!locked)
4113 rtnl_unlock();
4114 }
4115 }
4116
4117 return err;
4118}
4119
4120
4121
4122
4123
4124
4125#ifdef CONFIG_DCB
4126int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked)
4127{
4128 int v;
4129
4130 ice_for_each_vsi(pf, v)
4131 if (pf->vsi[v])
4132 if (ice_ena_vsi(pf->vsi[v], locked))
4133 return -EIO;
4134
4135 return 0;
4136}
4137#endif
4138
4139
4140
4141
4142
4143
4144
4145
4146static int ice_vsi_rebuild_by_type(struct ice_pf *pf, enum ice_vsi_type type)
4147{
4148 enum ice_status status;
4149 int i, err;
4150
4151 ice_for_each_vsi(pf, i) {
4152 struct ice_vsi *vsi = pf->vsi[i];
4153
4154 if (!vsi || vsi->type != type)
4155 continue;
4156
4157
4158 err = ice_vsi_rebuild(vsi);
4159 if (err) {
4160 dev_err(&pf->pdev->dev,
4161 "rebuild VSI failed, err %d, VSI index %d, type %d\n",
4162 err, vsi->idx, type);
4163 return err;
4164 }
4165
4166
4167 status = ice_replay_vsi(&pf->hw, vsi->idx);
4168 if (status) {
4169 dev_err(&pf->pdev->dev,
4170 "replay VSI failed, status %d, VSI index %d, type %d\n",
4171 status, vsi->idx, type);
4172 return -EIO;
4173 }
4174
4175
4176
4177
4178 vsi->vsi_num = ice_get_hw_vsi_num(&pf->hw, vsi->idx);
4179
4180
4181 err = ice_ena_vsi(vsi, false);
4182 if (err) {
4183 dev_err(&pf->pdev->dev,
4184 "enable VSI failed, err %d, VSI index %d, type %d\n",
4185 err, vsi->idx, type);
4186 return err;
4187 }
4188
4189 dev_info(&pf->pdev->dev, "VSI rebuilt. VSI index %d, type %d\n",
4190 vsi->idx, type);
4191 }
4192
4193 return 0;
4194}
4195
4196
4197
4198
4199
4200static void ice_update_pf_netdev_link(struct ice_pf *pf)
4201{
4202 bool link_up;
4203 int i;
4204
4205 ice_for_each_vsi(pf, i) {
4206 struct ice_vsi *vsi = pf->vsi[i];
4207
4208 if (!vsi || vsi->type != ICE_VSI_PF)
4209 return;
4210
4211 ice_get_link_status(pf->vsi[i]->port_info, &link_up);
4212 if (link_up) {
4213 netif_carrier_on(pf->vsi[i]->netdev);
4214 netif_tx_wake_all_queues(pf->vsi[i]->netdev);
4215 } else {
4216 netif_carrier_off(pf->vsi[i]->netdev);
4217 netif_tx_stop_all_queues(pf->vsi[i]->netdev);
4218 }
4219 }
4220}
4221
4222
4223
4224
4225
4226
4227static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type)
4228{
4229 struct device *dev = &pf->pdev->dev;
4230 struct ice_hw *hw = &pf->hw;
4231 enum ice_status ret;
4232 int err;
4233
4234 if (test_bit(__ICE_DOWN, pf->state))
4235 goto clear_recovery;
4236
4237 dev_dbg(dev, "rebuilding PF after reset_type=%d\n", reset_type);
4238
4239 ret = ice_init_all_ctrlq(hw);
4240 if (ret) {
4241 dev_err(dev, "control queues init failed %d\n", ret);
4242 goto err_init_ctrlq;
4243 }
4244
4245
4246 if (!ice_is_safe_mode(pf)) {
4247
4248 if (reset_type == ICE_RESET_PFR)
4249 ice_fill_blk_tbls(hw);
4250 else
4251
4252 ice_load_pkg(NULL, pf);
4253 }
4254
4255 ret = ice_clear_pf_cfg(hw);
4256 if (ret) {
4257 dev_err(dev, "clear PF configuration failed %d\n", ret);
4258 goto err_init_ctrlq;
4259 }
4260
4261 ice_clear_pxe_mode(hw);
4262
4263 ret = ice_get_caps(hw);
4264 if (ret) {
4265 dev_err(dev, "ice_get_caps failed %d\n", ret);
4266 goto err_init_ctrlq;
4267 }
4268
4269 err = ice_sched_init_port(hw->port_info);
4270 if (err)
4271 goto err_sched_init_port;
4272
4273 err = ice_update_link_info(hw->port_info);
4274 if (err)
4275 dev_err(&pf->pdev->dev, "Get link status error %d\n", err);
4276
4277
4278 err = ice_req_irq_msix_misc(pf);
4279 if (err) {
4280 dev_err(dev, "misc vector setup failed: %d\n", err);
4281 goto err_sched_init_port;
4282 }
4283
4284 if (test_bit(ICE_FLAG_DCB_ENA, pf->flags))
4285 ice_dcb_rebuild(pf);
4286
4287
4288 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_PF);
4289 if (err) {
4290 dev_err(dev, "PF VSI rebuild failed: %d\n", err);
4291 goto err_vsi_rebuild;
4292 }
4293
4294 if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) {
4295 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_VF);
4296 if (err) {
4297 dev_err(dev, "VF VSI rebuild failed: %d\n", err);
4298 goto err_vsi_rebuild;
4299 }
4300 }
4301
4302 ice_update_pf_netdev_link(pf);
4303
4304
4305 ret = ice_send_version(pf);
4306 if (ret) {
4307 dev_err(dev,
4308 "Rebuild failed due to error sending driver version: %d\n",
4309 ret);
4310 goto err_vsi_rebuild;
4311 }
4312
4313 ice_replay_post(hw);
4314
4315
4316 clear_bit(__ICE_RESET_FAILED, pf->state);
4317 return;
4318
4319err_vsi_rebuild:
4320err_sched_init_port:
4321 ice_sched_cleanup_all(hw);
4322err_init_ctrlq:
4323 ice_shutdown_all_ctrlq(hw);
4324 set_bit(__ICE_RESET_FAILED, pf->state);
4325clear_recovery:
4326
4327 set_bit(__ICE_NEEDS_RESTART, pf->state);
4328 dev_err(dev, "Rebuild failed, unload and reload driver\n");
4329}
4330
4331
4332
4333
4334
4335
4336
4337
4338static int ice_change_mtu(struct net_device *netdev, int new_mtu)
4339{
4340 struct ice_netdev_priv *np = netdev_priv(netdev);
4341 struct ice_vsi *vsi = np->vsi;
4342 struct ice_pf *pf = vsi->back;
4343 u8 count = 0;
4344
4345 if (new_mtu == netdev->mtu) {
4346 netdev_warn(netdev, "MTU is already %u\n", netdev->mtu);
4347 return 0;
4348 }
4349
4350 if (new_mtu < netdev->min_mtu) {
4351 netdev_err(netdev, "new MTU invalid. min_mtu is %d\n",
4352 netdev->min_mtu);
4353 return -EINVAL;
4354 } else if (new_mtu > netdev->max_mtu) {
4355 netdev_err(netdev, "new MTU invalid. max_mtu is %d\n",
4356 netdev->min_mtu);
4357 return -EINVAL;
4358 }
4359
4360 do {
4361 if (ice_is_reset_in_progress(pf->state)) {
4362 count++;
4363 usleep_range(1000, 2000);
4364 } else {
4365 break;
4366 }
4367
4368 } while (count < 100);
4369
4370 if (count == 100) {
4371 netdev_err(netdev, "can't change MTU. Device is busy\n");
4372 return -EBUSY;
4373 }
4374
4375 netdev->mtu = new_mtu;
4376
4377
4378 if (!test_and_set_bit(__ICE_DOWN, vsi->state)) {
4379 int err;
4380
4381 err = ice_down(vsi);
4382 if (err) {
4383 netdev_err(netdev, "change MTU if_up err %d\n", err);
4384 return err;
4385 }
4386
4387 err = ice_up(vsi);
4388 if (err) {
4389 netdev_err(netdev, "change MTU if_up err %d\n", err);
4390 return err;
4391 }
4392 }
4393
4394 netdev_info(netdev, "changed MTU to %d\n", new_mtu);
4395 return 0;
4396}
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
4408{
4409 struct ice_pf *pf = vsi->back;
4410 struct ice_hw *hw = &pf->hw;
4411 enum ice_status status;
4412
4413 if (seed) {
4414 struct ice_aqc_get_set_rss_keys *buf =
4415 (struct ice_aqc_get_set_rss_keys *)seed;
4416
4417 status = ice_aq_set_rss_key(hw, vsi->idx, buf);
4418
4419 if (status) {
4420 dev_err(&pf->pdev->dev,
4421 "Cannot set RSS key, err %d aq_err %d\n",
4422 status, hw->adminq.rq_last_status);
4423 return -EIO;
4424 }
4425 }
4426
4427 if (lut) {
4428 status = ice_aq_set_rss_lut(hw, vsi->idx, vsi->rss_lut_type,
4429 lut, lut_size);
4430 if (status) {
4431 dev_err(&pf->pdev->dev,
4432 "Cannot set RSS lut, err %d aq_err %d\n",
4433 status, hw->adminq.rq_last_status);
4434 return -EIO;
4435 }
4436 }
4437
4438 return 0;
4439}
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
4451{
4452 struct ice_pf *pf = vsi->back;
4453 struct ice_hw *hw = &pf->hw;
4454 enum ice_status status;
4455
4456 if (seed) {
4457 struct ice_aqc_get_set_rss_keys *buf =
4458 (struct ice_aqc_get_set_rss_keys *)seed;
4459
4460 status = ice_aq_get_rss_key(hw, vsi->idx, buf);
4461 if (status) {
4462 dev_err(&pf->pdev->dev,
4463 "Cannot get RSS key, err %d aq_err %d\n",
4464 status, hw->adminq.rq_last_status);
4465 return -EIO;
4466 }
4467 }
4468
4469 if (lut) {
4470 status = ice_aq_get_rss_lut(hw, vsi->idx, vsi->rss_lut_type,
4471 lut, lut_size);
4472 if (status) {
4473 dev_err(&pf->pdev->dev,
4474 "Cannot get RSS lut, err %d aq_err %d\n",
4475 status, hw->adminq.rq_last_status);
4476 return -EIO;
4477 }
4478 }
4479
4480 return 0;
4481}
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494static int
4495ice_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
4496 struct net_device *dev, u32 filter_mask, int nlflags)
4497{
4498 struct ice_netdev_priv *np = netdev_priv(dev);
4499 struct ice_vsi *vsi = np->vsi;
4500 struct ice_pf *pf = vsi->back;
4501 u16 bmode;
4502
4503 bmode = pf->first_sw->bridge_mode;
4504
4505 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bmode, 0, 0, nlflags,
4506 filter_mask, NULL);
4507}
4508
4509
4510
4511
4512
4513
4514
4515
4516static int ice_vsi_update_bridge_mode(struct ice_vsi *vsi, u16 bmode)
4517{
4518 struct device *dev = &vsi->back->pdev->dev;
4519 struct ice_aqc_vsi_props *vsi_props;
4520 struct ice_hw *hw = &vsi->back->hw;
4521 struct ice_vsi_ctx *ctxt;
4522 enum ice_status status;
4523 int ret = 0;
4524
4525 vsi_props = &vsi->info;
4526
4527 ctxt = devm_kzalloc(dev, sizeof(*ctxt), GFP_KERNEL);
4528 if (!ctxt)
4529 return -ENOMEM;
4530
4531 ctxt->info = vsi->info;
4532
4533 if (bmode == BRIDGE_MODE_VEB)
4534
4535 ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
4536 else
4537
4538 ctxt->info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
4539 ctxt->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
4540
4541 status = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
4542 if (status) {
4543 dev_err(dev, "update VSI for bridge mode failed, bmode = %d err %d aq_err %d\n",
4544 bmode, status, hw->adminq.sq_last_status);
4545 ret = -EIO;
4546 goto out;
4547 }
4548
4549 vsi_props->sw_flags = ctxt->info.sw_flags;
4550
4551out:
4552 devm_kfree(dev, ctxt);
4553 return ret;
4554}
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568static int
4569ice_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,
4570 u16 __always_unused flags,
4571 struct netlink_ext_ack __always_unused *extack)
4572{
4573 struct ice_netdev_priv *np = netdev_priv(dev);
4574 struct ice_pf *pf = np->vsi->back;
4575 struct nlattr *attr, *br_spec;
4576 struct ice_hw *hw = &pf->hw;
4577 enum ice_status status;
4578 struct ice_sw *pf_sw;
4579 int rem, v, err = 0;
4580
4581 pf_sw = pf->first_sw;
4582
4583 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
4584
4585 nla_for_each_nested(attr, br_spec, rem) {
4586 __u16 mode;
4587
4588 if (nla_type(attr) != IFLA_BRIDGE_MODE)
4589 continue;
4590 mode = nla_get_u16(attr);
4591 if (mode != BRIDGE_MODE_VEPA && mode != BRIDGE_MODE_VEB)
4592 return -EINVAL;
4593
4594 if (mode == pf_sw->bridge_mode)
4595 continue;
4596
4597
4598
4599 ice_for_each_vsi(pf, v) {
4600 if (!pf->vsi[v])
4601 continue;
4602 err = ice_vsi_update_bridge_mode(pf->vsi[v], mode);
4603 if (err)
4604 return err;
4605 }
4606
4607 hw->evb_veb = (mode == BRIDGE_MODE_VEB);
4608
4609
4610
4611 status = ice_update_sw_rule_bridge_mode(hw);
4612 if (status) {
4613 netdev_err(dev, "switch rule update failed, mode = %d err %d aq_err %d\n",
4614 mode, status, hw->adminq.sq_last_status);
4615
4616 hw->evb_veb = (pf_sw->bridge_mode == BRIDGE_MODE_VEB);
4617 return -EIO;
4618 }
4619
4620 pf_sw->bridge_mode = mode;
4621 }
4622
4623 return 0;
4624}
4625
4626
4627
4628
4629
4630static void ice_tx_timeout(struct net_device *netdev)
4631{
4632 struct ice_netdev_priv *np = netdev_priv(netdev);
4633 struct ice_ring *tx_ring = NULL;
4634 struct ice_vsi *vsi = np->vsi;
4635 struct ice_pf *pf = vsi->back;
4636 int hung_queue = -1;
4637 u32 i;
4638
4639 pf->tx_timeout_count++;
4640
4641
4642 for (i = 0; i < netdev->num_tx_queues; i++) {
4643 unsigned long trans_start;
4644 struct netdev_queue *q;
4645
4646 q = netdev_get_tx_queue(netdev, i);
4647 trans_start = q->trans_start;
4648 if (netif_xmit_stopped(q) &&
4649 time_after(jiffies,
4650 trans_start + netdev->watchdog_timeo)) {
4651 hung_queue = i;
4652 break;
4653 }
4654 }
4655
4656 if (i == netdev->num_tx_queues)
4657 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
4658 else
4659
4660 for (i = 0; i < vsi->num_txq; i++)
4661 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
4662 if (hung_queue == vsi->tx_rings[i]->q_index) {
4663 tx_ring = vsi->tx_rings[i];
4664 break;
4665 }
4666
4667
4668
4669
4670 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ * 20)))
4671 pf->tx_timeout_recovery_level = 1;
4672 else if (time_before(jiffies, (pf->tx_timeout_last_recovery +
4673 netdev->watchdog_timeo)))
4674 return;
4675
4676 if (tx_ring) {
4677 struct ice_hw *hw = &pf->hw;
4678 u32 head, val = 0;
4679
4680 head = (rd32(hw, QTX_COMM_HEAD(vsi->txq_map[hung_queue])) &
4681 QTX_COMM_HEAD_HEAD_M) >> QTX_COMM_HEAD_HEAD_S;
4682
4683 val = rd32(hw, GLINT_DYN_CTL(tx_ring->q_vector->reg_idx));
4684
4685 netdev_info(netdev, "tx_timeout: VSI_num: %d, Q %d, NTC: 0x%x, HW_HEAD: 0x%x, NTU: 0x%x, INT: 0x%x\n",
4686 vsi->vsi_num, hung_queue, tx_ring->next_to_clean,
4687 head, tx_ring->next_to_use, val);
4688 }
4689
4690 pf->tx_timeout_last_recovery = jiffies;
4691 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
4692 pf->tx_timeout_recovery_level, hung_queue);
4693
4694 switch (pf->tx_timeout_recovery_level) {
4695 case 1:
4696 set_bit(__ICE_PFR_REQ, pf->state);
4697 break;
4698 case 2:
4699 set_bit(__ICE_CORER_REQ, pf->state);
4700 break;
4701 case 3:
4702 set_bit(__ICE_GLOBR_REQ, pf->state);
4703 break;
4704 default:
4705 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in unrecoverable state.\n");
4706 set_bit(__ICE_DOWN, pf->state);
4707 set_bit(__ICE_NEEDS_RESTART, vsi->state);
4708 set_bit(__ICE_SERVICE_DIS, pf->state);
4709 break;
4710 }
4711
4712 ice_service_task_schedule(pf);
4713 pf->tx_timeout_recovery_level++;
4714}
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728int ice_open(struct net_device *netdev)
4729{
4730 struct ice_netdev_priv *np = netdev_priv(netdev);
4731 struct ice_vsi *vsi = np->vsi;
4732 struct ice_port_info *pi;
4733 int err;
4734
4735 if (test_bit(__ICE_NEEDS_RESTART, vsi->back->state)) {
4736 netdev_err(netdev, "driver needs to be unloaded and reloaded\n");
4737 return -EIO;
4738 }
4739
4740 netif_carrier_off(netdev);
4741
4742 pi = vsi->port_info;
4743 err = ice_update_link_info(pi);
4744 if (err) {
4745 netdev_err(netdev, "Failed to get link info, error %d\n",
4746 err);
4747 return err;
4748 }
4749
4750
4751 if (pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) {
4752 err = ice_force_phys_link_state(vsi, true);
4753 if (err) {
4754 netdev_err(netdev,
4755 "Failed to set physical link up, error %d\n",
4756 err);
4757 return err;
4758 }
4759 } else {
4760 err = ice_aq_set_link_restart_an(pi, false, NULL);
4761 if (err) {
4762 netdev_err(netdev, "Failed to set PHY state, VSI %d error %d\n",
4763 vsi->vsi_num, err);
4764 return err;
4765 }
4766 set_bit(ICE_FLAG_NO_MEDIA, vsi->back->flags);
4767 }
4768
4769 err = ice_vsi_open(vsi);
4770 if (err)
4771 netdev_err(netdev, "Failed to open VSI 0x%04X on switch 0x%04X\n",
4772 vsi->vsi_num, vsi->vsw->sw_id);
4773 return err;
4774}
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785
4786int ice_stop(struct net_device *netdev)
4787{
4788 struct ice_netdev_priv *np = netdev_priv(netdev);
4789 struct ice_vsi *vsi = np->vsi;
4790
4791 ice_vsi_close(vsi);
4792
4793 return 0;
4794}
4795
4796
4797
4798
4799
4800
4801
4802static netdev_features_t
4803ice_features_check(struct sk_buff *skb,
4804 struct net_device __always_unused *netdev,
4805 netdev_features_t features)
4806{
4807 size_t len;
4808
4809
4810
4811
4812
4813 if (skb->ip_summed != CHECKSUM_PARTIAL)
4814 return features;
4815
4816
4817
4818
4819 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
4820 features &= ~NETIF_F_GSO_MASK;
4821
4822 len = skb_network_header(skb) - skb->data;
4823 if (len & ~(ICE_TXD_MACLEN_MAX))
4824 goto out_rm_features;
4825
4826 len = skb_transport_header(skb) - skb_network_header(skb);
4827 if (len & ~(ICE_TXD_IPLEN_MAX))
4828 goto out_rm_features;
4829
4830 if (skb->encapsulation) {
4831 len = skb_inner_network_header(skb) - skb_transport_header(skb);
4832 if (len & ~(ICE_TXD_L4LEN_MAX))
4833 goto out_rm_features;
4834
4835 len = skb_inner_transport_header(skb) -
4836 skb_inner_network_header(skb);
4837 if (len & ~(ICE_TXD_IPLEN_MAX))
4838 goto out_rm_features;
4839 }
4840
4841 return features;
4842out_rm_features:
4843 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
4844}
4845
4846static const struct net_device_ops ice_netdev_safe_mode_ops = {
4847 .ndo_open = ice_open,
4848 .ndo_stop = ice_stop,
4849 .ndo_start_xmit = ice_start_xmit,
4850 .ndo_set_mac_address = ice_set_mac_address,
4851 .ndo_validate_addr = eth_validate_addr,
4852 .ndo_change_mtu = ice_change_mtu,
4853 .ndo_get_stats64 = ice_get_stats64,
4854 .ndo_tx_timeout = ice_tx_timeout,
4855};
4856
4857static const struct net_device_ops ice_netdev_ops = {
4858 .ndo_open = ice_open,
4859 .ndo_stop = ice_stop,
4860 .ndo_start_xmit = ice_start_xmit,
4861 .ndo_features_check = ice_features_check,
4862 .ndo_set_rx_mode = ice_set_rx_mode,
4863 .ndo_set_mac_address = ice_set_mac_address,
4864 .ndo_validate_addr = eth_validate_addr,
4865 .ndo_change_mtu = ice_change_mtu,
4866 .ndo_get_stats64 = ice_get_stats64,
4867 .ndo_set_vf_spoofchk = ice_set_vf_spoofchk,
4868 .ndo_set_vf_mac = ice_set_vf_mac,
4869 .ndo_get_vf_config = ice_get_vf_cfg,
4870 .ndo_set_vf_trust = ice_set_vf_trust,
4871 .ndo_set_vf_vlan = ice_set_vf_port_vlan,
4872 .ndo_set_vf_link_state = ice_set_vf_link_state,
4873 .ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,
4874 .ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,
4875 .ndo_set_features = ice_set_features,
4876 .ndo_bridge_getlink = ice_bridge_getlink,
4877 .ndo_bridge_setlink = ice_bridge_setlink,
4878 .ndo_fdb_add = ice_fdb_add,
4879 .ndo_fdb_del = ice_fdb_del,
4880 .ndo_tx_timeout = ice_tx_timeout,
4881};
4882