1
2
3
4
5
6
7#include <linux/module.h>
8#include "mt76x02.h"
9
10#define CCK_RATE(_idx, _rate) { \
11 .bitrate = _rate, \
12 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
13 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
14 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
15}
16
17#define OFDM_RATE(_idx, _rate) { \
18 .bitrate = _rate, \
19 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
20 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
21}
22
23struct ieee80211_rate mt76x02_rates[] = {
24 CCK_RATE(0, 10),
25 CCK_RATE(1, 20),
26 CCK_RATE(2, 55),
27 CCK_RATE(3, 110),
28 OFDM_RATE(0, 60),
29 OFDM_RATE(1, 90),
30 OFDM_RATE(2, 120),
31 OFDM_RATE(3, 180),
32 OFDM_RATE(4, 240),
33 OFDM_RATE(5, 360),
34 OFDM_RATE(6, 480),
35 OFDM_RATE(7, 540),
36};
37EXPORT_SYMBOL_GPL(mt76x02_rates);
38
39static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
40 {
41 .max = 1,
42 .types = BIT(NL80211_IFTYPE_ADHOC)
43 }, {
44 .max = 8,
45 .types = BIT(NL80211_IFTYPE_STATION) |
46#ifdef CONFIG_MAC80211_MESH
47 BIT(NL80211_IFTYPE_MESH_POINT) |
48#endif
49 BIT(NL80211_IFTYPE_AP)
50 },
51};
52
53static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
54 {
55 .max = 1,
56 .types = BIT(NL80211_IFTYPE_ADHOC)
57 }, {
58 .max = 2,
59 .types = BIT(NL80211_IFTYPE_STATION) |
60#ifdef CONFIG_MAC80211_MESH
61 BIT(NL80211_IFTYPE_MESH_POINT) |
62#endif
63 BIT(NL80211_IFTYPE_AP)
64 },
65};
66
67static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
68 {
69 .limits = mt76x02_if_limits,
70 .n_limits = ARRAY_SIZE(mt76x02_if_limits),
71 .max_interfaces = 8,
72 .num_different_channels = 1,
73 .beacon_int_infra_match = true,
74 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
75 BIT(NL80211_CHAN_WIDTH_20) |
76 BIT(NL80211_CHAN_WIDTH_40) |
77 BIT(NL80211_CHAN_WIDTH_80),
78 }
79};
80
81static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
82 {
83 .limits = mt76x02u_if_limits,
84 .n_limits = ARRAY_SIZE(mt76x02u_if_limits),
85 .max_interfaces = 2,
86 .num_different_channels = 1,
87 .beacon_int_infra_match = true,
88 }
89};
90
91static void
92mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on,
93 u8 delay_off)
94{
95 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev,
96 mt76);
97 u32 val;
98
99 val = MT_LED_STATUS_DURATION(0xff) |
100 MT_LED_STATUS_OFF(delay_off) |
101 MT_LED_STATUS_ON(delay_on);
102
103 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val);
104 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val);
105
106 val = MT_LED_CTRL_REPLAY(mdev->led_pin) |
107 MT_LED_CTRL_KICK(mdev->led_pin);
108 if (mdev->led_al)
109 val |= MT_LED_CTRL_POLARITY(mdev->led_pin);
110 mt76_wr(dev, MT_LED_CTRL, val);
111}
112
113static int
114mt76x02_led_set_blink(struct led_classdev *led_cdev,
115 unsigned long *delay_on,
116 unsigned long *delay_off)
117{
118 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
119 led_cdev);
120 u8 delta_on, delta_off;
121
122 delta_off = max_t(u8, *delay_off / 10, 1);
123 delta_on = max_t(u8, *delay_on / 10, 1);
124
125 mt76x02_led_set_config(mdev, delta_on, delta_off);
126
127 return 0;
128}
129
130static void
131mt76x02_led_set_brightness(struct led_classdev *led_cdev,
132 enum led_brightness brightness)
133{
134 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
135 led_cdev);
136
137 if (!brightness)
138 mt76x02_led_set_config(mdev, 0, 0xff);
139 else
140 mt76x02_led_set_config(mdev, 0xff, 0);
141}
142
143void mt76x02_init_device(struct mt76x02_dev *dev)
144{
145 struct ieee80211_hw *hw = mt76_hw(dev);
146 struct wiphy *wiphy = hw->wiphy;
147
148 INIT_DELAYED_WORK(&dev->mt76.mac_work, mt76x02_mac_work);
149
150 hw->queues = 4;
151 hw->max_rates = 1;
152 hw->max_report_rates = 7;
153 hw->max_rate_tries = 1;
154 hw->extra_tx_headroom = 2;
155
156 wiphy->interface_modes =
157 BIT(NL80211_IFTYPE_STATION) |
158 BIT(NL80211_IFTYPE_AP) |
159#ifdef CONFIG_MAC80211_MESH
160 BIT(NL80211_IFTYPE_MESH_POINT) |
161#endif
162 BIT(NL80211_IFTYPE_ADHOC);
163
164 if (mt76_is_usb(dev)) {
165 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
166 MT_DMA_HDR_LEN;
167 wiphy->iface_combinations = mt76x02u_if_comb;
168 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
169 } else {
170 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
171
172 mt76x02_dfs_init_detector(dev);
173
174 wiphy->reg_notifier = mt76x02_regd_notifier;
175 wiphy->iface_combinations = mt76x02_if_comb;
176 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
177 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
178
179
180 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
181 dev->mt76.led_cdev.brightness_set =
182 mt76x02_led_set_brightness;
183 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink;
184 }
185 }
186
187 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
188
189 hw->sta_data_size = sizeof(struct mt76x02_sta);
190 hw->vif_data_size = sizeof(struct mt76x02_vif);
191
192 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
193 ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER);
194
195 dev->mt76.global_wcid.idx = 255;
196 dev->mt76.global_wcid.hw_key_idx = -1;
197 dev->slottime = 9;
198
199 if (is_mt76x2(dev)) {
200 dev->mt76.sband_2g.sband.ht_cap.cap |=
201 IEEE80211_HT_CAP_LDPC_CODING;
202 dev->mt76.sband_5g.sband.ht_cap.cap |=
203 IEEE80211_HT_CAP_LDPC_CODING;
204 dev->mt76.chainmask = 0x202;
205 dev->mt76.antenna_mask = 3;
206 } else {
207 dev->mt76.chainmask = 0x101;
208 dev->mt76.antenna_mask = 1;
209 }
210}
211EXPORT_SYMBOL_GPL(mt76x02_init_device);
212
213void mt76x02_configure_filter(struct ieee80211_hw *hw,
214 unsigned int changed_flags,
215 unsigned int *total_flags, u64 multicast)
216{
217 struct mt76x02_dev *dev = hw->priv;
218 u32 flags = 0;
219
220#define MT76_FILTER(_flag, _hw) do { \
221 flags |= *total_flags & FIF_##_flag; \
222 dev->mt76.rxfilter &= ~(_hw); \
223 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \
224 } while (0)
225
226 mutex_lock(&dev->mt76.mutex);
227
228 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
229
230 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
231 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
232 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
233 MT_RX_FILTR_CFG_CTS |
234 MT_RX_FILTR_CFG_CFEND |
235 MT_RX_FILTR_CFG_CFACK |
236 MT_RX_FILTR_CFG_BA |
237 MT_RX_FILTR_CFG_CTRL_RSV);
238 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
239
240 *total_flags = flags;
241 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
242
243 mutex_unlock(&dev->mt76.mutex);
244}
245EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
246
247int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
248 struct ieee80211_sta *sta)
249{
250 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
251 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
252 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
253 int idx = 0;
254
255 memset(msta, 0, sizeof(*msta));
256
257 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, ARRAY_SIZE(dev->mt76.wcid));
258 if (idx < 0)
259 return -ENOSPC;
260
261 msta->vif = mvif;
262 msta->wcid.sta = 1;
263 msta->wcid.idx = idx;
264 msta->wcid.hw_key_idx = -1;
265 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
266 mt76x02_mac_wcid_set_drop(dev, idx, false);
267
268 if (vif->type == NL80211_IFTYPE_AP)
269 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
270
271 return 0;
272}
273EXPORT_SYMBOL_GPL(mt76x02_sta_add);
274
275void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
276 struct ieee80211_sta *sta)
277{
278 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
279 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
280 int idx = wcid->idx;
281
282 mt76x02_mac_wcid_set_drop(dev, idx, true);
283 mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
284}
285EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
286
287static void
288mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
289 unsigned int idx)
290{
291 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
292 struct mt76_txq *mtxq;
293
294 memset(mvif, 0, sizeof(*mvif));
295
296 mvif->idx = idx;
297 mvif->group_wcid.idx = MT_VIF_WCID(idx);
298 mvif->group_wcid.hw_key_idx = -1;
299 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
300 mtxq->wcid = &mvif->group_wcid;
301
302 mt76_txq_init(&dev->mt76, vif->txq);
303}
304
305int
306mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
307{
308 struct mt76x02_dev *dev = hw->priv;
309 unsigned int idx = 0;
310
311
312 if (!dev->vif_mask &&
313 (((vif->addr[0] ^ dev->mt76.macaddr[0]) & ~GENMASK(4, 1)) ||
314 memcmp(vif->addr + 1, dev->mt76.macaddr + 1, ETH_ALEN - 1)))
315 mt76x02_mac_setaddr(dev, vif->addr);
316
317 if (vif->addr[0] & BIT(1))
318 idx = 1 + (((dev->mt76.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333 if (vif->type == NL80211_IFTYPE_STATION)
334 idx += 8;
335
336 if (dev->vif_mask & BIT(idx))
337 return -EBUSY;
338
339 dev->vif_mask |= BIT(idx);
340
341 mt76x02_vif_init(dev, vif, idx);
342 return 0;
343}
344EXPORT_SYMBOL_GPL(mt76x02_add_interface);
345
346void mt76x02_remove_interface(struct ieee80211_hw *hw,
347 struct ieee80211_vif *vif)
348{
349 struct mt76x02_dev *dev = hw->priv;
350 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
351
352 mt76_txq_remove(&dev->mt76, vif->txq);
353 dev->vif_mask &= ~BIT(mvif->idx);
354}
355EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
356
357int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
358 struct ieee80211_ampdu_params *params)
359{
360 enum ieee80211_ampdu_mlme_action action = params->action;
361 struct ieee80211_sta *sta = params->sta;
362 struct mt76x02_dev *dev = hw->priv;
363 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
364 struct ieee80211_txq *txq = sta->txq[params->tid];
365 u16 tid = params->tid;
366 u16 ssn = params->ssn;
367 struct mt76_txq *mtxq;
368
369 if (!txq)
370 return -EINVAL;
371
372 mtxq = (struct mt76_txq *)txq->drv_priv;
373
374 switch (action) {
375 case IEEE80211_AMPDU_RX_START:
376 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
377 ssn, params->buf_size);
378 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
379 break;
380 case IEEE80211_AMPDU_RX_STOP:
381 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
382 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
383 BIT(16 + tid));
384 break;
385 case IEEE80211_AMPDU_TX_OPERATIONAL:
386 mtxq->aggr = true;
387 mtxq->send_bar = false;
388 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
389 break;
390 case IEEE80211_AMPDU_TX_STOP_FLUSH:
391 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
392 mtxq->aggr = false;
393 break;
394 case IEEE80211_AMPDU_TX_START:
395 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
396 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
397 break;
398 case IEEE80211_AMPDU_TX_STOP_CONT:
399 mtxq->aggr = false;
400 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
401 break;
402 }
403
404 return 0;
405}
406EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
407
408int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
409 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
410 struct ieee80211_key_conf *key)
411{
412 struct mt76x02_dev *dev = hw->priv;
413 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
414 struct mt76x02_sta *msta;
415 struct mt76_wcid *wcid;
416 int idx = key->keyidx;
417 int ret;
418
419
420 switch (key->cipher) {
421 case WLAN_CIPHER_SUITE_WEP40:
422 case WLAN_CIPHER_SUITE_WEP104:
423 case WLAN_CIPHER_SUITE_TKIP:
424 case WLAN_CIPHER_SUITE_CCMP:
425 break;
426 default:
427 return -EOPNOTSUPP;
428 }
429
430
431
432
433
434 if ((vif->type == NL80211_IFTYPE_ADHOC ||
435 vif->type == NL80211_IFTYPE_MESH_POINT) &&
436 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
437 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
438 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
439 return -EOPNOTSUPP;
440
441
442
443
444
445
446 if (mt76_is_usb(dev) &&
447 vif->type == NL80211_IFTYPE_AP &&
448 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
449 return -EOPNOTSUPP;
450
451 msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
452 wcid = msta ? &msta->wcid : &mvif->group_wcid;
453
454 if (cmd == SET_KEY) {
455 key->hw_key_idx = wcid->idx;
456 wcid->hw_key_idx = idx;
457 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
458 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
459 wcid->sw_iv = true;
460 }
461 } else {
462 if (idx == wcid->hw_key_idx) {
463 wcid->hw_key_idx = -1;
464 wcid->sw_iv = false;
465 }
466
467 key = NULL;
468 }
469 mt76_wcid_key_setup(&dev->mt76, wcid, key);
470
471 if (!msta) {
472 if (key || wcid->hw_key_idx == idx) {
473 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
474 if (ret)
475 return ret;
476 }
477
478 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
479 }
480
481 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
482}
483EXPORT_SYMBOL_GPL(mt76x02_set_key);
484
485int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
486 u16 queue, const struct ieee80211_tx_queue_params *params)
487{
488 struct mt76x02_dev *dev = hw->priv;
489 u8 cw_min = 5, cw_max = 10, qid;
490 u32 val;
491
492 qid = dev->mt76.q_tx[queue].q->hw_idx;
493
494 if (params->cw_min)
495 cw_min = fls(params->cw_min);
496 if (params->cw_max)
497 cw_max = fls(params->cw_max);
498
499 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
500 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
501 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
502 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
503 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
504
505 val = mt76_rr(dev, MT_WMM_TXOP(qid));
506 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
507 val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
508 mt76_wr(dev, MT_WMM_TXOP(qid), val);
509
510 val = mt76_rr(dev, MT_WMM_AIFSN);
511 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
512 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
513 mt76_wr(dev, MT_WMM_AIFSN, val);
514
515 val = mt76_rr(dev, MT_WMM_CWMIN);
516 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
517 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
518 mt76_wr(dev, MT_WMM_CWMIN, val);
519
520 val = mt76_rr(dev, MT_WMM_CWMAX);
521 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
522 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
523 mt76_wr(dev, MT_WMM_CWMAX, val);
524
525 return 0;
526}
527EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
528
529void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
530{
531 u8 ackto, sifs, slottime = dev->slottime;
532
533
534 slottime += 3 * dev->coverage_class;
535 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
536 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
537
538 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
539 MT_XIFS_TIME_CFG_OFDM_SIFS);
540
541 ackto = slottime + sifs;
542 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
543 MT_TX_TIMEOUT_CFG_ACKTO, ackto);
544}
545EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
546
547void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
548 s16 coverage_class)
549{
550 struct mt76x02_dev *dev = hw->priv;
551
552 mutex_lock(&dev->mt76.mutex);
553 dev->coverage_class = coverage_class;
554 mt76x02_set_tx_ackto(dev);
555 mutex_unlock(&dev->mt76.mutex);
556}
557EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
558
559int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
560{
561 struct mt76x02_dev *dev = hw->priv;
562
563 if (val != ~0 && val > 0xffff)
564 return -EINVAL;
565
566 mutex_lock(&dev->mt76.mutex);
567 mt76x02_mac_set_rts_thresh(dev, val);
568 mutex_unlock(&dev->mt76.mutex);
569
570 return 0;
571}
572EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
573
574void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
575 struct ieee80211_vif *vif,
576 struct ieee80211_sta *sta)
577{
578 struct mt76x02_dev *dev = hw->priv;
579 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
580 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
581 struct ieee80211_tx_rate rate = {};
582
583 if (!rates)
584 return;
585
586 rate.idx = rates->rate[0].idx;
587 rate.flags = rates->rate[0].flags;
588 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
589}
590EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
591
592void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
593{
594 int hdrlen;
595
596 if (!len)
597 return;
598
599 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
600 memmove(skb->data + len, skb->data, hdrlen);
601 skb_pull(skb, len);
602}
603EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
604
605void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
606 struct ieee80211_vif *vif)
607{
608 struct mt76x02_dev *dev = hw->priv;
609
610 clear_bit(MT76_SCANNING, &dev->mt76.state);
611 if (dev->cal.gain_init_done) {
612
613 dev->cal.low_gain = -1;
614 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
615 }
616}
617EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
618
619void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
620 bool ps)
621{
622 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
623 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
624 int idx = msta->wcid.idx;
625
626 mt76_stop_tx_queues(&dev->mt76, sta, true);
627 if (mt76_is_mmio(dev))
628 mt76x02_mac_wcid_set_drop(dev, idx, ps);
629}
630EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
631
632void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
633 struct ieee80211_vif *vif,
634 struct ieee80211_bss_conf *info,
635 u32 changed)
636{
637 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
638 struct mt76x02_dev *dev = hw->priv;
639
640 mutex_lock(&dev->mt76.mutex);
641
642 if (changed & BSS_CHANGED_BSSID)
643 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
644
645 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
646 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
647 info->ht_operation_mode);
648
649 if (changed & BSS_CHANGED_BEACON_INT) {
650 mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
651 MT_BEACON_TIME_CFG_INTVAL,
652 info->beacon_int << 4);
653 dev->mt76.beacon_int = info->beacon_int;
654 }
655
656 if (changed & BSS_CHANGED_BEACON_ENABLED)
657 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
658
659 if (changed & BSS_CHANGED_ERP_PREAMBLE)
660 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
661
662 if (changed & BSS_CHANGED_ERP_SLOT) {
663 int slottime = info->use_short_slot ? 9 : 20;
664
665 dev->slottime = slottime;
666 mt76x02_set_tx_ackto(dev);
667 }
668
669 mutex_unlock(&dev->mt76.mutex);
670}
671EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
672
673void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
674{
675 struct ieee80211_hw *hw = mt76_hw(dev);
676 struct wiphy *wiphy = hw->wiphy;
677 int i;
678
679 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
680 u8 *addr = dev->macaddr_list[i].addr;
681
682 memcpy(addr, dev->mt76.macaddr, ETH_ALEN);
683
684 if (!i)
685 continue;
686
687 addr[0] |= BIT(1);
688 addr[0] ^= ((i - 1) << 2);
689 }
690 wiphy->addresses = dev->macaddr_list;
691 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
692}
693EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
694
695MODULE_LICENSE("Dual BSD/GPL");
696
