LXR linux/drivers/staging/fbtft/fb

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * FB driver for the SH1106 OLED Controller
   4 * Based on the SSD1306 driver by Noralf Tronnes
   5 *
   6 * Copyright (C) 2017 Heiner Kallweit
   7 */
   8
   9#include <linux/module.h>
  10#include <linux/kernel.h>
  11#include <linux/init.h>
  12#include <linux/gpio/consumer.h>
  13#include <linux/delay.h>
  14
  15#include "fbtft.h"
  16
  17#define DRVNAME         "fb_sh1106"
  18#define WIDTH           128
  19#define HEIGHT          64
  20
  21/* Init sequence based on the Adafruit SSD1306 Arduino library */
  22static int init_display(struct fbtft_par *par)
  23{
  24        if (!par->info->var.xres || par->info->var.xres > WIDTH ||
  25            !par->info->var.yres || par->info->var.yres > HEIGHT ||
  26            par->info->var.yres % 8) {
  27                dev_err(par->info->device, "Invalid screen size\n");
  28                return -EINVAL;
  29        }
  30
  31        if (par->info->var.rotate) {
  32                dev_err(par->info->device, "Display rotation not supported\n");
  33                return -EINVAL;
  34        }
  35
  36        par->fbtftops.reset(par);
  37
  38        /* Set Display OFF */
  39        write_reg(par, 0xAE);
  40
  41        /* Set Display Clock Divide Ratio/ Oscillator Frequency */
  42        write_reg(par, 0xD5, 0x80);
  43
  44        /* Set Multiplex Ratio */
  45        write_reg(par, 0xA8, par->info->var.yres - 1);
  46
  47        /* Set Display Offset */
  48        write_reg(par, 0xD3, 0x00);
  49
  50        /* Set Display Start Line */
  51        write_reg(par, 0x40 | 0x0);
  52
  53        /* Set Segment Re-map */
  54        /* column address 127 is mapped to SEG0 */
  55        write_reg(par, 0xA0 | 0x1);
  56
  57        /* Set COM Output Scan Direction */
  58        /* remapped mode. Scan from COM[N-1] to COM0 */
  59        write_reg(par, 0xC8);
  60
  61        /* Set COM Pins Hardware Configuration */
  62        if (par->info->var.yres == 64)
  63                /* A[4]=1b, Alternative COM pin configuration */
  64                write_reg(par, 0xDA, 0x12);
  65        else if (par->info->var.yres == 48)
  66                /* A[4]=1b, Alternative COM pin configuration */
  67                write_reg(par, 0xDA, 0x12);
  68        else
  69                /* A[4]=0b, Sequential COM pin configuration */
  70                write_reg(par, 0xDA, 0x02);
  71
  72        /* Set Pre-charge Period */
  73        write_reg(par, 0xD9, 0xF1);
  74
  75        /* Set VCOMH Deselect Level */
  76        write_reg(par, 0xDB, 0x40);
  77
  78        /* Set Display ON */
  79        write_reg(par, 0xAF);
  80
  81        msleep(150);
  82
  83        return 0;
  84}
  85
  86static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
  87{
  88}
  89
  90static int blank(struct fbtft_par *par, bool on)
  91{
  92        fbtft_par_dbg(DEBUG_BLANK, par, "(%s=%s)\n",
  93                      __func__, on ? "true" : "false");
  94
  95        write_reg(par, on ? 0xAE : 0xAF);
  96
  97        return 0;
  98}
  99
 100/* Gamma is used to control Contrast */
 101static int set_gamma(struct fbtft_par *par, u32 *curves)
 102{
 103        /* apply mask */
 104        curves[0] &= 0xFF;
 105
 106        /* Set Contrast Control for BANK0 */
 107        write_reg(par, 0x81, curves[0]);
 108
 109        return 0;
 110}
 111
 112static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
 113{
 114        u16 *vmem16 = (u16 *)par->info->screen_buffer;
 115        u32 xres = par->info->var.xres;
 116        int page, page_start, page_end, x, i, ret;
 117        u8 *buf = par->txbuf.buf;
 118
 119        /* offset refers to vmem with 2 bytes element size */
 120        page_start = offset / (8 * 2 * xres);
 121        page_end = DIV_ROUND_UP(offset + len, 8 * 2 * xres);
 122
 123        for (page = page_start; page < page_end; page++) {
 124                /* set page and set column to 2 because of vidmem width 132 */
 125                write_reg(par, 0xb0 | page, 0x00 | 2, 0x10 | 0);
 126
 127                memset(buf, 0, xres);
 128                for (x = 0; x < xres; x++)
 129                        for (i = 0; i < 8; i++)
 130                                if (vmem16[(page * 8 + i) * xres + x])
 131                                        buf[x] |= BIT(i);
 132
 133                /* Write data */
 134                ret = fbtft_write_buf_dc(par, buf, xres, 1);
 135                if (ret < 0)
 136                        return ret;
 137        }
 138
 139        return 0;
 140}
 141
 142static void write_register(struct fbtft_par *par, int len, ...)
 143{
 144        va_list args;
 145        int i;
 146
 147        va_start(args, len);
 148
 149        for (i = 0; i < len; i++)
 150                par->buf[i] = va_arg(args, unsigned int);
 151
 152        /* keep DC low for all command bytes to transfer */
 153        fbtft_write_buf_dc(par, par->buf, len, 0);
 154
 155        va_end(args);
 156}
 157
 158static struct fbtft_display display = {
 159        .regwidth = 8,
 160        .width = WIDTH,
 161        .height = HEIGHT,
 162        .txbuflen = WIDTH,
 163        .gamma_num = 1,
 164        .gamma_len = 1,
 165        /* set default contrast to 0xcd = 80% */
 166        .gamma = "cd",
 167        .fbtftops = {
 168                .write_vmem = write_vmem,
 169                .write_register = write_register,
 170                .init_display = init_display,
 171                .set_addr_win = set_addr_win,
 172                .blank = blank,
 173                .set_gamma = set_gamma,
 174        },
 175};
 176
 177FBTFT_REGISTER_DRIVER(DRVNAME, "sinowealth,sh1106", &display);
 178
 179MODULE_ALIAS("spi:" DRVNAME);
 180MODULE_ALIAS("platform:" DRVNAME);
 181MODULE_ALIAS("spi:sh1106");
 182MODULE_ALIAS("platform:sh1106");
 183
 184MODULE_DESCRIPTION("SH1106 OLED Driver");
 185MODULE_AUTHOR("Heiner Kallweit");
 186MODULE_LICENSE("GPL");
 187