linux/include/linux/phy.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Framework and drivers for configuring and reading different PHYs
   4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
   5 *
   6 * Author: Andy Fleming
   7 *
   8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9 */
  10
  11#ifndef __PHY_H
  12#define __PHY_H
  13
  14#include <linux/compiler.h>
  15#include <linux/spinlock.h>
  16#include <linux/ethtool.h>
  17#include <linux/linkmode.h>
  18#include <linux/mdio.h>
  19#include <linux/mii.h>
  20#include <linux/module.h>
  21#include <linux/timer.h>
  22#include <linux/workqueue.h>
  23#include <linux/mod_devicetable.h>
  24
  25#include <linux/atomic.h>
  26
  27#define PHY_DEFAULT_FEATURES    (SUPPORTED_Autoneg | \
  28                                 SUPPORTED_TP | \
  29                                 SUPPORTED_MII)
  30
  31#define PHY_10BT_FEATURES       (SUPPORTED_10baseT_Half | \
  32                                 SUPPORTED_10baseT_Full)
  33
  34#define PHY_100BT_FEATURES      (SUPPORTED_100baseT_Half | \
  35                                 SUPPORTED_100baseT_Full)
  36
  37#define PHY_1000BT_FEATURES     (SUPPORTED_1000baseT_Half | \
  38                                 SUPPORTED_1000baseT_Full)
  39
  40extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
  41extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
  42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
  43extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
  44extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
  45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
  46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
  47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
  48
  49#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
  50#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
  51#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
  52#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
  53#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
  54#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
  55#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
  56#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
  57
  58extern const int phy_basic_ports_array[3];
  59extern const int phy_fibre_port_array[1];
  60extern const int phy_all_ports_features_array[7];
  61extern const int phy_10_100_features_array[4];
  62extern const int phy_basic_t1_features_array[2];
  63extern const int phy_gbit_features_array[2];
  64extern const int phy_10gbit_features_array[1];
  65
  66/*
  67 * Set phydev->irq to PHY_POLL if interrupts are not supported,
  68 * or not desired for this PHY.  Set to PHY_IGNORE_INTERRUPT if
  69 * the attached driver handles the interrupt
  70 */
  71#define PHY_POLL                -1
  72#define PHY_IGNORE_INTERRUPT    -2
  73
  74#define PHY_IS_INTERNAL         0x00000001
  75#define PHY_RST_AFTER_CLK_EN    0x00000002
  76#define MDIO_DEVICE_IS_PHY      0x80000000
  77
  78/* Interface Mode definitions */
  79typedef enum {
  80        PHY_INTERFACE_MODE_NA,
  81        PHY_INTERFACE_MODE_INTERNAL,
  82        PHY_INTERFACE_MODE_MII,
  83        PHY_INTERFACE_MODE_GMII,
  84        PHY_INTERFACE_MODE_SGMII,
  85        PHY_INTERFACE_MODE_TBI,
  86        PHY_INTERFACE_MODE_REVMII,
  87        PHY_INTERFACE_MODE_RMII,
  88        PHY_INTERFACE_MODE_RGMII,
  89        PHY_INTERFACE_MODE_RGMII_ID,
  90        PHY_INTERFACE_MODE_RGMII_RXID,
  91        PHY_INTERFACE_MODE_RGMII_TXID,
  92        PHY_INTERFACE_MODE_RTBI,
  93        PHY_INTERFACE_MODE_SMII,
  94        PHY_INTERFACE_MODE_XGMII,
  95        PHY_INTERFACE_MODE_MOCA,
  96        PHY_INTERFACE_MODE_QSGMII,
  97        PHY_INTERFACE_MODE_TRGMII,
  98        PHY_INTERFACE_MODE_1000BASEX,
  99        PHY_INTERFACE_MODE_2500BASEX,
 100        PHY_INTERFACE_MODE_RXAUI,
 101        PHY_INTERFACE_MODE_XAUI,
 102        /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
 103        PHY_INTERFACE_MODE_10GKR,
 104        PHY_INTERFACE_MODE_USXGMII,
 105        PHY_INTERFACE_MODE_MAX,
 106} phy_interface_t;
 107
 108/**
 109 * phy_supported_speeds - return all speeds currently supported by a phy device
 110 * @phy: The phy device to return supported speeds of.
 111 * @speeds: buffer to store supported speeds in.
 112 * @size: size of speeds buffer.
 113 *
 114 * Description: Returns the number of supported speeds, and fills
 115 * the speeds buffer with the supported speeds. If speeds buffer is
 116 * too small to contain all currently supported speeds, will return as
 117 * many speeds as can fit.
 118 */
 119unsigned int phy_supported_speeds(struct phy_device *phy,
 120                                      unsigned int *speeds,
 121                                      unsigned int size);
 122
 123/**
 124 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
 125 * @interface: enum phy_interface_t value
 126 *
 127 * Description: maps 'enum phy_interface_t' defined in this file
 128 * into the device tree binding of 'phy-mode', so that Ethernet
 129 * device driver can get phy interface from device tree.
 130 */
 131static inline const char *phy_modes(phy_interface_t interface)
 132{
 133        switch (interface) {
 134        case PHY_INTERFACE_MODE_NA:
 135                return "";
 136        case PHY_INTERFACE_MODE_INTERNAL:
 137                return "internal";
 138        case PHY_INTERFACE_MODE_MII:
 139                return "mii";
 140        case PHY_INTERFACE_MODE_GMII:
 141                return "gmii";
 142        case PHY_INTERFACE_MODE_SGMII:
 143                return "sgmii";
 144        case PHY_INTERFACE_MODE_TBI:
 145                return "tbi";
 146        case PHY_INTERFACE_MODE_REVMII:
 147                return "rev-mii";
 148        case PHY_INTERFACE_MODE_RMII:
 149                return "rmii";
 150        case PHY_INTERFACE_MODE_RGMII:
 151                return "rgmii";
 152        case PHY_INTERFACE_MODE_RGMII_ID:
 153                return "rgmii-id";
 154        case PHY_INTERFACE_MODE_RGMII_RXID:
 155                return "rgmii-rxid";
 156        case PHY_INTERFACE_MODE_RGMII_TXID:
 157                return "rgmii-txid";
 158        case PHY_INTERFACE_MODE_RTBI:
 159                return "rtbi";
 160        case PHY_INTERFACE_MODE_SMII:
 161                return "smii";
 162        case PHY_INTERFACE_MODE_XGMII:
 163                return "xgmii";
 164        case PHY_INTERFACE_MODE_MOCA:
 165                return "moca";
 166        case PHY_INTERFACE_MODE_QSGMII:
 167                return "qsgmii";
 168        case PHY_INTERFACE_MODE_TRGMII:
 169                return "trgmii";
 170        case PHY_INTERFACE_MODE_1000BASEX:
 171                return "1000base-x";
 172        case PHY_INTERFACE_MODE_2500BASEX:
 173                return "2500base-x";
 174        case PHY_INTERFACE_MODE_RXAUI:
 175                return "rxaui";
 176        case PHY_INTERFACE_MODE_XAUI:
 177                return "xaui";
 178        case PHY_INTERFACE_MODE_10GKR:
 179                return "10gbase-kr";
 180        case PHY_INTERFACE_MODE_USXGMII:
 181                return "usxgmii";
 182        default:
 183                return "unknown";
 184        }
 185}
 186
 187
 188#define PHY_INIT_TIMEOUT        100000
 189#define PHY_FORCE_TIMEOUT       10
 190
 191#define PHY_MAX_ADDR    32
 192
 193/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
 194#define PHY_ID_FMT "%s:%02x"
 195
 196#define MII_BUS_ID_SIZE 61
 197
 198/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
 199   IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
 200#define MII_ADDR_C45 (1<<30)
 201#define MII_DEVADDR_C45_SHIFT   16
 202#define MII_REGADDR_C45_MASK    GENMASK(15, 0)
 203
 204struct device;
 205struct phylink;
 206struct sk_buff;
 207
 208/*
 209 * The Bus class for PHYs.  Devices which provide access to
 210 * PHYs should register using this structure
 211 */
 212struct mii_bus {
 213        struct module *owner;
 214        const char *name;
 215        char id[MII_BUS_ID_SIZE];
 216        void *priv;
 217        int (*read)(struct mii_bus *bus, int addr, int regnum);
 218        int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
 219        int (*reset)(struct mii_bus *bus);
 220
 221        /*
 222         * A lock to ensure that only one thing can read/write
 223         * the MDIO bus at a time
 224         */
 225        struct mutex mdio_lock;
 226
 227        struct device *parent;
 228        enum {
 229                MDIOBUS_ALLOCATED = 1,
 230                MDIOBUS_REGISTERED,
 231                MDIOBUS_UNREGISTERED,
 232                MDIOBUS_RELEASED,
 233        } state;
 234        struct device dev;
 235
 236        /* list of all PHYs on bus */
 237        struct mdio_device *mdio_map[PHY_MAX_ADDR];
 238
 239        /* PHY addresses to be ignored when probing */
 240        u32 phy_mask;
 241
 242        /* PHY addresses to ignore the TA/read failure */
 243        u32 phy_ignore_ta_mask;
 244
 245        /*
 246         * An array of interrupts, each PHY's interrupt at the index
 247         * matching its address
 248         */
 249        int irq[PHY_MAX_ADDR];
 250
 251        /* GPIO reset pulse width in microseconds */
 252        int reset_delay_us;
 253        /* RESET GPIO descriptor pointer */
 254        struct gpio_desc *reset_gpiod;
 255};
 256#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
 257
 258struct mii_bus *mdiobus_alloc_size(size_t);
 259static inline struct mii_bus *mdiobus_alloc(void)
 260{
 261        return mdiobus_alloc_size(0);
 262}
 263
 264int __mdiobus_register(struct mii_bus *bus, struct module *owner);
 265#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
 266void mdiobus_unregister(struct mii_bus *bus);
 267void mdiobus_free(struct mii_bus *bus);
 268struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
 269static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
 270{
 271        return devm_mdiobus_alloc_size(dev, 0);
 272}
 273
 274void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
 275struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
 276
 277#define PHY_INTERRUPT_DISABLED  false
 278#define PHY_INTERRUPT_ENABLED   true
 279
 280/* PHY state machine states:
 281 *
 282 * DOWN: PHY device and driver are not ready for anything.  probe
 283 * should be called if and only if the PHY is in this state,
 284 * given that the PHY device exists.
 285 * - PHY driver probe function will set the state to READY
 286 *
 287 * READY: PHY is ready to send and receive packets, but the
 288 * controller is not.  By default, PHYs which do not implement
 289 * probe will be set to this state by phy_probe().
 290 * - start will set the state to UP
 291 *
 292 * UP: The PHY and attached device are ready to do work.
 293 * Interrupts should be started here.
 294 * - timer moves to NOLINK or RUNNING
 295 *
 296 * NOLINK: PHY is up, but not currently plugged in.
 297 * - irq or timer will set RUNNING if link comes back
 298 * - phy_stop moves to HALTED
 299 *
 300 * RUNNING: PHY is currently up, running, and possibly sending
 301 * and/or receiving packets
 302 * - irq or timer will set NOLINK if link goes down
 303 * - phy_stop moves to HALTED
 304 *
 305 * HALTED: PHY is up, but no polling or interrupts are done. Or
 306 * PHY is in an error state.
 307 * - phy_start moves to UP
 308 */
 309enum phy_state {
 310        PHY_DOWN = 0,
 311        PHY_READY,
 312        PHY_HALTED,
 313        PHY_UP,
 314        PHY_RUNNING,
 315        PHY_NOLINK,
 316};
 317
 318/**
 319 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
 320 * @devices_in_package: Bit vector of devices present.
 321 * @device_ids: The device identifer for each present device.
 322 */
 323struct phy_c45_device_ids {
 324        u32 devices_in_package;
 325        u32 device_ids[8];
 326};
 327
 328/* phy_device: An instance of a PHY
 329 *
 330 * drv: Pointer to the driver for this PHY instance
 331 * phy_id: UID for this device found during discovery
 332 * c45_ids: 802.3-c45 Device Identifers if is_c45.
 333 * is_c45:  Set to true if this phy uses clause 45 addressing.
 334 * is_internal: Set to true if this phy is internal to a MAC.
 335 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
 336 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
 337 * has_fixups: Set to true if this phy has fixups/quirks.
 338 * suspended: Set to true if this phy has been suspended successfully.
 339 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
 340 * loopback_enabled: Set true if this phy has been loopbacked successfully.
 341 * state: state of the PHY for management purposes
 342 * dev_flags: Device-specific flags used by the PHY driver.
 343 * irq: IRQ number of the PHY's interrupt (-1 if none)
 344 * phy_timer: The timer for handling the state machine
 345 * attached_dev: The attached enet driver's device instance ptr
 346 * adjust_link: Callback for the enet controller to respond to
 347 * changes in the link state.
 348 *
 349 * speed, duplex, pause, supported, advertising, lp_advertising,
 350 * and autoneg are used like in mii_if_info
 351 *
 352 * interrupts currently only supports enabled or disabled,
 353 * but could be changed in the future to support enabling
 354 * and disabling specific interrupts
 355 *
 356 * Contains some infrastructure for polling and interrupt
 357 * handling, as well as handling shifts in PHY hardware state
 358 */
 359struct phy_device {
 360        struct mdio_device mdio;
 361
 362        /* Information about the PHY type */
 363        /* And management functions */
 364        struct phy_driver *drv;
 365
 366        u32 phy_id;
 367
 368        struct phy_c45_device_ids c45_ids;
 369        unsigned is_c45:1;
 370        unsigned is_internal:1;
 371        unsigned is_pseudo_fixed_link:1;
 372        unsigned is_gigabit_capable:1;
 373        unsigned has_fixups:1;
 374        unsigned suspended:1;
 375        unsigned sysfs_links:1;
 376        unsigned loopback_enabled:1;
 377
 378        unsigned autoneg:1;
 379        /* The most recently read link state */
 380        unsigned link:1;
 381        unsigned autoneg_complete:1;
 382
 383        /* Interrupts are enabled */
 384        unsigned interrupts:1;
 385
 386        enum phy_state state;
 387
 388        u32 dev_flags;
 389
 390        phy_interface_t interface;
 391
 392        /*
 393         * forced speed & duplex (no autoneg)
 394         * partner speed & duplex & pause (autoneg)
 395         */
 396        int speed;
 397        int duplex;
 398        int pause;
 399        int asym_pause;
 400
 401        /* Union of PHY and Attached devices' supported link modes */
 402        /* See ethtool.h for more info */
 403        __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
 404        __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
 405        __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
 406        /* used with phy_speed_down */
 407        __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
 408
 409        /* Energy efficient ethernet modes which should be prohibited */
 410        u32 eee_broken_modes;
 411
 412#ifdef CONFIG_LED_TRIGGER_PHY
 413        struct phy_led_trigger *phy_led_triggers;
 414        unsigned int phy_num_led_triggers;
 415        struct phy_led_trigger *last_triggered;
 416
 417        struct phy_led_trigger *led_link_trigger;
 418#endif
 419
 420        /*
 421         * Interrupt number for this PHY
 422         * -1 means no interrupt
 423         */
 424        int irq;
 425
 426        /* private data pointer */
 427        /* For use by PHYs to maintain extra state */
 428        void *priv;
 429
 430        /* Interrupt and Polling infrastructure */
 431        struct delayed_work state_queue;
 432
 433        struct mutex lock;
 434
 435        struct phylink *phylink;
 436        struct net_device *attached_dev;
 437
 438        u8 mdix;
 439        u8 mdix_ctrl;
 440
 441        void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
 442        void (*adjust_link)(struct net_device *dev);
 443};
 444#define to_phy_device(d) container_of(to_mdio_device(d), \
 445                                      struct phy_device, mdio)
 446
 447/* struct phy_driver: Driver structure for a particular PHY type
 448 *
 449 * driver_data: static driver data
 450 * phy_id: The result of reading the UID registers of this PHY
 451 *   type, and ANDing them with the phy_id_mask.  This driver
 452 *   only works for PHYs with IDs which match this field
 453 * name: The friendly name of this PHY type
 454 * phy_id_mask: Defines the important bits of the phy_id
 455 * features: A mandatory list of features (speed, duplex, etc)
 456 *   supported by this PHY
 457 * flags: A bitfield defining certain other features this PHY
 458 *   supports (like interrupts)
 459 *
 460 * All functions are optional. If config_aneg or read_status
 461 * are not implemented, the phy core uses the genphy versions.
 462 * Note that none of these functions should be called from
 463 * interrupt time. The goal is for the bus read/write functions
 464 * to be able to block when the bus transaction is happening,
 465 * and be freed up by an interrupt (The MPC85xx has this ability,
 466 * though it is not currently supported in the driver).
 467 */
 468struct phy_driver {
 469        struct mdio_driver_common mdiodrv;
 470        u32 phy_id;
 471        char *name;
 472        u32 phy_id_mask;
 473        const unsigned long * const features;
 474        u32 flags;
 475        const void *driver_data;
 476
 477        /*
 478         * Called to issue a PHY software reset
 479         */
 480        int (*soft_reset)(struct phy_device *phydev);
 481
 482        /*
 483         * Called to initialize the PHY,
 484         * including after a reset
 485         */
 486        int (*config_init)(struct phy_device *phydev);
 487
 488        /*
 489         * Called during discovery.  Used to set
 490         * up device-specific structures, if any
 491         */
 492        int (*probe)(struct phy_device *phydev);
 493
 494        /*
 495         * Probe the hardware to determine what abilities it has.
 496         * Should only set phydev->supported.
 497         */
 498        int (*get_features)(struct phy_device *phydev);
 499
 500        /* PHY Power Management */
 501        int (*suspend)(struct phy_device *phydev);
 502        int (*resume)(struct phy_device *phydev);
 503
 504        /*
 505         * Configures the advertisement and resets
 506         * autonegotiation if phydev->autoneg is on,
 507         * forces the speed to the current settings in phydev
 508         * if phydev->autoneg is off
 509         */
 510        int (*config_aneg)(struct phy_device *phydev);
 511
 512        /* Determines the auto negotiation result */
 513        int (*aneg_done)(struct phy_device *phydev);
 514
 515        /* Determines the negotiated speed and duplex */
 516        int (*read_status)(struct phy_device *phydev);
 517
 518        /* Clears any pending interrupts */
 519        int (*ack_interrupt)(struct phy_device *phydev);
 520
 521        /* Enables or disables interrupts */
 522        int (*config_intr)(struct phy_device *phydev);
 523
 524        /*
 525         * Checks if the PHY generated an interrupt.
 526         * For multi-PHY devices with shared PHY interrupt pin
 527         */
 528        int (*did_interrupt)(struct phy_device *phydev);
 529
 530        /* Override default interrupt handling */
 531        int (*handle_interrupt)(struct phy_device *phydev);
 532
 533        /* Clears up any memory if needed */
 534        void (*remove)(struct phy_device *phydev);
 535
 536        /* Returns true if this is a suitable driver for the given
 537         * phydev.  If NULL, matching is based on phy_id and
 538         * phy_id_mask.
 539         */
 540        int (*match_phy_device)(struct phy_device *phydev);
 541
 542        /* Handles ethtool queries for hardware time stamping. */
 543        int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
 544
 545        /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
 546        int  (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
 547
 548        /*
 549         * Requests a Rx timestamp for 'skb'. If the skb is accepted,
 550         * the phy driver promises to deliver it using netif_rx() as
 551         * soon as a timestamp becomes available. One of the
 552         * PTP_CLASS_ values is passed in 'type'. The function must
 553         * return true if the skb is accepted for delivery.
 554         */
 555        bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
 556
 557        /*
 558         * Requests a Tx timestamp for 'skb'. The phy driver promises
 559         * to deliver it using skb_complete_tx_timestamp() as soon as a
 560         * timestamp becomes available. One of the PTP_CLASS_ values
 561         * is passed in 'type'.
 562         */
 563        void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
 564
 565        /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
 566         * enable Wake on LAN, so set_wol is provided to be called in the
 567         * ethernet driver's set_wol function. */
 568        int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
 569
 570        /* See set_wol, but for checking whether Wake on LAN is enabled. */
 571        void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
 572
 573        /*
 574         * Called to inform a PHY device driver when the core is about to
 575         * change the link state. This callback is supposed to be used as
 576         * fixup hook for drivers that need to take action when the link
 577         * state changes. Drivers are by no means allowed to mess with the
 578         * PHY device structure in their implementations.
 579         */
 580        void (*link_change_notify)(struct phy_device *dev);
 581
 582        /*
 583         * Phy specific driver override for reading a MMD register.
 584         * This function is optional for PHY specific drivers.  When
 585         * not provided, the default MMD read function will be used
 586         * by phy_read_mmd(), which will use either a direct read for
 587         * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
 588         *  devnum is the MMD device number within the PHY device,
 589         *  regnum is the register within the selected MMD device.
 590         */
 591        int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
 592
 593        /*
 594         * Phy specific driver override for writing a MMD register.
 595         * This function is optional for PHY specific drivers.  When
 596         * not provided, the default MMD write function will be used
 597         * by phy_write_mmd(), which will use either a direct write for
 598         * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
 599         *  devnum is the MMD device number within the PHY device,
 600         *  regnum is the register within the selected MMD device.
 601         *  val is the value to be written.
 602         */
 603        int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
 604                         u16 val);
 605
 606        int (*read_page)(struct phy_device *dev);
 607        int (*write_page)(struct phy_device *dev, int page);
 608
 609        /* Get the size and type of the eeprom contained within a plug-in
 610         * module */
 611        int (*module_info)(struct phy_device *dev,
 612                           struct ethtool_modinfo *modinfo);
 613
 614        /* Get the eeprom information from the plug-in module */
 615        int (*module_eeprom)(struct phy_device *dev,
 616                             struct ethtool_eeprom *ee, u8 *data);
 617
 618        /* Get statistics from the phy using ethtool */
 619        int (*get_sset_count)(struct phy_device *dev);
 620        void (*get_strings)(struct phy_device *dev, u8 *data);
 621        void (*get_stats)(struct phy_device *dev,
 622                          struct ethtool_stats *stats, u64 *data);
 623
 624        /* Get and Set PHY tunables */
 625        int (*get_tunable)(struct phy_device *dev,
 626                           struct ethtool_tunable *tuna, void *data);
 627        int (*set_tunable)(struct phy_device *dev,
 628                            struct ethtool_tunable *tuna,
 629                            const void *data);
 630        int (*set_loopback)(struct phy_device *dev, bool enable);
 631};
 632#define to_phy_driver(d) container_of(to_mdio_common_driver(d),         \
 633                                      struct phy_driver, mdiodrv)
 634
 635#define PHY_ANY_ID "MATCH ANY PHY"
 636#define PHY_ANY_UID 0xffffffff
 637
 638#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
 639#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
 640#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
 641
 642/* A Structure for boards to register fixups with the PHY Lib */
 643struct phy_fixup {
 644        struct list_head list;
 645        char bus_id[MII_BUS_ID_SIZE + 3];
 646        u32 phy_uid;
 647        u32 phy_uid_mask;
 648        int (*run)(struct phy_device *phydev);
 649};
 650
 651const char *phy_speed_to_str(int speed);
 652const char *phy_duplex_to_str(unsigned int duplex);
 653
 654/* A structure for mapping a particular speed and duplex
 655 * combination to a particular SUPPORTED and ADVERTISED value
 656 */
 657struct phy_setting {
 658        u32 speed;
 659        u8 duplex;
 660        u8 bit;
 661};
 662
 663const struct phy_setting *
 664phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
 665                   bool exact);
 666size_t phy_speeds(unsigned int *speeds, size_t size,
 667                  unsigned long *mask);
 668void of_set_phy_supported(struct phy_device *phydev);
 669void of_set_phy_eee_broken(struct phy_device *phydev);
 670int phy_speed_down_core(struct phy_device *phydev);
 671
 672/**
 673 * phy_is_started - Convenience function to check whether PHY is started
 674 * @phydev: The phy_device struct
 675 */
 676static inline bool phy_is_started(struct phy_device *phydev)
 677{
 678        return phydev->state >= PHY_UP;
 679}
 680
 681void phy_resolve_aneg_pause(struct phy_device *phydev);
 682void phy_resolve_aneg_linkmode(struct phy_device *phydev);
 683
 684/**
 685 * phy_read - Convenience function for reading a given PHY register
 686 * @phydev: the phy_device struct
 687 * @regnum: register number to read
 688 *
 689 * NOTE: MUST NOT be called from interrupt context,
 690 * because the bus read/write functions may wait for an interrupt
 691 * to conclude the operation.
 692 */
 693static inline int phy_read(struct phy_device *phydev, u32 regnum)
 694{
 695        return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
 696}
 697
 698/**
 699 * __phy_read - convenience function for reading a given PHY register
 700 * @phydev: the phy_device struct
 701 * @regnum: register number to read
 702 *
 703 * The caller must have taken the MDIO bus lock.
 704 */
 705static inline int __phy_read(struct phy_device *phydev, u32 regnum)
 706{
 707        return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
 708}
 709
 710/**
 711 * phy_write - Convenience function for writing a given PHY register
 712 * @phydev: the phy_device struct
 713 * @regnum: register number to write
 714 * @val: value to write to @regnum
 715 *
 716 * NOTE: MUST NOT be called from interrupt context,
 717 * because the bus read/write functions may wait for an interrupt
 718 * to conclude the operation.
 719 */
 720static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
 721{
 722        return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
 723}
 724
 725/**
 726 * __phy_write - Convenience function for writing a given PHY register
 727 * @phydev: the phy_device struct
 728 * @regnum: register number to write
 729 * @val: value to write to @regnum
 730 *
 731 * The caller must have taken the MDIO bus lock.
 732 */
 733static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
 734{
 735        return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
 736                               val);
 737}
 738
 739/**
 740 * phy_read_mmd - Convenience function for reading a register
 741 * from an MMD on a given PHY.
 742 * @phydev: The phy_device struct
 743 * @devad: The MMD to read from
 744 * @regnum: The register on the MMD to read
 745 *
 746 * Same rules as for phy_read();
 747 */
 748int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
 749
 750/**
 751 * __phy_read_mmd - Convenience function for reading a register
 752 * from an MMD on a given PHY.
 753 * @phydev: The phy_device struct
 754 * @devad: The MMD to read from
 755 * @regnum: The register on the MMD to read
 756 *
 757 * Same rules as for __phy_read();
 758 */
 759int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
 760
 761/**
 762 * phy_write_mmd - Convenience function for writing a register
 763 * on an MMD on a given PHY.
 764 * @phydev: The phy_device struct
 765 * @devad: The MMD to write to
 766 * @regnum: The register on the MMD to read
 767 * @val: value to write to @regnum
 768 *
 769 * Same rules as for phy_write();
 770 */
 771int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
 772
 773/**
 774 * __phy_write_mmd - Convenience function for writing a register
 775 * on an MMD on a given PHY.
 776 * @phydev: The phy_device struct
 777 * @devad: The MMD to write to
 778 * @regnum: The register on the MMD to read
 779 * @val: value to write to @regnum
 780 *
 781 * Same rules as for __phy_write();
 782 */
 783int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
 784
 785int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
 786                         u16 set);
 787int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
 788                       u16 set);
 789int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
 790int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
 791
 792int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
 793                             u16 mask, u16 set);
 794int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
 795                           u16 mask, u16 set);
 796int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
 797                     u16 mask, u16 set);
 798int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
 799                   u16 mask, u16 set);
 800
 801/**
 802 * __phy_set_bits - Convenience function for setting bits in a PHY register
 803 * @phydev: the phy_device struct
 804 * @regnum: register number to write
 805 * @val: bits to set
 806 *
 807 * The caller must have taken the MDIO bus lock.
 808 */
 809static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
 810{
 811        return __phy_modify(phydev, regnum, 0, val);
 812}
 813
 814/**
 815 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
 816 * @phydev: the phy_device struct
 817 * @regnum: register number to write
 818 * @val: bits to clear
 819 *
 820 * The caller must have taken the MDIO bus lock.
 821 */
 822static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
 823                                   u16 val)
 824{
 825        return __phy_modify(phydev, regnum, val, 0);
 826}
 827
 828/**
 829 * phy_set_bits - Convenience function for setting bits in a PHY register
 830 * @phydev: the phy_device struct
 831 * @regnum: register number to write
 832 * @val: bits to set
 833 */
 834static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
 835{
 836        return phy_modify(phydev, regnum, 0, val);
 837}
 838
 839/**
 840 * phy_clear_bits - Convenience function for clearing bits in a PHY register
 841 * @phydev: the phy_device struct
 842 * @regnum: register number to write
 843 * @val: bits to clear
 844 */
 845static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
 846{
 847        return phy_modify(phydev, regnum, val, 0);
 848}
 849
 850/**
 851 * __phy_set_bits_mmd - Convenience function for setting bits in a register
 852 * on MMD
 853 * @phydev: the phy_device struct
 854 * @devad: the MMD containing register to modify
 855 * @regnum: register number to modify
 856 * @val: bits to set
 857 *
 858 * The caller must have taken the MDIO bus lock.
 859 */
 860static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
 861                u32 regnum, u16 val)
 862{
 863        return __phy_modify_mmd(phydev, devad, regnum, 0, val);
 864}
 865
 866/**
 867 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
 868 * on MMD
 869 * @phydev: the phy_device struct
 870 * @devad: the MMD containing register to modify
 871 * @regnum: register number to modify
 872 * @val: bits to clear
 873 *
 874 * The caller must have taken the MDIO bus lock.
 875 */
 876static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
 877                u32 regnum, u16 val)
 878{
 879        return __phy_modify_mmd(phydev, devad, regnum, val, 0);
 880}
 881
 882/**
 883 * phy_set_bits_mmd - Convenience function for setting bits in a register
 884 * on MMD
 885 * @phydev: the phy_device struct
 886 * @devad: the MMD containing register to modify
 887 * @regnum: register number to modify
 888 * @val: bits to set
 889 */
 890static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
 891                u32 regnum, u16 val)
 892{
 893        return phy_modify_mmd(phydev, devad, regnum, 0, val);
 894}
 895
 896/**
 897 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
 898 * on MMD
 899 * @phydev: the phy_device struct
 900 * @devad: the MMD containing register to modify
 901 * @regnum: register number to modify
 902 * @val: bits to clear
 903 */
 904static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
 905                u32 regnum, u16 val)
 906{
 907        return phy_modify_mmd(phydev, devad, regnum, val, 0);
 908}
 909
 910/**
 911 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
 912 * @phydev: the phy_device struct
 913 *
 914 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
 915 * PHY_IGNORE_INTERRUPT
 916 */
 917static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
 918{
 919        return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
 920}
 921
 922/**
 923 * phy_polling_mode - Convenience function for testing whether polling is
 924 * used to detect PHY status changes
 925 * @phydev: the phy_device struct
 926 */
 927static inline bool phy_polling_mode(struct phy_device *phydev)
 928{
 929        return phydev->irq == PHY_POLL;
 930}
 931
 932/**
 933 * phy_is_internal - Convenience function for testing if a PHY is internal
 934 * @phydev: the phy_device struct
 935 */
 936static inline bool phy_is_internal(struct phy_device *phydev)
 937{
 938        return phydev->is_internal;
 939}
 940
 941/**
 942 * phy_interface_mode_is_rgmii - Convenience function for testing if a
 943 * PHY interface mode is RGMII (all variants)
 944 * @mode: the phy_interface_t enum
 945 */
 946static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
 947{
 948        return mode >= PHY_INTERFACE_MODE_RGMII &&
 949                mode <= PHY_INTERFACE_MODE_RGMII_TXID;
 950};
 951
 952/**
 953 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
 954 *   negotiation
 955 * @mode: one of &enum phy_interface_t
 956 *
 957 * Returns true if the phy interface mode uses the 16-bit negotiation
 958 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
 959 */
 960static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
 961{
 962        return mode == PHY_INTERFACE_MODE_1000BASEX ||
 963               mode == PHY_INTERFACE_MODE_2500BASEX;
 964}
 965
 966/**
 967 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
 968 * is RGMII (all variants)
 969 * @phydev: the phy_device struct
 970 */
 971static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
 972{
 973        return phy_interface_mode_is_rgmii(phydev->interface);
 974};
 975
 976/*
 977 * phy_is_pseudo_fixed_link - Convenience function for testing if this
 978 * PHY is the CPU port facing side of an Ethernet switch, or similar.
 979 * @phydev: the phy_device struct
 980 */
 981static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
 982{
 983        return phydev->is_pseudo_fixed_link;
 984}
 985
 986int phy_save_page(struct phy_device *phydev);
 987int phy_select_page(struct phy_device *phydev, int page);
 988int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
 989int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
 990int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
 991int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
 992                             u16 mask, u16 set);
 993int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
 994                     u16 mask, u16 set);
 995
 996struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
 997                                     bool is_c45,
 998                                     struct phy_c45_device_ids *c45_ids);
 999#if IS_ENABLED(CONFIG_PHYLIB)
1000struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1001int phy_device_register(struct phy_device *phy);
1002void phy_device_free(struct phy_device *phydev);
1003#else
1004static inline
1005struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1006{
1007        return NULL;
1008}
1009
1010static inline int phy_device_register(struct phy_device *phy)
1011{
1012        return 0;
1013}
1014
1015static inline void phy_device_free(struct phy_device *phydev) { }
1016#endif /* CONFIG_PHYLIB */
1017void phy_device_remove(struct phy_device *phydev);
1018int phy_init_hw(struct phy_device *phydev);
1019int phy_suspend(struct phy_device *phydev);
1020int phy_resume(struct phy_device *phydev);
1021int __phy_resume(struct phy_device *phydev);
1022int phy_loopback(struct phy_device *phydev, bool enable);
1023struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1024                              phy_interface_t interface);
1025struct phy_device *phy_find_first(struct mii_bus *bus);
1026int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1027                      u32 flags, phy_interface_t interface);
1028int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1029                       void (*handler)(struct net_device *),
1030                       phy_interface_t interface);
1031struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1032                               void (*handler)(struct net_device *),
1033                               phy_interface_t interface);
1034void phy_disconnect(struct phy_device *phydev);
1035void phy_detach(struct phy_device *phydev);
1036void phy_start(struct phy_device *phydev);
1037void phy_stop(struct phy_device *phydev);
1038int phy_start_aneg(struct phy_device *phydev);
1039int phy_aneg_done(struct phy_device *phydev);
1040int phy_speed_down(struct phy_device *phydev, bool sync);
1041int phy_speed_up(struct phy_device *phydev);
1042
1043int phy_restart_aneg(struct phy_device *phydev);
1044int phy_reset_after_clk_enable(struct phy_device *phydev);
1045
1046static inline void phy_device_reset(struct phy_device *phydev, int value)
1047{
1048        mdio_device_reset(&phydev->mdio, value);
1049}
1050
1051#define phydev_err(_phydev, format, args...)    \
1052        dev_err(&_phydev->mdio.dev, format, ##args)
1053
1054#define phydev_info(_phydev, format, args...)   \
1055        dev_info(&_phydev->mdio.dev, format, ##args)
1056
1057#define phydev_warn(_phydev, format, args...)   \
1058        dev_warn(&_phydev->mdio.dev, format, ##args)
1059
1060#define phydev_dbg(_phydev, format, args...)    \
1061        dev_dbg(&_phydev->mdio.dev, format, ##args)
1062
1063static inline const char *phydev_name(const struct phy_device *phydev)
1064{
1065        return dev_name(&phydev->mdio.dev);
1066}
1067
1068void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1069        __printf(2, 3);
1070void phy_attached_info(struct phy_device *phydev);
1071
1072/* Clause 22 PHY */
1073int genphy_read_abilities(struct phy_device *phydev);
1074int genphy_setup_forced(struct phy_device *phydev);
1075int genphy_restart_aneg(struct phy_device *phydev);
1076int genphy_config_eee_advert(struct phy_device *phydev);
1077int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1078int genphy_aneg_done(struct phy_device *phydev);
1079int genphy_update_link(struct phy_device *phydev);
1080int genphy_read_lpa(struct phy_device *phydev);
1081int genphy_read_status(struct phy_device *phydev);
1082int genphy_suspend(struct phy_device *phydev);
1083int genphy_resume(struct phy_device *phydev);
1084int genphy_loopback(struct phy_device *phydev, bool enable);
1085int genphy_soft_reset(struct phy_device *phydev);
1086
1087static inline int genphy_config_aneg(struct phy_device *phydev)
1088{
1089        return __genphy_config_aneg(phydev, false);
1090}
1091
1092static inline int genphy_no_soft_reset(struct phy_device *phydev)
1093{
1094        return 0;
1095}
1096static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1097{
1098        return 0;
1099}
1100static inline int genphy_no_config_intr(struct phy_device *phydev)
1101{
1102        return 0;
1103}
1104int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1105                                u16 regnum);
1106int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1107                                 u16 regnum, u16 val);
1108
1109/* Clause 45 PHY */
1110int genphy_c45_restart_aneg(struct phy_device *phydev);
1111int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1112int genphy_c45_aneg_done(struct phy_device *phydev);
1113int genphy_c45_read_link(struct phy_device *phydev);
1114int genphy_c45_read_lpa(struct phy_device *phydev);
1115int genphy_c45_read_pma(struct phy_device *phydev);
1116int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1117int genphy_c45_an_config_aneg(struct phy_device *phydev);
1118int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1119int genphy_c45_read_mdix(struct phy_device *phydev);
1120int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1121int genphy_c45_read_status(struct phy_device *phydev);
1122int genphy_c45_config_aneg(struct phy_device *phydev);
1123
1124/* The gen10g_* functions are the old Clause 45 stub */
1125int gen10g_config_aneg(struct phy_device *phydev);
1126
1127static inline int phy_read_status(struct phy_device *phydev)
1128{
1129        if (!phydev->drv)
1130                return -EIO;
1131
1132        if (phydev->drv->read_status)
1133                return phydev->drv->read_status(phydev);
1134        else
1135                return genphy_read_status(phydev);
1136}
1137
1138void phy_driver_unregister(struct phy_driver *drv);
1139void phy_drivers_unregister(struct phy_driver *drv, int n);
1140int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1141int phy_drivers_register(struct phy_driver *new_driver, int n,
1142                         struct module *owner);
1143void phy_state_machine(struct work_struct *work);
1144void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1145void phy_mac_interrupt(struct phy_device *phydev);
1146void phy_start_machine(struct phy_device *phydev);
1147void phy_stop_machine(struct phy_device *phydev);
1148int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1149void phy_ethtool_ksettings_get(struct phy_device *phydev,
1150                               struct ethtool_link_ksettings *cmd);
1151int phy_ethtool_ksettings_set(struct phy_device *phydev,
1152                              const struct ethtool_link_ksettings *cmd);
1153int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1154void phy_request_interrupt(struct phy_device *phydev);
1155void phy_free_interrupt(struct phy_device *phydev);
1156void phy_print_status(struct phy_device *phydev);
1157int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1158void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1159void phy_advertise_supported(struct phy_device *phydev);
1160void phy_support_sym_pause(struct phy_device *phydev);
1161void phy_support_asym_pause(struct phy_device *phydev);
1162void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1163                       bool autoneg);
1164void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1165bool phy_validate_pause(struct phy_device *phydev,
1166                        struct ethtool_pauseparam *pp);
1167
1168int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1169                       int (*run)(struct phy_device *));
1170int phy_register_fixup_for_id(const char *bus_id,
1171                              int (*run)(struct phy_device *));
1172int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1173                               int (*run)(struct phy_device *));
1174
1175int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1176int phy_unregister_fixup_for_id(const char *bus_id);
1177int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1178
1179int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1180int phy_get_eee_err(struct phy_device *phydev);
1181int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1182int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1183int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1184void phy_ethtool_get_wol(struct phy_device *phydev,
1185                         struct ethtool_wolinfo *wol);
1186int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1187                                   struct ethtool_link_ksettings *cmd);
1188int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1189                                   const struct ethtool_link_ksettings *cmd);
1190int phy_ethtool_nway_reset(struct net_device *ndev);
1191
1192#if IS_ENABLED(CONFIG_PHYLIB)
1193int __init mdio_bus_init(void);
1194void mdio_bus_exit(void);
1195#endif
1196
1197/* Inline function for use within net/core/ethtool.c (built-in) */
1198static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1199{
1200        if (!phydev->drv)
1201                return -EIO;
1202
1203        mutex_lock(&phydev->lock);
1204        phydev->drv->get_strings(phydev, data);
1205        mutex_unlock(&phydev->lock);
1206
1207        return 0;
1208}
1209
1210static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1211{
1212        int ret;
1213
1214        if (!phydev->drv)
1215                return -EIO;
1216
1217        if (phydev->drv->get_sset_count &&
1218            phydev->drv->get_strings &&
1219            phydev->drv->get_stats) {
1220                mutex_lock(&phydev->lock);
1221                ret = phydev->drv->get_sset_count(phydev);
1222                mutex_unlock(&phydev->lock);
1223
1224                return ret;
1225        }
1226
1227        return -EOPNOTSUPP;
1228}
1229
1230static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1231                                        struct ethtool_stats *stats, u64 *data)
1232{
1233        if (!phydev->drv)
1234                return -EIO;
1235
1236        mutex_lock(&phydev->lock);
1237        phydev->drv->get_stats(phydev, stats, data);
1238        mutex_unlock(&phydev->lock);
1239
1240        return 0;
1241}
1242
1243extern struct bus_type mdio_bus_type;
1244
1245struct mdio_board_info {
1246        const char      *bus_id;
1247        char            modalias[MDIO_NAME_SIZE];
1248        int             mdio_addr;
1249        const void      *platform_data;
1250};
1251
1252#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1253int mdiobus_register_board_info(const struct mdio_board_info *info,
1254                                unsigned int n);
1255#else
1256static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1257                                              unsigned int n)
1258{
1259        return 0;
1260}
1261#endif
1262
1263
1264/**
1265 * module_phy_driver() - Helper macro for registering PHY drivers
1266 * @__phy_drivers: array of PHY drivers to register
1267 *
1268 * Helper macro for PHY drivers which do not do anything special in module
1269 * init/exit. Each module may only use this macro once, and calling it
1270 * replaces module_init() and module_exit().
1271 */
1272#define phy_module_driver(__phy_drivers, __count)                       \
1273static int __init phy_module_init(void)                                 \
1274{                                                                       \
1275        return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1276}                                                                       \
1277module_init(phy_module_init);                                           \
1278static void __exit phy_module_exit(void)                                \
1279{                                                                       \
1280        phy_drivers_unregister(__phy_drivers, __count);                 \
1281}                                                                       \
1282module_exit(phy_module_exit)
1283
1284#define module_phy_driver(__phy_drivers)                                \
1285        phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1286
1287bool phy_driver_is_genphy(struct phy_device *phydev);
1288bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1289
1290#endif /* __PHY_H */
1291