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10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/gpio/driver.h>
15#include <linux/bitops.h>
16
17#define DRVNAME "gpio-f7188x"
18
19
20
21
22#define SIO_LDSEL 0x07
23#define SIO_DEVID 0x20
24#define SIO_DEVREV 0x22
25#define SIO_MANID 0x23
26
27#define SIO_LD_GPIO 0x06
28#define SIO_UNLOCK_KEY 0x87
29#define SIO_LOCK_KEY 0xAA
30
31#define SIO_FINTEK_ID 0x1934
32#define SIO_F71869_ID 0x0814
33#define SIO_F71869A_ID 0x1007
34#define SIO_F71882_ID 0x0541
35#define SIO_F71889_ID 0x0909
36#define SIO_F71889A_ID 0x1005
37#define SIO_F81866_ID 0x1010
38#define SIO_F81804_ID 0x1502
39
40
41enum chips { f71869, f71869a, f71882fg, f71889a, f71889f, f81866, f81804 };
42
43static const char * const f7188x_names[] = {
44 "f71869",
45 "f71869a",
46 "f71882fg",
47 "f71889a",
48 "f71889f",
49 "f81866",
50 "f81804",
51};
52
53struct f7188x_sio {
54 int addr;
55 enum chips type;
56};
57
58struct f7188x_gpio_bank {
59 struct gpio_chip chip;
60 unsigned int regbase;
61 struct f7188x_gpio_data *data;
62};
63
64struct f7188x_gpio_data {
65 struct f7188x_sio *sio;
66 int nr_bank;
67 struct f7188x_gpio_bank *bank;
68};
69
70
71
72
73
74static inline int superio_inb(int base, int reg)
75{
76 outb(reg, base);
77 return inb(base + 1);
78}
79
80static int superio_inw(int base, int reg)
81{
82 int val;
83
84 outb(reg++, base);
85 val = inb(base + 1) << 8;
86 outb(reg, base);
87 val |= inb(base + 1);
88
89 return val;
90}
91
92static inline void superio_outb(int base, int reg, int val)
93{
94 outb(reg, base);
95 outb(val, base + 1);
96}
97
98static inline int superio_enter(int base)
99{
100
101 if (!request_muxed_region(base, 2, DRVNAME)) {
102 pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
103 return -EBUSY;
104 }
105
106
107 outb(SIO_UNLOCK_KEY, base);
108 outb(SIO_UNLOCK_KEY, base);
109
110 return 0;
111}
112
113static inline void superio_select(int base, int ld)
114{
115 outb(SIO_LDSEL, base);
116 outb(ld, base + 1);
117}
118
119static inline void superio_exit(int base)
120{
121 outb(SIO_LOCK_KEY, base);
122 release_region(base, 2);
123}
124
125
126
127
128
129static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset);
130static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
131static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
132static int f7188x_gpio_direction_out(struct gpio_chip *chip,
133 unsigned offset, int value);
134static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
135static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
136 unsigned long config);
137
138#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
139 { \
140 .chip = { \
141 .label = DRVNAME, \
142 .owner = THIS_MODULE, \
143 .get_direction = f7188x_gpio_get_direction, \
144 .direction_input = f7188x_gpio_direction_in, \
145 .get = f7188x_gpio_get, \
146 .direction_output = f7188x_gpio_direction_out, \
147 .set = f7188x_gpio_set, \
148 .set_config = f7188x_gpio_set_config, \
149 .base = _base, \
150 .ngpio = _ngpio, \
151 .can_sleep = true, \
152 }, \
153 .regbase = _regbase, \
154 }
155
156#define gpio_dir(base) (base + 0)
157#define gpio_data_out(base) (base + 1)
158#define gpio_data_in(base) (base + 2)
159
160#define gpio_out_mode(base) (base + 3)
161
162static struct f7188x_gpio_bank f71869_gpio_bank[] = {
163 F7188X_GPIO_BANK(0, 6, 0xF0),
164 F7188X_GPIO_BANK(10, 8, 0xE0),
165 F7188X_GPIO_BANK(20, 8, 0xD0),
166 F7188X_GPIO_BANK(30, 8, 0xC0),
167 F7188X_GPIO_BANK(40, 8, 0xB0),
168 F7188X_GPIO_BANK(50, 5, 0xA0),
169 F7188X_GPIO_BANK(60, 6, 0x90),
170};
171
172static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
173 F7188X_GPIO_BANK(0, 6, 0xF0),
174 F7188X_GPIO_BANK(10, 8, 0xE0),
175 F7188X_GPIO_BANK(20, 8, 0xD0),
176 F7188X_GPIO_BANK(30, 8, 0xC0),
177 F7188X_GPIO_BANK(40, 8, 0xB0),
178 F7188X_GPIO_BANK(50, 5, 0xA0),
179 F7188X_GPIO_BANK(60, 8, 0x90),
180 F7188X_GPIO_BANK(70, 8, 0x80),
181};
182
183static struct f7188x_gpio_bank f71882_gpio_bank[] = {
184 F7188X_GPIO_BANK(0, 8, 0xF0),
185 F7188X_GPIO_BANK(10, 8, 0xE0),
186 F7188X_GPIO_BANK(20, 8, 0xD0),
187 F7188X_GPIO_BANK(30, 4, 0xC0),
188 F7188X_GPIO_BANK(40, 4, 0xB0),
189};
190
191static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
192 F7188X_GPIO_BANK(0, 7, 0xF0),
193 F7188X_GPIO_BANK(10, 7, 0xE0),
194 F7188X_GPIO_BANK(20, 8, 0xD0),
195 F7188X_GPIO_BANK(30, 8, 0xC0),
196 F7188X_GPIO_BANK(40, 8, 0xB0),
197 F7188X_GPIO_BANK(50, 5, 0xA0),
198 F7188X_GPIO_BANK(60, 8, 0x90),
199 F7188X_GPIO_BANK(70, 8, 0x80),
200};
201
202static struct f7188x_gpio_bank f71889_gpio_bank[] = {
203 F7188X_GPIO_BANK(0, 7, 0xF0),
204 F7188X_GPIO_BANK(10, 7, 0xE0),
205 F7188X_GPIO_BANK(20, 8, 0xD0),
206 F7188X_GPIO_BANK(30, 8, 0xC0),
207 F7188X_GPIO_BANK(40, 8, 0xB0),
208 F7188X_GPIO_BANK(50, 5, 0xA0),
209 F7188X_GPIO_BANK(60, 8, 0x90),
210 F7188X_GPIO_BANK(70, 8, 0x80),
211};
212
213static struct f7188x_gpio_bank f81866_gpio_bank[] = {
214 F7188X_GPIO_BANK(0, 8, 0xF0),
215 F7188X_GPIO_BANK(10, 8, 0xE0),
216 F7188X_GPIO_BANK(20, 8, 0xD0),
217 F7188X_GPIO_BANK(30, 8, 0xC0),
218 F7188X_GPIO_BANK(40, 8, 0xB0),
219 F7188X_GPIO_BANK(50, 8, 0xA0),
220 F7188X_GPIO_BANK(60, 8, 0x90),
221 F7188X_GPIO_BANK(70, 8, 0x80),
222 F7188X_GPIO_BANK(80, 8, 0x88),
223};
224
225
226static struct f7188x_gpio_bank f81804_gpio_bank[] = {
227 F7188X_GPIO_BANK(0, 8, 0xF0),
228 F7188X_GPIO_BANK(10, 8, 0xE0),
229 F7188X_GPIO_BANK(20, 8, 0xD0),
230 F7188X_GPIO_BANK(50, 8, 0xA0),
231 F7188X_GPIO_BANK(60, 8, 0x90),
232 F7188X_GPIO_BANK(70, 8, 0x80),
233 F7188X_GPIO_BANK(90, 8, 0x98),
234};
235
236
237static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
238{
239 int err;
240 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
241 struct f7188x_sio *sio = bank->data->sio;
242 u8 dir;
243
244 err = superio_enter(sio->addr);
245 if (err)
246 return err;
247 superio_select(sio->addr, SIO_LD_GPIO);
248
249 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
250
251 superio_exit(sio->addr);
252
253 if (dir & 1 << offset)
254 return GPIO_LINE_DIRECTION_OUT;
255
256 return GPIO_LINE_DIRECTION_IN;
257}
258
259static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
260{
261 int err;
262 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
263 struct f7188x_sio *sio = bank->data->sio;
264 u8 dir;
265
266 err = superio_enter(sio->addr);
267 if (err)
268 return err;
269 superio_select(sio->addr, SIO_LD_GPIO);
270
271 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
272 dir &= ~BIT(offset);
273 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
274
275 superio_exit(sio->addr);
276
277 return 0;
278}
279
280static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
281{
282 int err;
283 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
284 struct f7188x_sio *sio = bank->data->sio;
285 u8 dir, data;
286
287 err = superio_enter(sio->addr);
288 if (err)
289 return err;
290 superio_select(sio->addr, SIO_LD_GPIO);
291
292 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
293 dir = !!(dir & BIT(offset));
294 if (dir)
295 data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
296 else
297 data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
298
299 superio_exit(sio->addr);
300
301 return !!(data & BIT(offset));
302}
303
304static int f7188x_gpio_direction_out(struct gpio_chip *chip,
305 unsigned offset, int value)
306{
307 int err;
308 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
309 struct f7188x_sio *sio = bank->data->sio;
310 u8 dir, data_out;
311
312 err = superio_enter(sio->addr);
313 if (err)
314 return err;
315 superio_select(sio->addr, SIO_LD_GPIO);
316
317 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
318 if (value)
319 data_out |= BIT(offset);
320 else
321 data_out &= ~BIT(offset);
322 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
323
324 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
325 dir |= BIT(offset);
326 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
327
328 superio_exit(sio->addr);
329
330 return 0;
331}
332
333static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
334{
335 int err;
336 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
337 struct f7188x_sio *sio = bank->data->sio;
338 u8 data_out;
339
340 err = superio_enter(sio->addr);
341 if (err)
342 return;
343 superio_select(sio->addr, SIO_LD_GPIO);
344
345 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
346 if (value)
347 data_out |= BIT(offset);
348 else
349 data_out &= ~BIT(offset);
350 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
351
352 superio_exit(sio->addr);
353}
354
355static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
356 unsigned long config)
357{
358 int err;
359 enum pin_config_param param = pinconf_to_config_param(config);
360 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
361 struct f7188x_sio *sio = bank->data->sio;
362 u8 data;
363
364 if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN &&
365 param != PIN_CONFIG_DRIVE_PUSH_PULL)
366 return -ENOTSUPP;
367
368 err = superio_enter(sio->addr);
369 if (err)
370 return err;
371 superio_select(sio->addr, SIO_LD_GPIO);
372
373 data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
374 if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
375 data &= ~BIT(offset);
376 else
377 data |= BIT(offset);
378 superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
379
380 superio_exit(sio->addr);
381 return 0;
382}
383
384
385
386
387
388static int f7188x_gpio_probe(struct platform_device *pdev)
389{
390 int err;
391 int i;
392 struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
393 struct f7188x_gpio_data *data;
394
395 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
396 if (!data)
397 return -ENOMEM;
398
399 switch (sio->type) {
400 case f71869:
401 data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
402 data->bank = f71869_gpio_bank;
403 break;
404 case f71869a:
405 data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
406 data->bank = f71869a_gpio_bank;
407 break;
408 case f71882fg:
409 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
410 data->bank = f71882_gpio_bank;
411 break;
412 case f71889a:
413 data->nr_bank = ARRAY_SIZE(f71889a_gpio_bank);
414 data->bank = f71889a_gpio_bank;
415 break;
416 case f71889f:
417 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
418 data->bank = f71889_gpio_bank;
419 break;
420 case f81866:
421 data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
422 data->bank = f81866_gpio_bank;
423 break;
424 case f81804:
425 data->nr_bank = ARRAY_SIZE(f81804_gpio_bank);
426 data->bank = f81804_gpio_bank;
427 break;
428 default:
429 return -ENODEV;
430 }
431 data->sio = sio;
432
433 platform_set_drvdata(pdev, data);
434
435
436 for (i = 0; i < data->nr_bank; i++) {
437 struct f7188x_gpio_bank *bank = &data->bank[i];
438
439 bank->chip.parent = &pdev->dev;
440 bank->data = data;
441
442 err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank);
443 if (err) {
444 dev_err(&pdev->dev,
445 "Failed to register gpiochip %d: %d\n",
446 i, err);
447 return err;
448 }
449 }
450
451 return 0;
452}
453
454static int __init f7188x_find(int addr, struct f7188x_sio *sio)
455{
456 int err;
457 u16 devid;
458
459 err = superio_enter(addr);
460 if (err)
461 return err;
462
463 err = -ENODEV;
464 devid = superio_inw(addr, SIO_MANID);
465 if (devid != SIO_FINTEK_ID) {
466 pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
467 goto err;
468 }
469
470 devid = superio_inw(addr, SIO_DEVID);
471 switch (devid) {
472 case SIO_F71869_ID:
473 sio->type = f71869;
474 break;
475 case SIO_F71869A_ID:
476 sio->type = f71869a;
477 break;
478 case SIO_F71882_ID:
479 sio->type = f71882fg;
480 break;
481 case SIO_F71889A_ID:
482 sio->type = f71889a;
483 break;
484 case SIO_F71889_ID:
485 sio->type = f71889f;
486 break;
487 case SIO_F81866_ID:
488 sio->type = f81866;
489 break;
490 case SIO_F81804_ID:
491 sio->type = f81804;
492 break;
493 default:
494 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
495 goto err;
496 }
497 sio->addr = addr;
498 err = 0;
499
500 pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
501 f7188x_names[sio->type],
502 (unsigned int) addr,
503 (int) superio_inb(addr, SIO_DEVREV));
504
505err:
506 superio_exit(addr);
507 return err;
508}
509
510static struct platform_device *f7188x_gpio_pdev;
511
512static int __init
513f7188x_gpio_device_add(const struct f7188x_sio *sio)
514{
515 int err;
516
517 f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
518 if (!f7188x_gpio_pdev)
519 return -ENOMEM;
520
521 err = platform_device_add_data(f7188x_gpio_pdev,
522 sio, sizeof(*sio));
523 if (err) {
524 pr_err(DRVNAME "Platform data allocation failed\n");
525 goto err;
526 }
527
528 err = platform_device_add(f7188x_gpio_pdev);
529 if (err) {
530 pr_err(DRVNAME "Device addition failed\n");
531 goto err;
532 }
533
534 return 0;
535
536err:
537 platform_device_put(f7188x_gpio_pdev);
538
539 return err;
540}
541
542
543
544
545
546
547
548static struct platform_driver f7188x_gpio_driver = {
549 .driver = {
550 .name = DRVNAME,
551 },
552 .probe = f7188x_gpio_probe,
553};
554
555static int __init f7188x_gpio_init(void)
556{
557 int err;
558 struct f7188x_sio sio;
559
560 if (f7188x_find(0x2e, &sio) &&
561 f7188x_find(0x4e, &sio))
562 return -ENODEV;
563
564 err = platform_driver_register(&f7188x_gpio_driver);
565 if (!err) {
566 err = f7188x_gpio_device_add(&sio);
567 if (err)
568 platform_driver_unregister(&f7188x_gpio_driver);
569 }
570
571 return err;
572}
573subsys_initcall(f7188x_gpio_init);
574
575static void __exit f7188x_gpio_exit(void)
576{
577 platform_device_unregister(f7188x_gpio_pdev);
578 platform_driver_unregister(&f7188x_gpio_driver);
579}
580module_exit(f7188x_gpio_exit);
581
582MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889A, F71889F and F81866");
583MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
584MODULE_LICENSE("GPL");
585
