1
2
3
4
5
6
7
8
9
10
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/i2c.h>
15#include <linux/regmap.h>
16#include <linux/delay.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/buffer.h>
21#include <linux/iio/trigger.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/triggered_buffer.h>
24#include <linux/iio/sysfs.h>
25#include <linux/pm_runtime.h>
26
27#define RPR0521_REG_SYSTEM_CTRL 0x40
28#define RPR0521_REG_MODE_CTRL 0x41
29#define RPR0521_REG_ALS_CTRL 0x42
30#define RPR0521_REG_PXS_CTRL 0x43
31#define RPR0521_REG_PXS_DATA 0x44
32#define RPR0521_REG_ALS_DATA0 0x46
33#define RPR0521_REG_ALS_DATA1 0x48
34#define RPR0521_REG_INTERRUPT 0x4A
35#define RPR0521_REG_PS_OFFSET_LSB 0x53
36#define RPR0521_REG_ID 0x92
37
38#define RPR0521_MODE_ALS_MASK BIT(7)
39#define RPR0521_MODE_PXS_MASK BIT(6)
40#define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0)
41#define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4)
42#define RPR0521_ALS_DATA0_GAIN_SHIFT 4
43#define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2)
44#define RPR0521_ALS_DATA1_GAIN_SHIFT 2
45#define RPR0521_PXS_GAIN_MASK GENMASK(5, 4)
46#define RPR0521_PXS_GAIN_SHIFT 4
47#define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0)
48#define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0)
49#define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1)
50#define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3)
51#define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6)
52#define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7)
53
54#define RPR0521_MODE_ALS_ENABLE BIT(7)
55#define RPR0521_MODE_ALS_DISABLE 0x00
56#define RPR0521_MODE_PXS_ENABLE BIT(6)
57#define RPR0521_MODE_PXS_DISABLE 0x00
58#define RPR0521_PXS_PERSISTENCE_DRDY 0x00
59
60#define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0)
61#define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00
62#define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1)
63#define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00
64#define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3)
65#define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00
66
67#define RPR0521_MANUFACT_ID 0xE0
68#define RPR0521_DEFAULT_MEAS_TIME 0x06
69
70#define RPR0521_DRV_NAME "RPR0521"
71#define RPR0521_IRQ_NAME "rpr0521_event"
72#define RPR0521_REGMAP_NAME "rpr0521_regmap"
73
74#define RPR0521_SLEEP_DELAY_MS 2000
75
76#define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1"
77#define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1"
78
79struct rpr0521_gain {
80 int scale;
81 int uscale;
82};
83
84static const struct rpr0521_gain rpr0521_als_gain[4] = {
85 {1, 0},
86 {0, 500000},
87 {0, 15625},
88 {0, 7812},
89};
90
91static const struct rpr0521_gain rpr0521_pxs_gain[3] = {
92 {1, 0},
93 {0, 500000},
94 {0, 125000},
95};
96
97enum rpr0521_channel {
98 RPR0521_CHAN_PXS,
99 RPR0521_CHAN_ALS_DATA0,
100 RPR0521_CHAN_ALS_DATA1,
101};
102
103struct rpr0521_reg_desc {
104 u8 address;
105 u8 device_mask;
106};
107
108static const struct rpr0521_reg_desc rpr0521_data_reg[] = {
109 [RPR0521_CHAN_PXS] = {
110 .address = RPR0521_REG_PXS_DATA,
111 .device_mask = RPR0521_MODE_PXS_MASK,
112 },
113 [RPR0521_CHAN_ALS_DATA0] = {
114 .address = RPR0521_REG_ALS_DATA0,
115 .device_mask = RPR0521_MODE_ALS_MASK,
116 },
117 [RPR0521_CHAN_ALS_DATA1] = {
118 .address = RPR0521_REG_ALS_DATA1,
119 .device_mask = RPR0521_MODE_ALS_MASK,
120 },
121};
122
123static const struct rpr0521_gain_info {
124 u8 reg;
125 u8 mask;
126 u8 shift;
127 const struct rpr0521_gain *gain;
128 int size;
129} rpr0521_gain[] = {
130 [RPR0521_CHAN_PXS] = {
131 .reg = RPR0521_REG_PXS_CTRL,
132 .mask = RPR0521_PXS_GAIN_MASK,
133 .shift = RPR0521_PXS_GAIN_SHIFT,
134 .gain = rpr0521_pxs_gain,
135 .size = ARRAY_SIZE(rpr0521_pxs_gain),
136 },
137 [RPR0521_CHAN_ALS_DATA0] = {
138 .reg = RPR0521_REG_ALS_CTRL,
139 .mask = RPR0521_ALS_DATA0_GAIN_MASK,
140 .shift = RPR0521_ALS_DATA0_GAIN_SHIFT,
141 .gain = rpr0521_als_gain,
142 .size = ARRAY_SIZE(rpr0521_als_gain),
143 },
144 [RPR0521_CHAN_ALS_DATA1] = {
145 .reg = RPR0521_REG_ALS_CTRL,
146 .mask = RPR0521_ALS_DATA1_GAIN_MASK,
147 .shift = RPR0521_ALS_DATA1_GAIN_SHIFT,
148 .gain = rpr0521_als_gain,
149 .size = ARRAY_SIZE(rpr0521_als_gain),
150 },
151};
152
153struct rpr0521_samp_freq {
154 int als_hz;
155 int als_uhz;
156 int pxs_hz;
157 int pxs_uhz;
158};
159
160static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = {
161
162 {0, 0, 0, 0},
163 {0, 0, 100, 0},
164 {0, 0, 25, 0},
165 {0, 0, 10, 0},
166 {0, 0, 2, 500000},
167 {10, 0, 20, 0},
168 {10, 0, 10, 0},
169 {10, 0, 2, 500000},
170 {2, 500000, 20, 0},
171 {2, 500000, 10, 0},
172 {2, 500000, 0, 0},
173 {2, 500000, 2, 500000},
174 {20, 0, 20, 0}
175};
176
177struct rpr0521_data {
178 struct i2c_client *client;
179
180
181 struct mutex lock;
182
183
184 bool als_dev_en;
185 bool pxs_dev_en;
186
187 struct iio_trigger *drdy_trigger0;
188 s64 irq_timestamp;
189
190
191 bool als_ps_need_en;
192 bool pxs_ps_need_en;
193 bool als_need_dis;
194 bool pxs_need_dis;
195
196 struct regmap *regmap;
197};
198
199static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL);
200static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL);
201
202
203
204
205
206static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10");
207
208static struct attribute *rpr0521_attributes[] = {
209 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
210 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
211 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
212 NULL,
213};
214
215static const struct attribute_group rpr0521_attribute_group = {
216 .attrs = rpr0521_attributes,
217};
218
219
220enum rpr0521_scan_index_order {
221 RPR0521_CHAN_INDEX_PXS,
222 RPR0521_CHAN_INDEX_BOTH,
223 RPR0521_CHAN_INDEX_IR,
224};
225
226static const unsigned long rpr0521_available_scan_masks[] = {
227 BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) |
228 BIT(RPR0521_CHAN_INDEX_IR),
229 0
230};
231
232static const struct iio_chan_spec rpr0521_channels[] = {
233 {
234 .type = IIO_PROXIMITY,
235 .address = RPR0521_CHAN_PXS,
236 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
237 BIT(IIO_CHAN_INFO_OFFSET) |
238 BIT(IIO_CHAN_INFO_SCALE),
239 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
240 .scan_index = RPR0521_CHAN_INDEX_PXS,
241 .scan_type = {
242 .sign = 'u',
243 .realbits = 16,
244 .storagebits = 16,
245 .endianness = IIO_LE,
246 },
247 },
248 {
249 .type = IIO_INTENSITY,
250 .modified = 1,
251 .address = RPR0521_CHAN_ALS_DATA0,
252 .channel2 = IIO_MOD_LIGHT_BOTH,
253 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
254 BIT(IIO_CHAN_INFO_SCALE),
255 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
256 .scan_index = RPR0521_CHAN_INDEX_BOTH,
257 .scan_type = {
258 .sign = 'u',
259 .realbits = 16,
260 .storagebits = 16,
261 .endianness = IIO_LE,
262 },
263 },
264 {
265 .type = IIO_INTENSITY,
266 .modified = 1,
267 .address = RPR0521_CHAN_ALS_DATA1,
268 .channel2 = IIO_MOD_LIGHT_IR,
269 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
270 BIT(IIO_CHAN_INFO_SCALE),
271 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
272 .scan_index = RPR0521_CHAN_INDEX_IR,
273 .scan_type = {
274 .sign = 'u',
275 .realbits = 16,
276 .storagebits = 16,
277 .endianness = IIO_LE,
278 },
279 },
280};
281
282static int rpr0521_als_enable(struct rpr0521_data *data, u8 status)
283{
284 int ret;
285
286 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
287 RPR0521_MODE_ALS_MASK,
288 status);
289 if (ret < 0)
290 return ret;
291
292 if (status & RPR0521_MODE_ALS_MASK)
293 data->als_dev_en = true;
294 else
295 data->als_dev_en = false;
296
297 return 0;
298}
299
300static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status)
301{
302 int ret;
303
304 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
305 RPR0521_MODE_PXS_MASK,
306 status);
307 if (ret < 0)
308 return ret;
309
310 if (status & RPR0521_MODE_PXS_MASK)
311 data->pxs_dev_en = true;
312 else
313 data->pxs_dev_en = false;
314
315 return 0;
316}
317
318
319
320
321
322
323
324
325
326
327
328static int rpr0521_set_power_state(struct rpr0521_data *data, bool on,
329 u8 device_mask)
330{
331#ifdef CONFIG_PM
332 int ret;
333
334 if (device_mask & RPR0521_MODE_ALS_MASK) {
335 data->als_ps_need_en = on;
336 data->als_need_dis = !on;
337 }
338
339 if (device_mask & RPR0521_MODE_PXS_MASK) {
340 data->pxs_ps_need_en = on;
341 data->pxs_need_dis = !on;
342 }
343
344
345
346
347
348
349
350
351 if (on) {
352 ret = pm_runtime_get_sync(&data->client->dev);
353 } else {
354 pm_runtime_mark_last_busy(&data->client->dev);
355 ret = pm_runtime_put_autosuspend(&data->client->dev);
356 }
357 if (ret < 0) {
358 dev_err(&data->client->dev,
359 "Failed: rpr0521_set_power_state for %d, ret %d\n",
360 on, ret);
361 if (on)
362 pm_runtime_put_noidle(&data->client->dev);
363
364 return ret;
365 }
366
367 if (on) {
368
369 if (data->als_ps_need_en) {
370 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
371 if (ret)
372 return ret;
373 data->als_ps_need_en = false;
374 }
375
376 if (data->pxs_ps_need_en) {
377 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
378 if (ret)
379 return ret;
380 data->pxs_ps_need_en = false;
381 }
382 }
383#endif
384 return 0;
385}
386
387
388static inline bool rpr0521_is_triggered(struct rpr0521_data *data)
389{
390 int ret;
391 int reg;
392
393 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®);
394 if (ret < 0)
395 return false;
396 if (reg &
397 (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK |
398 RPR0521_INTERRUPT_PS_INT_STATUS_MASK))
399 return true;
400 else
401 return false;
402}
403
404
405static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private)
406{
407 struct iio_dev *indio_dev = private;
408 struct rpr0521_data *data = iio_priv(indio_dev);
409
410 data->irq_timestamp = iio_get_time_ns(indio_dev);
411
412
413
414
415
416
417 return IRQ_WAKE_THREAD;
418}
419
420static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private)
421{
422 struct iio_dev *indio_dev = private;
423 struct rpr0521_data *data = iio_priv(indio_dev);
424
425 if (rpr0521_is_triggered(data)) {
426 iio_trigger_poll_chained(data->drdy_trigger0);
427 return IRQ_HANDLED;
428 }
429
430 return IRQ_NONE;
431}
432
433static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p)
434{
435 struct iio_poll_func *pf = p;
436 struct iio_dev *indio_dev = pf->indio_dev;
437
438
439 if (!iio_trigger_using_own(indio_dev))
440 pf->timestamp = iio_get_time_ns(indio_dev);
441
442 return IRQ_WAKE_THREAD;
443}
444
445static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p)
446{
447 struct iio_poll_func *pf = p;
448 struct iio_dev *indio_dev = pf->indio_dev;
449 struct rpr0521_data *data = iio_priv(indio_dev);
450 int err;
451
452 u8 buffer[16];
453
454
455 if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) {
456 pf->timestamp = data->irq_timestamp;
457 data->irq_timestamp = 0;
458 }
459
460 if (!pf->timestamp)
461 pf->timestamp = iio_get_time_ns(indio_dev);
462
463 err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA,
464 &buffer,
465 (3 * 2) + 1);
466 if (!err)
467 iio_push_to_buffers_with_timestamp(indio_dev,
468 buffer, pf->timestamp);
469 else
470 dev_err(&data->client->dev,
471 "Trigger consumer can't read from sensor.\n");
472 pf->timestamp = 0;
473
474 iio_trigger_notify_done(indio_dev->trig);
475
476 return IRQ_HANDLED;
477}
478
479static int rpr0521_write_int_enable(struct rpr0521_data *data)
480{
481 int err;
482
483
484 err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL,
485 RPR0521_PXS_PERSISTENCE_MASK,
486 RPR0521_PXS_PERSISTENCE_DRDY);
487 if (err) {
488 dev_err(&data->client->dev, "PS control reg write fail.\n");
489 return -EBUSY;
490 }
491
492
493 err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
494 RPR0521_INTERRUPT_INT_REASSERT_DISABLE |
495 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
496 RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE
497 );
498 if (err) {
499 dev_err(&data->client->dev, "Interrupt setup write fail.\n");
500 return -EBUSY;
501 }
502
503 return 0;
504}
505
506static int rpr0521_write_int_disable(struct rpr0521_data *data)
507{
508
509 return regmap_write(data->regmap, RPR0521_REG_INTERRUPT,
510 RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE |
511 RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE
512 );
513}
514
515
516
517
518
519static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger,
520 bool enable_drdy)
521{
522 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger);
523 struct rpr0521_data *data = iio_priv(indio_dev);
524 int err;
525
526 if (enable_drdy)
527 err = rpr0521_write_int_enable(data);
528 else
529 err = rpr0521_write_int_disable(data);
530 if (err)
531 dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n");
532
533 return err;
534}
535
536static const struct iio_trigger_ops rpr0521_trigger_ops = {
537 .set_trigger_state = rpr0521_pxs_drdy_set_state,
538 };
539
540
541static int rpr0521_buffer_preenable(struct iio_dev *indio_dev)
542{
543 int err;
544 struct rpr0521_data *data = iio_priv(indio_dev);
545
546 mutex_lock(&data->lock);
547 err = rpr0521_set_power_state(data, true,
548 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
549 mutex_unlock(&data->lock);
550 if (err)
551 dev_err(&data->client->dev, "_buffer_preenable fail\n");
552
553 return err;
554}
555
556static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev)
557{
558 int err;
559 struct rpr0521_data *data = iio_priv(indio_dev);
560
561 mutex_lock(&data->lock);
562 err = rpr0521_set_power_state(data, false,
563 (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK));
564 mutex_unlock(&data->lock);
565 if (err)
566 dev_err(&data->client->dev, "_buffer_postdisable fail\n");
567
568 return err;
569}
570
571static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = {
572 .preenable = rpr0521_buffer_preenable,
573 .postenable = iio_triggered_buffer_postenable,
574 .predisable = iio_triggered_buffer_predisable,
575 .postdisable = rpr0521_buffer_postdisable,
576};
577
578static int rpr0521_get_gain(struct rpr0521_data *data, int chan,
579 int *val, int *val2)
580{
581 int ret, reg, idx;
582
583 ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®);
584 if (ret < 0)
585 return ret;
586
587 idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift;
588 *val = rpr0521_gain[chan].gain[idx].scale;
589 *val2 = rpr0521_gain[chan].gain[idx].uscale;
590
591 return 0;
592}
593
594static int rpr0521_set_gain(struct rpr0521_data *data, int chan,
595 int val, int val2)
596{
597 int i, idx = -EINVAL;
598
599
600 for (i = 0; i < rpr0521_gain[chan].size; i++)
601 if (val == rpr0521_gain[chan].gain[i].scale &&
602 val2 == rpr0521_gain[chan].gain[i].uscale) {
603 idx = i;
604 break;
605 }
606
607 if (idx < 0)
608 return idx;
609
610 return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg,
611 rpr0521_gain[chan].mask,
612 idx << rpr0521_gain[chan].shift);
613}
614
615static int rpr0521_read_samp_freq(struct rpr0521_data *data,
616 enum iio_chan_type chan_type,
617 int *val, int *val2)
618{
619 int reg, ret;
620
621 ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®);
622 if (ret < 0)
623 return ret;
624
625 reg &= RPR0521_MODE_MEAS_TIME_MASK;
626 if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i))
627 return -EINVAL;
628
629 switch (chan_type) {
630 case IIO_INTENSITY:
631 *val = rpr0521_samp_freq_i[reg].als_hz;
632 *val2 = rpr0521_samp_freq_i[reg].als_uhz;
633 return 0;
634
635 case IIO_PROXIMITY:
636 *val = rpr0521_samp_freq_i[reg].pxs_hz;
637 *val2 = rpr0521_samp_freq_i[reg].pxs_uhz;
638 return 0;
639
640 default:
641 return -EINVAL;
642 }
643}
644
645static int rpr0521_write_samp_freq_common(struct rpr0521_data *data,
646 enum iio_chan_type chan_type,
647 int val, int val2)
648{
649 int i;
650
651
652
653
654
655 switch (val) {
656 case 0:
657 i = 0;
658 break;
659
660 case 2:
661 if (val2 != 500000)
662 return -EINVAL;
663
664 i = 11;
665 break;
666
667 case 10:
668 i = 6;
669 break;
670
671 default:
672 return -EINVAL;
673 }
674
675 return regmap_update_bits(data->regmap,
676 RPR0521_REG_MODE_CTRL,
677 RPR0521_MODE_MEAS_TIME_MASK,
678 i);
679}
680
681static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset)
682{
683 int ret;
684 __le16 buffer;
685
686 ret = regmap_bulk_read(data->regmap,
687 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
688
689 if (ret < 0) {
690 dev_err(&data->client->dev, "Failed to read PS OFFSET register\n");
691 return ret;
692 }
693 *offset = le16_to_cpu(buffer);
694
695 return ret;
696}
697
698static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset)
699{
700 int ret;
701 __le16 buffer;
702
703 buffer = cpu_to_le16(offset & 0x3ff);
704 ret = regmap_raw_write(data->regmap,
705 RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer));
706
707 if (ret < 0) {
708 dev_err(&data->client->dev, "Failed to write PS OFFSET register\n");
709 return ret;
710 }
711
712 return ret;
713}
714
715static int rpr0521_read_raw(struct iio_dev *indio_dev,
716 struct iio_chan_spec const *chan, int *val,
717 int *val2, long mask)
718{
719 struct rpr0521_data *data = iio_priv(indio_dev);
720 int ret;
721 int busy;
722 u8 device_mask;
723 __le16 raw_data;
724
725 switch (mask) {
726 case IIO_CHAN_INFO_RAW:
727 if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY)
728 return -EINVAL;
729
730 busy = iio_device_claim_direct_mode(indio_dev);
731 if (busy)
732 return -EBUSY;
733
734 device_mask = rpr0521_data_reg[chan->address].device_mask;
735
736 mutex_lock(&data->lock);
737 ret = rpr0521_set_power_state(data, true, device_mask);
738 if (ret < 0)
739 goto rpr0521_read_raw_out;
740
741 ret = regmap_bulk_read(data->regmap,
742 rpr0521_data_reg[chan->address].address,
743 &raw_data, sizeof(raw_data));
744 if (ret < 0) {
745 rpr0521_set_power_state(data, false, device_mask);
746 goto rpr0521_read_raw_out;
747 }
748
749 ret = rpr0521_set_power_state(data, false, device_mask);
750
751rpr0521_read_raw_out:
752 mutex_unlock(&data->lock);
753 iio_device_release_direct_mode(indio_dev);
754 if (ret < 0)
755 return ret;
756
757 *val = le16_to_cpu(raw_data);
758
759 return IIO_VAL_INT;
760
761 case IIO_CHAN_INFO_SCALE:
762 mutex_lock(&data->lock);
763 ret = rpr0521_get_gain(data, chan->address, val, val2);
764 mutex_unlock(&data->lock);
765 if (ret < 0)
766 return ret;
767
768 return IIO_VAL_INT_PLUS_MICRO;
769
770 case IIO_CHAN_INFO_SAMP_FREQ:
771 mutex_lock(&data->lock);
772 ret = rpr0521_read_samp_freq(data, chan->type, val, val2);
773 mutex_unlock(&data->lock);
774 if (ret < 0)
775 return ret;
776
777 return IIO_VAL_INT_PLUS_MICRO;
778
779 case IIO_CHAN_INFO_OFFSET:
780 mutex_lock(&data->lock);
781 ret = rpr0521_read_ps_offset(data, val);
782 mutex_unlock(&data->lock);
783 if (ret < 0)
784 return ret;
785
786 return IIO_VAL_INT;
787
788 default:
789 return -EINVAL;
790 }
791}
792
793static int rpr0521_write_raw(struct iio_dev *indio_dev,
794 struct iio_chan_spec const *chan, int val,
795 int val2, long mask)
796{
797 struct rpr0521_data *data = iio_priv(indio_dev);
798 int ret;
799
800 switch (mask) {
801 case IIO_CHAN_INFO_SCALE:
802 mutex_lock(&data->lock);
803 ret = rpr0521_set_gain(data, chan->address, val, val2);
804 mutex_unlock(&data->lock);
805
806 return ret;
807
808 case IIO_CHAN_INFO_SAMP_FREQ:
809 mutex_lock(&data->lock);
810 ret = rpr0521_write_samp_freq_common(data, chan->type,
811 val, val2);
812 mutex_unlock(&data->lock);
813
814 return ret;
815
816 case IIO_CHAN_INFO_OFFSET:
817 mutex_lock(&data->lock);
818 ret = rpr0521_write_ps_offset(data, val);
819 mutex_unlock(&data->lock);
820
821 return ret;
822
823 default:
824 return -EINVAL;
825 }
826}
827
828static const struct iio_info rpr0521_info = {
829 .read_raw = rpr0521_read_raw,
830 .write_raw = rpr0521_write_raw,
831 .attrs = &rpr0521_attribute_group,
832};
833
834static int rpr0521_init(struct rpr0521_data *data)
835{
836 int ret;
837 int id;
838
839 ret = regmap_read(data->regmap, RPR0521_REG_ID, &id);
840 if (ret < 0) {
841 dev_err(&data->client->dev, "Failed to read REG_ID register\n");
842 return ret;
843 }
844
845 if (id != RPR0521_MANUFACT_ID) {
846 dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n",
847 id, RPR0521_MANUFACT_ID);
848 return -ENODEV;
849 }
850
851
852 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
853 RPR0521_MODE_MEAS_TIME_MASK,
854 RPR0521_DEFAULT_MEAS_TIME);
855 if (ret) {
856 pr_err("regmap_update_bits returned %d\n", ret);
857 return ret;
858 }
859
860#ifndef CONFIG_PM
861 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
862 if (ret < 0)
863 return ret;
864 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
865 if (ret < 0)
866 return ret;
867#endif
868
869 data->irq_timestamp = 0;
870
871 return 0;
872}
873
874static int rpr0521_poweroff(struct rpr0521_data *data)
875{
876 int ret;
877 int tmp;
878
879 ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL,
880 RPR0521_MODE_ALS_MASK |
881 RPR0521_MODE_PXS_MASK,
882 RPR0521_MODE_ALS_DISABLE |
883 RPR0521_MODE_PXS_DISABLE);
884 if (ret < 0)
885 return ret;
886
887 data->als_dev_en = false;
888 data->pxs_dev_en = false;
889
890
891
892
893
894 ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp);
895 if (ret) {
896 dev_err(&data->client->dev, "Failed to reset int pin.\n");
897 return ret;
898 }
899
900 return 0;
901}
902
903static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg)
904{
905 switch (reg) {
906 case RPR0521_REG_MODE_CTRL:
907 case RPR0521_REG_ALS_CTRL:
908 case RPR0521_REG_PXS_CTRL:
909 return false;
910 default:
911 return true;
912 }
913}
914
915static const struct regmap_config rpr0521_regmap_config = {
916 .name = RPR0521_REGMAP_NAME,
917
918 .reg_bits = 8,
919 .val_bits = 8,
920
921 .max_register = RPR0521_REG_ID,
922 .cache_type = REGCACHE_RBTREE,
923 .volatile_reg = rpr0521_is_volatile_reg,
924};
925
926static int rpr0521_probe(struct i2c_client *client,
927 const struct i2c_device_id *id)
928{
929 struct rpr0521_data *data;
930 struct iio_dev *indio_dev;
931 struct regmap *regmap;
932 int ret;
933
934 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
935 if (!indio_dev)
936 return -ENOMEM;
937
938 regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config);
939 if (IS_ERR(regmap)) {
940 dev_err(&client->dev, "regmap_init failed!\n");
941 return PTR_ERR(regmap);
942 }
943
944 data = iio_priv(indio_dev);
945 i2c_set_clientdata(client, indio_dev);
946 data->client = client;
947 data->regmap = regmap;
948
949 mutex_init(&data->lock);
950
951 indio_dev->dev.parent = &client->dev;
952 indio_dev->info = &rpr0521_info;
953 indio_dev->name = RPR0521_DRV_NAME;
954 indio_dev->channels = rpr0521_channels;
955 indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels);
956 indio_dev->modes = INDIO_DIRECT_MODE;
957
958 ret = rpr0521_init(data);
959 if (ret < 0) {
960 dev_err(&client->dev, "rpr0521 chip init failed\n");
961 return ret;
962 }
963
964 ret = pm_runtime_set_active(&client->dev);
965 if (ret < 0)
966 goto err_poweroff;
967
968 pm_runtime_enable(&client->dev);
969 pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS);
970 pm_runtime_use_autosuspend(&client->dev);
971
972
973
974
975
976
977
978 if (client->irq) {
979
980 data->drdy_trigger0 = devm_iio_trigger_alloc(
981 indio_dev->dev.parent,
982 "%s-dev%d", indio_dev->name, indio_dev->id);
983 if (!data->drdy_trigger0) {
984 ret = -ENOMEM;
985 goto err_pm_disable;
986 }
987 data->drdy_trigger0->dev.parent = indio_dev->dev.parent;
988 data->drdy_trigger0->ops = &rpr0521_trigger_ops;
989 indio_dev->available_scan_masks = rpr0521_available_scan_masks;
990 iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev);
991
992
993 ret = devm_request_threaded_irq(&client->dev, client->irq,
994 rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread,
995 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
996 RPR0521_IRQ_NAME, indio_dev);
997 if (ret < 0) {
998 dev_err(&client->dev, "request irq %d for trigger0 failed\n",
999 client->irq);
1000 goto err_pm_disable;
1001 }
1002
1003 ret = devm_iio_trigger_register(indio_dev->dev.parent,
1004 data->drdy_trigger0);
1005 if (ret) {
1006 dev_err(&client->dev, "iio trigger register failed\n");
1007 goto err_pm_disable;
1008 }
1009
1010
1011
1012
1013
1014
1015
1016 ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent,
1017 indio_dev,
1018 rpr0521_trigger_consumer_store_time,
1019 rpr0521_trigger_consumer_handler,
1020 &rpr0521_buffer_setup_ops);
1021 if (ret < 0) {
1022 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1023 goto err_pm_disable;
1024 }
1025 }
1026
1027 ret = iio_device_register(indio_dev);
1028 if (ret)
1029 goto err_pm_disable;
1030
1031 return 0;
1032
1033err_pm_disable:
1034 pm_runtime_disable(&client->dev);
1035 pm_runtime_set_suspended(&client->dev);
1036 pm_runtime_put_noidle(&client->dev);
1037err_poweroff:
1038 rpr0521_poweroff(data);
1039
1040 return ret;
1041}
1042
1043static int rpr0521_remove(struct i2c_client *client)
1044{
1045 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1046
1047 iio_device_unregister(indio_dev);
1048
1049 pm_runtime_disable(&client->dev);
1050 pm_runtime_set_suspended(&client->dev);
1051 pm_runtime_put_noidle(&client->dev);
1052
1053 rpr0521_poweroff(iio_priv(indio_dev));
1054
1055 return 0;
1056}
1057
1058#ifdef CONFIG_PM
1059static int rpr0521_runtime_suspend(struct device *dev)
1060{
1061 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1062 struct rpr0521_data *data = iio_priv(indio_dev);
1063 int ret;
1064
1065 mutex_lock(&data->lock);
1066
1067 if (!data->als_need_dis)
1068 data->als_ps_need_en = data->als_dev_en;
1069 if (!data->pxs_need_dis)
1070 data->pxs_ps_need_en = data->pxs_dev_en;
1071
1072
1073 ret = rpr0521_poweroff(data);
1074 regcache_mark_dirty(data->regmap);
1075 mutex_unlock(&data->lock);
1076
1077 return ret;
1078}
1079
1080static int rpr0521_runtime_resume(struct device *dev)
1081{
1082 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1083 struct rpr0521_data *data = iio_priv(indio_dev);
1084 int ret;
1085
1086 regcache_sync(data->regmap);
1087 if (data->als_ps_need_en) {
1088 ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE);
1089 if (ret < 0)
1090 return ret;
1091 data->als_ps_need_en = false;
1092 }
1093
1094 if (data->pxs_ps_need_en) {
1095 ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE);
1096 if (ret < 0)
1097 return ret;
1098 data->pxs_ps_need_en = false;
1099 }
1100 msleep(100);
1101
1102 return 0;
1103}
1104#endif
1105
1106static const struct dev_pm_ops rpr0521_pm_ops = {
1107 SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend,
1108 rpr0521_runtime_resume, NULL)
1109};
1110
1111static const struct acpi_device_id rpr0521_acpi_match[] = {
1112 {"RPR0521", 0},
1113 { }
1114};
1115MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match);
1116
1117static const struct i2c_device_id rpr0521_id[] = {
1118 {"rpr0521", 0},
1119 { }
1120};
1121
1122MODULE_DEVICE_TABLE(i2c, rpr0521_id);
1123
1124static struct i2c_driver rpr0521_driver = {
1125 .driver = {
1126 .name = RPR0521_DRV_NAME,
1127 .pm = &rpr0521_pm_ops,
1128 .acpi_match_table = ACPI_PTR(rpr0521_acpi_match),
1129 },
1130 .probe = rpr0521_probe,
1131 .remove = rpr0521_remove,
1132 .id_table = rpr0521_id,
1133};
1134
1135module_i2c_driver(rpr0521_driver);
1136
1137MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1138MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver");
1139MODULE_LICENSE("GPL v2");
1140