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14#include <linux/module.h>
15#include <linux/i2c.h>
16#include <linux/err.h>
17#include <linux/slab.h>
18#include <linux/delay.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
24#include <linux/iio/trigger.h>
25#include <linux/iio/trigger_consumer.h>
26#include <linux/iio/triggered_buffer.h>
27#include <linux/iio/buffer.h>
28#include <linux/util_macros.h>
29
30#define SI1145_REG_PART_ID 0x00
31#define SI1145_REG_REV_ID 0x01
32#define SI1145_REG_SEQ_ID 0x02
33#define SI1145_REG_INT_CFG 0x03
34#define SI1145_REG_IRQ_ENABLE 0x04
35#define SI1145_REG_IRQ_MODE 0x05
36#define SI1145_REG_HW_KEY 0x07
37#define SI1145_REG_MEAS_RATE 0x08
38#define SI1145_REG_PS_LED21 0x0f
39#define SI1145_REG_PS_LED3 0x10
40#define SI1145_REG_UCOEF1 0x13
41#define SI1145_REG_UCOEF2 0x14
42#define SI1145_REG_UCOEF3 0x15
43#define SI1145_REG_UCOEF4 0x16
44#define SI1145_REG_PARAM_WR 0x17
45#define SI1145_REG_COMMAND 0x18
46#define SI1145_REG_RESPONSE 0x20
47#define SI1145_REG_IRQ_STATUS 0x21
48#define SI1145_REG_ALSVIS_DATA 0x22
49#define SI1145_REG_ALSIR_DATA 0x24
50#define SI1145_REG_PS1_DATA 0x26
51#define SI1145_REG_PS2_DATA 0x28
52#define SI1145_REG_PS3_DATA 0x2a
53#define SI1145_REG_AUX_DATA 0x2c
54#define SI1145_REG_PARAM_RD 0x2e
55#define SI1145_REG_CHIP_STAT 0x30
56
57#define SI1145_UCOEF1_DEFAULT 0x7b
58#define SI1145_UCOEF2_DEFAULT 0x6b
59#define SI1145_UCOEF3_DEFAULT 0x01
60#define SI1145_UCOEF4_DEFAULT 0x00
61
62
63#define SI1145_PS_LED_REG(ch) \
64 (((ch) == 2) ? SI1145_REG_PS_LED3 : SI1145_REG_PS_LED21)
65#define SI1145_PS_LED_SHIFT(ch) \
66 (((ch) == 1) ? 4 : 0)
67
68
69#define SI1145_PARAM_CHLIST 0x01
70#define SI1145_PARAM_PSLED12_SELECT 0x02
71#define SI1145_PARAM_PSLED3_SELECT 0x03
72#define SI1145_PARAM_PS_ENCODING 0x05
73#define SI1145_PARAM_ALS_ENCODING 0x06
74#define SI1145_PARAM_PS1_ADC_MUX 0x07
75#define SI1145_PARAM_PS2_ADC_MUX 0x08
76#define SI1145_PARAM_PS3_ADC_MUX 0x09
77#define SI1145_PARAM_PS_ADC_COUNTER 0x0a
78#define SI1145_PARAM_PS_ADC_GAIN 0x0b
79#define SI1145_PARAM_PS_ADC_MISC 0x0c
80#define SI1145_PARAM_ALS_ADC_MUX 0x0d
81#define SI1145_PARAM_ALSIR_ADC_MUX 0x0e
82#define SI1145_PARAM_AUX_ADC_MUX 0x0f
83#define SI1145_PARAM_ALSVIS_ADC_COUNTER 0x10
84#define SI1145_PARAM_ALSVIS_ADC_GAIN 0x11
85#define SI1145_PARAM_ALSVIS_ADC_MISC 0x12
86#define SI1145_PARAM_LED_RECOVERY 0x1c
87#define SI1145_PARAM_ALSIR_ADC_COUNTER 0x1d
88#define SI1145_PARAM_ALSIR_ADC_GAIN 0x1e
89#define SI1145_PARAM_ALSIR_ADC_MISC 0x1f
90#define SI1145_PARAM_ADC_OFFSET 0x1a
91
92
93#define SI1145_CHLIST_EN_PS1 BIT(0)
94#define SI1145_CHLIST_EN_PS2 BIT(1)
95#define SI1145_CHLIST_EN_PS3 BIT(2)
96#define SI1145_CHLIST_EN_ALSVIS BIT(4)
97#define SI1145_CHLIST_EN_ALSIR BIT(5)
98#define SI1145_CHLIST_EN_AUX BIT(6)
99#define SI1145_CHLIST_EN_UV BIT(7)
100
101
102#define SI1145_PS_ADC_MODE_NORMAL BIT(2)
103
104#define SI1145_ADC_MISC_RANGE BIT(5)
105
106
107#define SI1145_CMD_NOP 0x00
108#define SI1145_CMD_RESET 0x01
109#define SI1145_CMD_PS_FORCE 0x05
110#define SI1145_CMD_ALS_FORCE 0x06
111#define SI1145_CMD_PSALS_FORCE 0x07
112#define SI1145_CMD_PS_PAUSE 0x09
113#define SI1145_CMD_ALS_PAUSE 0x0a
114#define SI1145_CMD_PSALS_PAUSE 0x0b
115#define SI1145_CMD_PS_AUTO 0x0d
116#define SI1145_CMD_ALS_AUTO 0x0e
117#define SI1145_CMD_PSALS_AUTO 0x0f
118#define SI1145_CMD_PARAM_QUERY 0x80
119#define SI1145_CMD_PARAM_SET 0xa0
120
121#define SI1145_RSP_INVALID_SETTING 0x80
122#define SI1145_RSP_COUNTER_MASK 0x0F
123
124
125#define SI1145_COMMAND_MINSLEEP_MS 5
126
127#define SI1145_COMMAND_TIMEOUT_MS 25
128
129
130#define SI1145_INT_CFG_OE BIT(0)
131#define SI1145_INT_CFG_MODE BIT(1)
132
133
134#define SI1145_MASK_ALL_IE (BIT(4) | BIT(3) | BIT(2) | BIT(0))
135
136#define SI1145_MUX_TEMP 0x65
137#define SI1145_MUX_VDD 0x75
138
139
140#define SI1145_LED_CURRENT_45mA 0x04
141
142enum {
143 SI1132,
144 SI1141,
145 SI1142,
146 SI1143,
147 SI1145,
148 SI1146,
149 SI1147,
150};
151
152struct si1145_part_info {
153 u8 part;
154 const struct iio_info *iio_info;
155 const struct iio_chan_spec *channels;
156 unsigned int num_channels;
157 unsigned int num_leds;
158 bool uncompressed_meas_rate;
159};
160
161
162
163
164
165
166
167
168
169
170
171
172
173struct si1145_data {
174 struct i2c_client *client;
175 struct mutex lock;
176 struct mutex cmdlock;
177 int rsp_seq;
178 const struct si1145_part_info *part_info;
179 unsigned long scan_mask;
180 bool autonomous;
181 struct iio_trigger *trig;
182 int meas_rate;
183};
184
185
186
187
188
189
190
191
192static int __si1145_command_reset(struct si1145_data *data)
193{
194 struct device *dev = &data->client->dev;
195 unsigned long stop_jiffies;
196 int ret;
197
198 ret = i2c_smbus_write_byte_data(data->client, SI1145_REG_COMMAND,
199 SI1145_CMD_NOP);
200 if (ret < 0)
201 return ret;
202 msleep(SI1145_COMMAND_MINSLEEP_MS);
203
204 stop_jiffies = jiffies + SI1145_COMMAND_TIMEOUT_MS * HZ / 1000;
205 while (true) {
206 ret = i2c_smbus_read_byte_data(data->client,
207 SI1145_REG_RESPONSE);
208 if (ret <= 0)
209 return ret;
210 if (time_after(jiffies, stop_jiffies)) {
211 dev_warn(dev, "timeout on reset\n");
212 return -ETIMEDOUT;
213 }
214 msleep(SI1145_COMMAND_MINSLEEP_MS);
215 continue;
216 }
217}
218
219
220
221
222
223
224
225
226
227
228static int si1145_command(struct si1145_data *data, u8 cmd)
229{
230 struct device *dev = &data->client->dev;
231 unsigned long stop_jiffies;
232 int ret;
233
234 mutex_lock(&data->cmdlock);
235
236 if (data->rsp_seq < 0) {
237 ret = __si1145_command_reset(data);
238 if (ret < 0) {
239 dev_err(dev, "failed to reset command counter, ret=%d\n",
240 ret);
241 goto out;
242 }
243 data->rsp_seq = 0;
244 }
245
246 ret = i2c_smbus_write_byte_data(data->client, SI1145_REG_COMMAND, cmd);
247 if (ret) {
248 dev_warn(dev, "failed to write command, ret=%d\n", ret);
249 goto out;
250 }
251
252 msleep(SI1145_COMMAND_MINSLEEP_MS);
253
254 stop_jiffies = jiffies + SI1145_COMMAND_TIMEOUT_MS * HZ / 1000;
255 while (true) {
256 ret = i2c_smbus_read_byte_data(data->client,
257 SI1145_REG_RESPONSE);
258 if (ret < 0) {
259 dev_warn(dev, "failed to read response, ret=%d\n", ret);
260 break;
261 }
262
263 if ((ret & ~SI1145_RSP_COUNTER_MASK) == 0) {
264 if (ret == data->rsp_seq) {
265 if (time_after(jiffies, stop_jiffies)) {
266 dev_warn(dev, "timeout on command %#02hhx\n",
267 cmd);
268 ret = -ETIMEDOUT;
269 break;
270 }
271 msleep(SI1145_COMMAND_MINSLEEP_MS);
272 continue;
273 }
274 if (ret == ((data->rsp_seq + 1) &
275 SI1145_RSP_COUNTER_MASK)) {
276 data->rsp_seq = ret;
277 ret = 0;
278 break;
279 }
280 dev_warn(dev, "unexpected response counter %d instead of %d\n",
281 ret, (data->rsp_seq + 1) &
282 SI1145_RSP_COUNTER_MASK);
283 ret = -EIO;
284 } else {
285 if (ret == SI1145_RSP_INVALID_SETTING) {
286 dev_warn(dev, "INVALID_SETTING error on command %#02hhx\n",
287 cmd);
288 ret = -EINVAL;
289 } else {
290
291 dev_dbg(dev, "overflow, ret=%d, cmd=%#02hhx\n",
292 ret, cmd);
293 ret = -EOVERFLOW;
294 }
295 }
296
297
298 data->rsp_seq = -1;
299 break;
300 }
301
302out:
303 mutex_unlock(&data->cmdlock);
304
305 return ret;
306}
307
308static int si1145_param_update(struct si1145_data *data, u8 op, u8 param,
309 u8 value)
310{
311 int ret;
312
313 ret = i2c_smbus_write_byte_data(data->client,
314 SI1145_REG_PARAM_WR, value);
315 if (ret < 0)
316 return ret;
317
318 return si1145_command(data, op | (param & 0x1F));
319}
320
321static int si1145_param_set(struct si1145_data *data, u8 param, u8 value)
322{
323 return si1145_param_update(data, SI1145_CMD_PARAM_SET, param, value);
324}
325
326
327static int si1145_param_query(struct si1145_data *data, u8 param)
328{
329 int ret;
330
331 ret = si1145_command(data, SI1145_CMD_PARAM_QUERY | (param & 0x1F));
332 if (ret < 0)
333 return ret;
334
335 return i2c_smbus_read_byte_data(data->client, SI1145_REG_PARAM_RD);
336}
337
338
339static u16 si1145_uncompress(u8 x)
340{
341 u16 result = 0;
342 u8 exponent = 0;
343
344 if (x < 8)
345 return 0;
346
347 exponent = (x & 0xf0) >> 4;
348 result = 0x10 | (x & 0x0f);
349
350 if (exponent >= 4)
351 return result << (exponent - 4);
352 return result >> (4 - exponent);
353}
354
355
356static u8 si1145_compress(u16 x)
357{
358 u32 exponent = 0;
359 u32 significand = 0;
360 u32 tmp = x;
361
362 if (x == 0x0000)
363 return 0x00;
364 if (x == 0x0001)
365 return 0x08;
366
367 while (1) {
368 tmp >>= 1;
369 exponent += 1;
370 if (tmp == 1)
371 break;
372 }
373
374 if (exponent < 5) {
375 significand = x << (4 - exponent);
376 return (exponent << 4) | (significand & 0xF);
377 }
378
379 significand = x >> (exponent - 5);
380 if (significand & 1) {
381 significand += 2;
382 if (significand & 0x0040) {
383 exponent += 1;
384 significand >>= 1;
385 }
386 }
387
388 return (exponent << 4) | ((significand >> 1) & 0xF);
389}
390
391
392static int si1145_set_meas_rate(struct si1145_data *data, int interval)
393{
394 if (data->part_info->uncompressed_meas_rate)
395 return i2c_smbus_write_word_data(data->client,
396 SI1145_REG_MEAS_RATE, interval);
397 else
398 return i2c_smbus_write_byte_data(data->client,
399 SI1145_REG_MEAS_RATE, interval);
400}
401
402static int si1145_read_samp_freq(struct si1145_data *data, int *val, int *val2)
403{
404 *val = 32000;
405 if (data->part_info->uncompressed_meas_rate)
406 *val2 = data->meas_rate;
407 else
408 *val2 = si1145_uncompress(data->meas_rate);
409 return IIO_VAL_FRACTIONAL;
410}
411
412
413static int si1145_store_samp_freq(struct si1145_data *data, int val)
414{
415 int ret = 0;
416 int meas_rate;
417
418 if (val <= 0 || val > 32000)
419 return -ERANGE;
420 meas_rate = 32000 / val;
421
422 mutex_lock(&data->lock);
423 if (data->autonomous) {
424 ret = si1145_set_meas_rate(data, meas_rate);
425 if (ret)
426 goto out;
427 }
428 if (data->part_info->uncompressed_meas_rate)
429 data->meas_rate = meas_rate;
430 else
431 data->meas_rate = si1145_compress(meas_rate);
432
433out:
434 mutex_unlock(&data->lock);
435
436 return ret;
437}
438
439static irqreturn_t si1145_trigger_handler(int irq, void *private)
440{
441 struct iio_poll_func *pf = private;
442 struct iio_dev *indio_dev = pf->indio_dev;
443 struct si1145_data *data = iio_priv(indio_dev);
444
445
446
447
448
449 u8 buffer[24];
450 int i, j = 0;
451 int ret;
452 u8 irq_status = 0;
453
454 if (!data->autonomous) {
455 ret = si1145_command(data, SI1145_CMD_PSALS_FORCE);
456 if (ret < 0 && ret != -EOVERFLOW)
457 goto done;
458 } else {
459 irq_status = ret = i2c_smbus_read_byte_data(data->client,
460 SI1145_REG_IRQ_STATUS);
461 if (ret < 0)
462 goto done;
463 if (!(irq_status & SI1145_MASK_ALL_IE))
464 goto done;
465 }
466
467 for_each_set_bit(i, indio_dev->active_scan_mask,
468 indio_dev->masklength) {
469 int run = 1;
470
471 while (i + run < indio_dev->masklength) {
472 if (!test_bit(i + run, indio_dev->active_scan_mask))
473 break;
474 if (indio_dev->channels[i + run].address !=
475 indio_dev->channels[i].address + 2 * run)
476 break;
477 run++;
478 }
479
480 ret = i2c_smbus_read_i2c_block_data_or_emulated(
481 data->client, indio_dev->channels[i].address,
482 sizeof(u16) * run, &buffer[j]);
483 if (ret < 0)
484 goto done;
485 j += run * sizeof(u16);
486 i += run - 1;
487 }
488
489 if (data->autonomous) {
490 ret = i2c_smbus_write_byte_data(data->client,
491 SI1145_REG_IRQ_STATUS,
492 irq_status & SI1145_MASK_ALL_IE);
493 if (ret < 0)
494 goto done;
495 }
496
497 iio_push_to_buffers_with_timestamp(indio_dev, buffer,
498 iio_get_time_ns(indio_dev));
499
500done:
501 iio_trigger_notify_done(indio_dev->trig);
502 return IRQ_HANDLED;
503}
504
505static int si1145_set_chlist(struct iio_dev *indio_dev, unsigned long scan_mask)
506{
507 struct si1145_data *data = iio_priv(indio_dev);
508 u8 reg = 0, mux;
509 int ret;
510 int i;
511
512
513 if (data->scan_mask == scan_mask)
514 return 0;
515
516 for_each_set_bit(i, &scan_mask, indio_dev->masklength) {
517 switch (indio_dev->channels[i].address) {
518 case SI1145_REG_ALSVIS_DATA:
519 reg |= SI1145_CHLIST_EN_ALSVIS;
520 break;
521 case SI1145_REG_ALSIR_DATA:
522 reg |= SI1145_CHLIST_EN_ALSIR;
523 break;
524 case SI1145_REG_PS1_DATA:
525 reg |= SI1145_CHLIST_EN_PS1;
526 break;
527 case SI1145_REG_PS2_DATA:
528 reg |= SI1145_CHLIST_EN_PS2;
529 break;
530 case SI1145_REG_PS3_DATA:
531 reg |= SI1145_CHLIST_EN_PS3;
532 break;
533 case SI1145_REG_AUX_DATA:
534 switch (indio_dev->channels[i].type) {
535 case IIO_UVINDEX:
536 reg |= SI1145_CHLIST_EN_UV;
537 break;
538 default:
539 reg |= SI1145_CHLIST_EN_AUX;
540 if (indio_dev->channels[i].type == IIO_TEMP)
541 mux = SI1145_MUX_TEMP;
542 else
543 mux = SI1145_MUX_VDD;
544 ret = si1145_param_set(data,
545 SI1145_PARAM_AUX_ADC_MUX, mux);
546 if (ret < 0)
547 return ret;
548
549 break;
550 }
551 }
552 }
553
554 data->scan_mask = scan_mask;
555 ret = si1145_param_set(data, SI1145_PARAM_CHLIST, reg);
556
557 return ret < 0 ? ret : 0;
558}
559
560static int si1145_measure(struct iio_dev *indio_dev,
561 struct iio_chan_spec const *chan)
562{
563 struct si1145_data *data = iio_priv(indio_dev);
564 u8 cmd;
565 int ret;
566
567 ret = si1145_set_chlist(indio_dev, BIT(chan->scan_index));
568 if (ret < 0)
569 return ret;
570
571 cmd = (chan->type == IIO_PROXIMITY) ? SI1145_CMD_PS_FORCE :
572 SI1145_CMD_ALS_FORCE;
573 ret = si1145_command(data, cmd);
574 if (ret < 0 && ret != -EOVERFLOW)
575 return ret;
576
577 return i2c_smbus_read_word_data(data->client, chan->address);
578}
579
580
581
582
583
584static const int si1145_proximity_scale_available[] = {
585 128, 64, 32, 16, 8, 4};
586static const int si1145_intensity_scale_available[] = {
587 128, 64, 32, 16, 8, 4, 2, 1};
588static IIO_CONST_ATTR(in_proximity_scale_available,
589 "128 64 32 16 8 4");
590static IIO_CONST_ATTR(in_intensity_scale_available,
591 "128 64 32 16 8 4 2 1");
592static IIO_CONST_ATTR(in_intensity_ir_scale_available,
593 "128 64 32 16 8 4 2 1");
594
595static int si1145_scale_from_adcgain(int regval)
596{
597 return 128 >> regval;
598}
599
600static int si1145_proximity_adcgain_from_scale(int val, int val2)
601{
602 val = find_closest_descending(val, si1145_proximity_scale_available,
603 ARRAY_SIZE(si1145_proximity_scale_available));
604 if (val < 0 || val > 5 || val2 != 0)
605 return -EINVAL;
606
607 return val;
608}
609
610static int si1145_intensity_adcgain_from_scale(int val, int val2)
611{
612 val = find_closest_descending(val, si1145_intensity_scale_available,
613 ARRAY_SIZE(si1145_intensity_scale_available));
614 if (val < 0 || val > 7 || val2 != 0)
615 return -EINVAL;
616
617 return val;
618}
619
620static int si1145_read_raw(struct iio_dev *indio_dev,
621 struct iio_chan_spec const *chan,
622 int *val, int *val2, long mask)
623{
624 struct si1145_data *data = iio_priv(indio_dev);
625 int ret;
626 u8 reg;
627
628 switch (mask) {
629 case IIO_CHAN_INFO_RAW:
630 switch (chan->type) {
631 case IIO_INTENSITY:
632 case IIO_PROXIMITY:
633 case IIO_VOLTAGE:
634 case IIO_TEMP:
635 case IIO_UVINDEX:
636 ret = iio_device_claim_direct_mode(indio_dev);
637 if (ret)
638 return ret;
639 ret = si1145_measure(indio_dev, chan);
640 iio_device_release_direct_mode(indio_dev);
641
642 if (ret < 0)
643 return ret;
644
645 *val = ret;
646
647 return IIO_VAL_INT;
648 case IIO_CURRENT:
649 ret = i2c_smbus_read_byte_data(data->client,
650 SI1145_PS_LED_REG(chan->channel));
651 if (ret < 0)
652 return ret;
653
654 *val = (ret >> SI1145_PS_LED_SHIFT(chan->channel))
655 & 0x0f;
656
657 return IIO_VAL_INT;
658 default:
659 return -EINVAL;
660 }
661 case IIO_CHAN_INFO_SCALE:
662 switch (chan->type) {
663 case IIO_PROXIMITY:
664 reg = SI1145_PARAM_PS_ADC_GAIN;
665 break;
666 case IIO_INTENSITY:
667 if (chan->channel2 == IIO_MOD_LIGHT_IR)
668 reg = SI1145_PARAM_ALSIR_ADC_GAIN;
669 else
670 reg = SI1145_PARAM_ALSVIS_ADC_GAIN;
671 break;
672 case IIO_TEMP:
673 *val = 28;
674 *val2 = 571429;
675 return IIO_VAL_INT_PLUS_MICRO;
676 case IIO_UVINDEX:
677 *val = 0;
678 *val2 = 10000;
679 return IIO_VAL_INT_PLUS_MICRO;
680 default:
681 return -EINVAL;
682 }
683
684 ret = si1145_param_query(data, reg);
685 if (ret < 0)
686 return ret;
687
688 *val = si1145_scale_from_adcgain(ret & 0x07);
689
690 return IIO_VAL_INT;
691 case IIO_CHAN_INFO_OFFSET:
692 switch (chan->type) {
693 case IIO_TEMP:
694
695
696
697
698 *val = -256 - 11136 + 25 * 35;
699 return IIO_VAL_INT;
700 default:
701
702
703
704
705
706 ret = si1145_param_query(data, SI1145_PARAM_ADC_OFFSET);
707 if (ret < 0)
708 return ret;
709 *val = -si1145_uncompress(ret);
710 return IIO_VAL_INT;
711 }
712 case IIO_CHAN_INFO_SAMP_FREQ:
713 return si1145_read_samp_freq(data, val, val2);
714 default:
715 return -EINVAL;
716 }
717}
718
719static int si1145_write_raw(struct iio_dev *indio_dev,
720 struct iio_chan_spec const *chan,
721 int val, int val2, long mask)
722{
723 struct si1145_data *data = iio_priv(indio_dev);
724 u8 reg1, reg2, shift;
725 int ret;
726
727 switch (mask) {
728 case IIO_CHAN_INFO_SCALE:
729 switch (chan->type) {
730 case IIO_PROXIMITY:
731 val = si1145_proximity_adcgain_from_scale(val, val2);
732 if (val < 0)
733 return val;
734 reg1 = SI1145_PARAM_PS_ADC_GAIN;
735 reg2 = SI1145_PARAM_PS_ADC_COUNTER;
736 break;
737 case IIO_INTENSITY:
738 val = si1145_intensity_adcgain_from_scale(val, val2);
739 if (val < 0)
740 return val;
741 if (chan->channel2 == IIO_MOD_LIGHT_IR) {
742 reg1 = SI1145_PARAM_ALSIR_ADC_GAIN;
743 reg2 = SI1145_PARAM_ALSIR_ADC_COUNTER;
744 } else {
745 reg1 = SI1145_PARAM_ALSVIS_ADC_GAIN;
746 reg2 = SI1145_PARAM_ALSVIS_ADC_COUNTER;
747 }
748 break;
749 default:
750 return -EINVAL;
751 }
752
753 ret = iio_device_claim_direct_mode(indio_dev);
754 if (ret)
755 return ret;
756
757 ret = si1145_param_set(data, reg1, val);
758 if (ret < 0) {
759 iio_device_release_direct_mode(indio_dev);
760 return ret;
761 }
762
763 ret = si1145_param_set(data, reg2, (~val & 0x07) << 4);
764 iio_device_release_direct_mode(indio_dev);
765 return ret;
766 case IIO_CHAN_INFO_RAW:
767 if (chan->type != IIO_CURRENT)
768 return -EINVAL;
769
770 if (val < 0 || val > 15 || val2 != 0)
771 return -EINVAL;
772
773 reg1 = SI1145_PS_LED_REG(chan->channel);
774 shift = SI1145_PS_LED_SHIFT(chan->channel);
775
776 ret = iio_device_claim_direct_mode(indio_dev);
777 if (ret)
778 return ret;
779
780 ret = i2c_smbus_read_byte_data(data->client, reg1);
781 if (ret < 0) {
782 iio_device_release_direct_mode(indio_dev);
783 return ret;
784 }
785 ret = i2c_smbus_write_byte_data(data->client, reg1,
786 (ret & ~(0x0f << shift)) |
787 ((val & 0x0f) << shift));
788 iio_device_release_direct_mode(indio_dev);
789 return ret;
790 case IIO_CHAN_INFO_SAMP_FREQ:
791 return si1145_store_samp_freq(data, val);
792 default:
793 return -EINVAL;
794 }
795}
796
797#define SI1145_ST { \
798 .sign = 'u', \
799 .realbits = 16, \
800 .storagebits = 16, \
801 .endianness = IIO_LE, \
802}
803
804#define SI1145_INTENSITY_CHANNEL(_si) { \
805 .type = IIO_INTENSITY, \
806 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
807 BIT(IIO_CHAN_INFO_OFFSET) | \
808 BIT(IIO_CHAN_INFO_SCALE), \
809 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
810 .scan_type = SI1145_ST, \
811 .scan_index = _si, \
812 .address = SI1145_REG_ALSVIS_DATA, \
813}
814
815#define SI1145_INTENSITY_IR_CHANNEL(_si) { \
816 .type = IIO_INTENSITY, \
817 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
818 BIT(IIO_CHAN_INFO_OFFSET) | \
819 BIT(IIO_CHAN_INFO_SCALE), \
820 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
821 .modified = 1, \
822 .channel2 = IIO_MOD_LIGHT_IR, \
823 .scan_type = SI1145_ST, \
824 .scan_index = _si, \
825 .address = SI1145_REG_ALSIR_DATA, \
826}
827
828#define SI1145_TEMP_CHANNEL(_si) { \
829 .type = IIO_TEMP, \
830 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
831 BIT(IIO_CHAN_INFO_OFFSET) | \
832 BIT(IIO_CHAN_INFO_SCALE), \
833 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
834 .scan_type = SI1145_ST, \
835 .scan_index = _si, \
836 .address = SI1145_REG_AUX_DATA, \
837}
838
839#define SI1145_UV_CHANNEL(_si) { \
840 .type = IIO_UVINDEX, \
841 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
842 BIT(IIO_CHAN_INFO_SCALE), \
843 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
844 .scan_type = SI1145_ST, \
845 .scan_index = _si, \
846 .address = SI1145_REG_AUX_DATA, \
847}
848
849#define SI1145_PROXIMITY_CHANNEL(_si, _ch) { \
850 .type = IIO_PROXIMITY, \
851 .indexed = 1, \
852 .channel = _ch, \
853 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
854 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
855 BIT(IIO_CHAN_INFO_OFFSET), \
856 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
857 .scan_type = SI1145_ST, \
858 .scan_index = _si, \
859 .address = SI1145_REG_PS1_DATA + _ch * 2, \
860}
861
862#define SI1145_VOLTAGE_CHANNEL(_si) { \
863 .type = IIO_VOLTAGE, \
864 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
865 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
866 .scan_type = SI1145_ST, \
867 .scan_index = _si, \
868 .address = SI1145_REG_AUX_DATA, \
869}
870
871#define SI1145_CURRENT_CHANNEL(_ch) { \
872 .type = IIO_CURRENT, \
873 .indexed = 1, \
874 .channel = _ch, \
875 .output = 1, \
876 .scan_index = -1, \
877 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
878}
879
880static const struct iio_chan_spec si1132_channels[] = {
881 SI1145_INTENSITY_CHANNEL(0),
882 SI1145_INTENSITY_IR_CHANNEL(1),
883 SI1145_TEMP_CHANNEL(2),
884 SI1145_VOLTAGE_CHANNEL(3),
885 SI1145_UV_CHANNEL(4),
886 IIO_CHAN_SOFT_TIMESTAMP(6),
887};
888
889static const struct iio_chan_spec si1141_channels[] = {
890 SI1145_INTENSITY_CHANNEL(0),
891 SI1145_INTENSITY_IR_CHANNEL(1),
892 SI1145_PROXIMITY_CHANNEL(2, 0),
893 SI1145_TEMP_CHANNEL(3),
894 SI1145_VOLTAGE_CHANNEL(4),
895 IIO_CHAN_SOFT_TIMESTAMP(5),
896 SI1145_CURRENT_CHANNEL(0),
897};
898
899static const struct iio_chan_spec si1142_channels[] = {
900 SI1145_INTENSITY_CHANNEL(0),
901 SI1145_INTENSITY_IR_CHANNEL(1),
902 SI1145_PROXIMITY_CHANNEL(2, 0),
903 SI1145_PROXIMITY_CHANNEL(3, 1),
904 SI1145_TEMP_CHANNEL(4),
905 SI1145_VOLTAGE_CHANNEL(5),
906 IIO_CHAN_SOFT_TIMESTAMP(6),
907 SI1145_CURRENT_CHANNEL(0),
908 SI1145_CURRENT_CHANNEL(1),
909};
910
911static const struct iio_chan_spec si1143_channels[] = {
912 SI1145_INTENSITY_CHANNEL(0),
913 SI1145_INTENSITY_IR_CHANNEL(1),
914 SI1145_PROXIMITY_CHANNEL(2, 0),
915 SI1145_PROXIMITY_CHANNEL(3, 1),
916 SI1145_PROXIMITY_CHANNEL(4, 2),
917 SI1145_TEMP_CHANNEL(5),
918 SI1145_VOLTAGE_CHANNEL(6),
919 IIO_CHAN_SOFT_TIMESTAMP(7),
920 SI1145_CURRENT_CHANNEL(0),
921 SI1145_CURRENT_CHANNEL(1),
922 SI1145_CURRENT_CHANNEL(2),
923};
924
925static const struct iio_chan_spec si1145_channels[] = {
926 SI1145_INTENSITY_CHANNEL(0),
927 SI1145_INTENSITY_IR_CHANNEL(1),
928 SI1145_PROXIMITY_CHANNEL(2, 0),
929 SI1145_TEMP_CHANNEL(3),
930 SI1145_VOLTAGE_CHANNEL(4),
931 SI1145_UV_CHANNEL(5),
932 IIO_CHAN_SOFT_TIMESTAMP(6),
933 SI1145_CURRENT_CHANNEL(0),
934};
935
936static const struct iio_chan_spec si1146_channels[] = {
937 SI1145_INTENSITY_CHANNEL(0),
938 SI1145_INTENSITY_IR_CHANNEL(1),
939 SI1145_TEMP_CHANNEL(2),
940 SI1145_VOLTAGE_CHANNEL(3),
941 SI1145_UV_CHANNEL(4),
942 SI1145_PROXIMITY_CHANNEL(5, 0),
943 SI1145_PROXIMITY_CHANNEL(6, 1),
944 IIO_CHAN_SOFT_TIMESTAMP(7),
945 SI1145_CURRENT_CHANNEL(0),
946 SI1145_CURRENT_CHANNEL(1),
947};
948
949static const struct iio_chan_spec si1147_channels[] = {
950 SI1145_INTENSITY_CHANNEL(0),
951 SI1145_INTENSITY_IR_CHANNEL(1),
952 SI1145_PROXIMITY_CHANNEL(2, 0),
953 SI1145_PROXIMITY_CHANNEL(3, 1),
954 SI1145_PROXIMITY_CHANNEL(4, 2),
955 SI1145_TEMP_CHANNEL(5),
956 SI1145_VOLTAGE_CHANNEL(6),
957 SI1145_UV_CHANNEL(7),
958 IIO_CHAN_SOFT_TIMESTAMP(8),
959 SI1145_CURRENT_CHANNEL(0),
960 SI1145_CURRENT_CHANNEL(1),
961 SI1145_CURRENT_CHANNEL(2),
962};
963
964static struct attribute *si1132_attributes[] = {
965 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
966 &iio_const_attr_in_intensity_ir_scale_available.dev_attr.attr,
967 NULL,
968};
969
970static struct attribute *si114x_attributes[] = {
971 &iio_const_attr_in_intensity_scale_available.dev_attr.attr,
972 &iio_const_attr_in_intensity_ir_scale_available.dev_attr.attr,
973 &iio_const_attr_in_proximity_scale_available.dev_attr.attr,
974 NULL,
975};
976
977static const struct attribute_group si1132_attribute_group = {
978 .attrs = si1132_attributes,
979};
980
981static const struct attribute_group si114x_attribute_group = {
982 .attrs = si114x_attributes,
983};
984
985
986static const struct iio_info si1132_info = {
987 .read_raw = si1145_read_raw,
988 .write_raw = si1145_write_raw,
989 .attrs = &si1132_attribute_group,
990};
991
992static const struct iio_info si114x_info = {
993 .read_raw = si1145_read_raw,
994 .write_raw = si1145_write_raw,
995 .attrs = &si114x_attribute_group,
996};
997
998#define SI1145_PART(id, iio_info, chans, leds, uncompressed_meas_rate) \
999 {id, iio_info, chans, ARRAY_SIZE(chans), leds, uncompressed_meas_rate}
1000
1001static const struct si1145_part_info si1145_part_info[] = {
1002 [SI1132] = SI1145_PART(0x32, &si1132_info, si1132_channels, 0, true),
1003 [SI1141] = SI1145_PART(0x41, &si114x_info, si1141_channels, 1, false),
1004 [SI1142] = SI1145_PART(0x42, &si114x_info, si1142_channels, 2, false),
1005 [SI1143] = SI1145_PART(0x43, &si114x_info, si1143_channels, 3, false),
1006 [SI1145] = SI1145_PART(0x45, &si114x_info, si1145_channels, 1, true),
1007 [SI1146] = SI1145_PART(0x46, &si114x_info, si1146_channels, 2, true),
1008 [SI1147] = SI1145_PART(0x47, &si114x_info, si1147_channels, 3, true),
1009};
1010
1011static int si1145_initialize(struct si1145_data *data)
1012{
1013 struct i2c_client *client = data->client;
1014 int ret;
1015
1016 ret = i2c_smbus_write_byte_data(client, SI1145_REG_COMMAND,
1017 SI1145_CMD_RESET);
1018 if (ret < 0)
1019 return ret;
1020 msleep(SI1145_COMMAND_TIMEOUT_MS);
1021
1022
1023 ret = i2c_smbus_write_byte_data(client, SI1145_REG_HW_KEY, 0x17);
1024 if (ret < 0)
1025 return ret;
1026 msleep(SI1145_COMMAND_TIMEOUT_MS);
1027
1028
1029 ret = si1145_set_meas_rate(data, 0);
1030 if (ret < 0)
1031 return ret;
1032
1033
1034 ret = si1145_store_samp_freq(data, 10);
1035 if (ret < 0)
1036 return ret;
1037
1038
1039 switch (data->part_info->num_leds) {
1040 case 3:
1041 ret = i2c_smbus_write_byte_data(client,
1042 SI1145_REG_PS_LED3,
1043 SI1145_LED_CURRENT_45mA);
1044 if (ret < 0)
1045 return ret;
1046
1047 case 2:
1048 ret = i2c_smbus_write_byte_data(client,
1049 SI1145_REG_PS_LED21,
1050 (SI1145_LED_CURRENT_45mA << 4) |
1051 SI1145_LED_CURRENT_45mA);
1052 break;
1053 case 1:
1054 ret = i2c_smbus_write_byte_data(client,
1055 SI1145_REG_PS_LED21,
1056 SI1145_LED_CURRENT_45mA);
1057 break;
1058 default:
1059 ret = 0;
1060 break;
1061 }
1062 if (ret < 0)
1063 return ret;
1064
1065
1066 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_MISC,
1067 SI1145_PS_ADC_MODE_NORMAL);
1068 if (ret < 0)
1069 return ret;
1070
1071 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_GAIN, 0x01);
1072 if (ret < 0)
1073 return ret;
1074
1075
1076 ret = si1145_param_set(data, SI1145_PARAM_PS_ADC_COUNTER, 0x06 << 4);
1077 if (ret < 0)
1078 return ret;
1079
1080
1081 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_MISC,
1082 SI1145_ADC_MISC_RANGE);
1083 if (ret < 0)
1084 return ret;
1085
1086 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_GAIN, 0x03);
1087 if (ret < 0)
1088 return ret;
1089
1090 ret = si1145_param_set(data, SI1145_PARAM_ALSVIS_ADC_COUNTER,
1091 0x04 << 4);
1092 if (ret < 0)
1093 return ret;
1094
1095
1096 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_MISC,
1097 SI1145_ADC_MISC_RANGE);
1098 if (ret < 0)
1099 return ret;
1100
1101 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_GAIN, 0x01);
1102 if (ret < 0)
1103 return ret;
1104
1105 ret = si1145_param_set(data, SI1145_PARAM_ALSIR_ADC_COUNTER,
1106 0x06 << 4);
1107 if (ret < 0)
1108 return ret;
1109
1110
1111
1112
1113
1114 if (data->part_info == &si1145_part_info[SI1132] ||
1115 data->part_info == &si1145_part_info[SI1145] ||
1116 data->part_info == &si1145_part_info[SI1146] ||
1117 data->part_info == &si1145_part_info[SI1147]) {
1118 ret = i2c_smbus_write_byte_data(data->client,
1119 SI1145_REG_UCOEF1,
1120 SI1145_UCOEF1_DEFAULT);
1121 if (ret < 0)
1122 return ret;
1123 ret = i2c_smbus_write_byte_data(data->client,
1124 SI1145_REG_UCOEF2, SI1145_UCOEF2_DEFAULT);
1125 if (ret < 0)
1126 return ret;
1127 ret = i2c_smbus_write_byte_data(data->client,
1128 SI1145_REG_UCOEF3, SI1145_UCOEF3_DEFAULT);
1129 if (ret < 0)
1130 return ret;
1131 ret = i2c_smbus_write_byte_data(data->client,
1132 SI1145_REG_UCOEF4, SI1145_UCOEF4_DEFAULT);
1133 if (ret < 0)
1134 return ret;
1135 }
1136
1137 return 0;
1138}
1139
1140
1141
1142
1143
1144
1145static int si1145_buffer_preenable(struct iio_dev *indio_dev)
1146{
1147 struct si1145_data *data = iio_priv(indio_dev);
1148 int ret;
1149
1150 mutex_lock(&data->lock);
1151 ret = si1145_set_chlist(indio_dev, *indio_dev->active_scan_mask);
1152 mutex_unlock(&data->lock);
1153
1154 return ret;
1155}
1156
1157static bool si1145_validate_scan_mask(struct iio_dev *indio_dev,
1158 const unsigned long *scan_mask)
1159{
1160 struct si1145_data *data = iio_priv(indio_dev);
1161 unsigned int count = 0;
1162 int i;
1163
1164
1165 for_each_set_bit(i, scan_mask, data->part_info->num_channels) {
1166 if (indio_dev->channels[i].address == SI1145_REG_AUX_DATA)
1167 count++;
1168 }
1169
1170 return count <= 1;
1171}
1172
1173static const struct iio_buffer_setup_ops si1145_buffer_setup_ops = {
1174 .preenable = si1145_buffer_preenable,
1175 .postenable = iio_triggered_buffer_postenable,
1176 .predisable = iio_triggered_buffer_predisable,
1177 .validate_scan_mask = si1145_validate_scan_mask,
1178};
1179
1180
1181
1182
1183
1184
1185
1186static int si1145_trigger_set_state(struct iio_trigger *trig, bool state)
1187{
1188 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1189 struct si1145_data *data = iio_priv(indio_dev);
1190 int err = 0, ret;
1191
1192 mutex_lock(&data->lock);
1193
1194 if (state) {
1195 data->autonomous = true;
1196 err = i2c_smbus_write_byte_data(data->client,
1197 SI1145_REG_INT_CFG, SI1145_INT_CFG_OE);
1198 if (err < 0)
1199 goto disable;
1200 err = i2c_smbus_write_byte_data(data->client,
1201 SI1145_REG_IRQ_ENABLE, SI1145_MASK_ALL_IE);
1202 if (err < 0)
1203 goto disable;
1204 err = si1145_set_meas_rate(data, data->meas_rate);
1205 if (err < 0)
1206 goto disable;
1207 err = si1145_command(data, SI1145_CMD_PSALS_AUTO);
1208 if (err < 0)
1209 goto disable;
1210 } else {
1211disable:
1212
1213 ret = si1145_command(data, SI1145_CMD_PSALS_PAUSE);
1214 if (ret < 0 && !err)
1215 err = ret;
1216 ret = si1145_set_meas_rate(data, 0);
1217 if (ret < 0 && !err)
1218 err = ret;
1219 ret = i2c_smbus_write_byte_data(data->client,
1220 SI1145_REG_IRQ_ENABLE, 0);
1221 if (ret < 0 && !err)
1222 err = ret;
1223 ret = i2c_smbus_write_byte_data(data->client,
1224 SI1145_REG_INT_CFG, 0);
1225 if (ret < 0 && !err)
1226 err = ret;
1227 data->autonomous = false;
1228 }
1229
1230 mutex_unlock(&data->lock);
1231 return err;
1232}
1233
1234static const struct iio_trigger_ops si1145_trigger_ops = {
1235 .set_trigger_state = si1145_trigger_set_state,
1236};
1237
1238static int si1145_probe_trigger(struct iio_dev *indio_dev)
1239{
1240 struct si1145_data *data = iio_priv(indio_dev);
1241 struct i2c_client *client = data->client;
1242 struct iio_trigger *trig;
1243 int ret;
1244
1245 trig = devm_iio_trigger_alloc(&client->dev,
1246 "%s-dev%d", indio_dev->name, indio_dev->id);
1247 if (!trig)
1248 return -ENOMEM;
1249
1250 trig->dev.parent = &client->dev;
1251 trig->ops = &si1145_trigger_ops;
1252 iio_trigger_set_drvdata(trig, indio_dev);
1253
1254 ret = devm_request_irq(&client->dev, client->irq,
1255 iio_trigger_generic_data_rdy_poll,
1256 IRQF_TRIGGER_FALLING,
1257 "si1145_irq",
1258 trig);
1259 if (ret < 0) {
1260 dev_err(&client->dev, "irq request failed\n");
1261 return ret;
1262 }
1263
1264 ret = devm_iio_trigger_register(&client->dev, trig);
1265 if (ret)
1266 return ret;
1267
1268 data->trig = trig;
1269 indio_dev->trig = iio_trigger_get(data->trig);
1270
1271 return 0;
1272}
1273
1274static int si1145_probe(struct i2c_client *client,
1275 const struct i2c_device_id *id)
1276{
1277 struct si1145_data *data;
1278 struct iio_dev *indio_dev;
1279 u8 part_id, rev_id, seq_id;
1280 int ret;
1281
1282 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1283 if (!indio_dev)
1284 return -ENOMEM;
1285
1286 data = iio_priv(indio_dev);
1287 i2c_set_clientdata(client, indio_dev);
1288 data->client = client;
1289 data->part_info = &si1145_part_info[id->driver_data];
1290
1291 part_id = ret = i2c_smbus_read_byte_data(data->client,
1292 SI1145_REG_PART_ID);
1293 if (ret < 0)
1294 return ret;
1295 rev_id = ret = i2c_smbus_read_byte_data(data->client,
1296 SI1145_REG_REV_ID);
1297 if (ret < 0)
1298 return ret;
1299 seq_id = ret = i2c_smbus_read_byte_data(data->client,
1300 SI1145_REG_SEQ_ID);
1301 if (ret < 0)
1302 return ret;
1303 dev_info(&client->dev, "device ID part %#02hhx rev %#02hhx seq %#02hhx\n",
1304 part_id, rev_id, seq_id);
1305 if (part_id != data->part_info->part) {
1306 dev_err(&client->dev, "part ID mismatch got %#02hhx, expected %#02x\n",
1307 part_id, data->part_info->part);
1308 return -ENODEV;
1309 }
1310
1311 indio_dev->dev.parent = &client->dev;
1312 indio_dev->name = id->name;
1313 indio_dev->channels = data->part_info->channels;
1314 indio_dev->num_channels = data->part_info->num_channels;
1315 indio_dev->info = data->part_info->iio_info;
1316 indio_dev->modes = INDIO_DIRECT_MODE;
1317
1318 mutex_init(&data->lock);
1319 mutex_init(&data->cmdlock);
1320
1321 ret = si1145_initialize(data);
1322 if (ret < 0)
1323 return ret;
1324
1325 ret = devm_iio_triggered_buffer_setup(&client->dev,
1326 indio_dev, NULL,
1327 si1145_trigger_handler, &si1145_buffer_setup_ops);
1328 if (ret < 0)
1329 return ret;
1330
1331 if (client->irq) {
1332 ret = si1145_probe_trigger(indio_dev);
1333 if (ret < 0)
1334 return ret;
1335 } else {
1336 dev_info(&client->dev, "no irq, using polling\n");
1337 }
1338
1339 return devm_iio_device_register(&client->dev, indio_dev);
1340}
1341
1342static const struct i2c_device_id si1145_ids[] = {
1343 { "si1132", SI1132 },
1344 { "si1141", SI1141 },
1345 { "si1142", SI1142 },
1346 { "si1143", SI1143 },
1347 { "si1145", SI1145 },
1348 { "si1146", SI1146 },
1349 { "si1147", SI1147 },
1350 { }
1351};
1352MODULE_DEVICE_TABLE(i2c, si1145_ids);
1353
1354static struct i2c_driver si1145_driver = {
1355 .driver = {
1356 .name = "si1145",
1357 },
1358 .probe = si1145_probe,
1359 .id_table = si1145_ids,
1360};
1361
1362module_i2c_driver(si1145_driver);
1363
1364MODULE_AUTHOR("Peter Meerwald-Stadler <pmeerw@pmeerw.net>");
1365MODULE_DESCRIPTION("Silabs SI1132 and SI1141/2/3/5/6/7 proximity, ambient light and UV index sensor driver");
1366MODULE_LICENSE("GPL");
1367