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14#ifndef TMIO_MMC_H
15#define TMIO_MMC_H
16
17#include <linux/dmaengine.h>
18#include <linux/highmem.h>
19#include <linux/mutex.h>
20#include <linux/pagemap.h>
21#include <linux/scatterlist.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24
25#define CTL_SD_CMD 0x00
26#define CTL_ARG_REG 0x04
27#define CTL_STOP_INTERNAL_ACTION 0x08
28#define CTL_XFER_BLK_COUNT 0xa
29#define CTL_RESPONSE 0x0c
30
31#define CTL_STATUS 0x1c
32
33#define CTL_IRQ_MASK 0x20
34#define CTL_SD_CARD_CLK_CTL 0x24
35#define CTL_SD_XFER_LEN 0x26
36#define CTL_SD_MEM_CARD_OPT 0x28
37#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
38#define CTL_SD_DATA_PORT 0x30
39#define CTL_TRANSACTION_CTL 0x34
40#define CTL_SDIO_STATUS 0x36
41#define CTL_SDIO_IRQ_MASK 0x38
42#define CTL_DMA_ENABLE 0xd8
43#define CTL_RESET_SD 0xe0
44#define CTL_VERSION 0xe2
45#define CTL_SDIF_MODE 0xe6
46
47
48#define TMIO_STOP_STP BIT(0)
49#define TMIO_STOP_SEC BIT(8)
50
51
52#define TMIO_STAT_CMDRESPEND BIT(0)
53#define TMIO_STAT_DATAEND BIT(2)
54#define TMIO_STAT_CARD_REMOVE BIT(3)
55#define TMIO_STAT_CARD_INSERT BIT(4)
56#define TMIO_STAT_SIGSTATE BIT(5)
57#define TMIO_STAT_WRPROTECT BIT(7)
58#define TMIO_STAT_CARD_REMOVE_A BIT(8)
59#define TMIO_STAT_CARD_INSERT_A BIT(9)
60#define TMIO_STAT_SIGSTATE_A BIT(10)
61
62
63#define TMIO_STAT_CMD_IDX_ERR BIT(16)
64#define TMIO_STAT_CRCFAIL BIT(17)
65#define TMIO_STAT_STOPBIT_ERR BIT(18)
66#define TMIO_STAT_DATATIMEOUT BIT(19)
67#define TMIO_STAT_RXOVERFLOW BIT(20)
68#define TMIO_STAT_TXUNDERRUN BIT(21)
69#define TMIO_STAT_CMDTIMEOUT BIT(22)
70#define TMIO_STAT_DAT0 BIT(23)
71#define TMIO_STAT_RXRDY BIT(24)
72#define TMIO_STAT_TXRQ BIT(25)
73#define TMIO_STAT_ALWAYS_SET_27 BIT(27)
74#define TMIO_STAT_ILL_FUNC BIT(29)
75#define TMIO_STAT_SCLKDIVEN BIT(29)
76#define TMIO_STAT_CMD_BUSY BIT(30)
77#define TMIO_STAT_ILL_ACCESS BIT(31)
78
79
80#define CLK_CTL_DIV_MASK 0xff
81#define CLK_CTL_SCLKEN BIT(8)
82
83
84#define CARD_OPT_WIDTH8 BIT(13)
85#define CARD_OPT_WIDTH BIT(15)
86
87
88#define TMIO_SDIO_STAT_IOIRQ 0x0001
89#define TMIO_SDIO_STAT_EXPUB52 0x4000
90#define TMIO_SDIO_STAT_EXWT 0x8000
91#define TMIO_SDIO_MASK_ALL 0xc007
92
93#define TMIO_SDIO_SETBITS_MASK 0x0006
94
95
96#define DMA_ENABLE_DMASDRW BIT(1)
97
98
99
100#define TMIO_MASK_INIT_RCAR2 0x8b7f031d
101#define TMIO_MASK_ALL 0x837f031d
102#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
103#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
104#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
105 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
106#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
107
108#define TMIO_MAX_BLK_SIZE 512
109
110struct tmio_mmc_data;
111struct tmio_mmc_host;
112
113struct tmio_mmc_dma_ops {
114 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
115 void (*enable)(struct tmio_mmc_host *host, bool enable);
116 void (*request)(struct tmio_mmc_host *host,
117 struct tmio_mmc_data *pdata);
118 void (*release)(struct tmio_mmc_host *host);
119 void (*abort)(struct tmio_mmc_host *host);
120 void (*dataend)(struct tmio_mmc_host *host);
121};
122
123struct tmio_mmc_host {
124 void __iomem *ctl;
125 struct mmc_command *cmd;
126 struct mmc_request *mrq;
127 struct mmc_data *data;
128 struct mmc_host *mmc;
129 struct mmc_host_ops ops;
130
131
132 void (*set_pwr)(struct platform_device *host, int state);
133
134
135 struct scatterlist *sg_ptr;
136 struct scatterlist *sg_orig;
137 unsigned int sg_len;
138 unsigned int sg_off;
139 unsigned int bus_shift;
140
141 struct platform_device *pdev;
142 struct tmio_mmc_data *pdata;
143
144
145 bool dma_on;
146 struct dma_chan *chan_rx;
147 struct dma_chan *chan_tx;
148 struct tasklet_struct dma_issue;
149 struct scatterlist bounce_sg;
150 u8 *bounce_buf;
151
152
153 struct delayed_work delayed_reset_work;
154 struct work_struct done;
155
156
157 u32 sdcard_irq_mask;
158 u32 sdio_irq_mask;
159 unsigned int clk_cache;
160 u32 sdcard_irq_setbit_mask;
161
162 spinlock_t lock;
163 unsigned long last_req_ts;
164 struct mutex ios_lock;
165 bool native_hotplug;
166 bool sdio_irq_enabled;
167
168
169 int (*clk_enable)(struct tmio_mmc_host *host);
170 void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);
171
172
173 void (*clk_disable)(struct tmio_mmc_host *host);
174 int (*multi_io_quirk)(struct mmc_card *card,
175 unsigned int direction, int blk_size);
176 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
177 void (*reset)(struct tmio_mmc_host *host);
178 void (*hw_reset)(struct tmio_mmc_host *host);
179 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
180 bool (*check_scc_error)(struct tmio_mmc_host *host);
181
182
183
184
185
186 unsigned int (*init_tuning)(struct tmio_mmc_host *host);
187 int (*select_tuning)(struct tmio_mmc_host *host);
188
189
190 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
191 unsigned int tap_num;
192 unsigned long tap_set;
193
194 void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
195 void (*hs400_downgrade)(struct tmio_mmc_host *host);
196 void (*hs400_complete)(struct tmio_mmc_host *host);
197
198 const struct tmio_mmc_dma_ops *dma_ops;
199};
200
201struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
202 struct tmio_mmc_data *pdata);
203void tmio_mmc_host_free(struct tmio_mmc_host *host);
204int tmio_mmc_host_probe(struct tmio_mmc_host *host);
205void tmio_mmc_host_remove(struct tmio_mmc_host *host);
206void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
207
208void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
209void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
210irqreturn_t tmio_mmc_irq(int irq, void *devid);
211
212static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
213 unsigned long *flags)
214{
215 local_irq_save(*flags);
216 return kmap_atomic(sg_page(sg)) + sg->offset;
217}
218
219static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
220 unsigned long *flags, void *virt)
221{
222 kunmap_atomic(virt - sg->offset);
223 local_irq_restore(*flags);
224}
225
226#ifdef CONFIG_PM
227int tmio_mmc_host_runtime_suspend(struct device *dev);
228int tmio_mmc_host_runtime_resume(struct device *dev);
229#endif
230
231static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
232{
233 return ioread16(host->ctl + (addr << host->bus_shift));
234}
235
236static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
237 u16 *buf, int count)
238{
239 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
240}
241
242static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
243 int addr)
244{
245 return ioread16(host->ctl + (addr << host->bus_shift)) |
246 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
247}
248
249static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
250 u32 *buf, int count)
251{
252 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
253}
254
255static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
256 u16 val)
257{
258
259
260
261 if (host->write16_hook && host->write16_hook(host, addr))
262 return;
263 iowrite16(val, host->ctl + (addr << host->bus_shift));
264}
265
266static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
267 u16 *buf, int count)
268{
269 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
270}
271
272static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
273 int addr, u32 val)
274{
275 if (addr == CTL_IRQ_MASK || addr == CTL_STATUS)
276 val |= host->sdcard_irq_setbit_mask;
277
278 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
279 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
280}
281
282static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val)
283{
284 iowrite32(val, host->ctl + (addr << host->bus_shift));
285}
286
287static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
288 const u32 *buf, int count)
289{
290 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
291}
292
293#endif
294