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27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/dma-mapping.h>
30#include <linux/highmem.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/mfd/tmio.h>
35#include <linux/mmc/card.h>
36#include <linux/mmc/host.h>
37#include <linux/mmc/mmc.h>
38#include <linux/mmc/slot-gpio.h>
39#include <linux/module.h>
40#include <linux/pagemap.h>
41#include <linux/platform_device.h>
42#include <linux/pm_domain.h>
43#include <linux/pm_qos.h>
44#include <linux/pm_runtime.h>
45#include <linux/regulator/consumer.h>
46#include <linux/mmc/sdio.h>
47#include <linux/scatterlist.h>
48#include <linux/sizes.h>
49#include <linux/spinlock.h>
50#include <linux/workqueue.h>
51
52#include "tmio_mmc.h"
53
54static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
56{
57 if (host->dma_ops)
58 host->dma_ops->start(host, data);
59}
60
61static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
62{
63 if (host->dma_ops)
64 host->dma_ops->enable(host, enable);
65}
66
67static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
68 struct tmio_mmc_data *pdata)
69{
70 if (host->dma_ops) {
71 host->dma_ops->request(host, pdata);
72 } else {
73 host->chan_tx = NULL;
74 host->chan_rx = NULL;
75 }
76}
77
78static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
79{
80 if (host->dma_ops)
81 host->dma_ops->release(host);
82}
83
84static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
85{
86 if (host->dma_ops)
87 host->dma_ops->abort(host);
88}
89
90static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
91{
92 if (host->dma_ops)
93 host->dma_ops->dataend(host);
94}
95
96void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
97{
98 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
99 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
100}
101EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
102
103void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
104{
105 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
106 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
107}
108EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
109
110static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
111{
112 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
113}
114
115static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
116{
117 host->sg_len = data->sg_len;
118 host->sg_ptr = data->sg;
119 host->sg_orig = data->sg;
120 host->sg_off = 0;
121}
122
123static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
124{
125 host->sg_ptr = sg_next(host->sg_ptr);
126 host->sg_off = 0;
127 return --host->sg_len;
128}
129
130#define CMDREQ_TIMEOUT 5000
131
132static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
133{
134 struct tmio_mmc_host *host = mmc_priv(mmc);
135
136 if (enable && !host->sdio_irq_enabled) {
137 u16 sdio_status;
138
139
140 pm_runtime_get_sync(mmc_dev(mmc));
141
142 host->sdio_irq_enabled = true;
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
144
145
146 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
147 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
148 sdio_status |= TMIO_SDIO_SETBITS_MASK;
149 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
150
151 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
152 } else if (!enable && host->sdio_irq_enabled) {
153 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
154 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
155
156 host->sdio_irq_enabled = false;
157 pm_runtime_mark_last_busy(mmc_dev(mmc));
158 pm_runtime_put_autosuspend(mmc_dev(mmc));
159 }
160}
161
162static void tmio_mmc_reset(struct tmio_mmc_host *host)
163{
164
165 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
166 usleep_range(10000, 11000);
167 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
168 usleep_range(10000, 11000);
169
170 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
171 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
172 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
173 }
174}
175
176static void tmio_mmc_hw_reset(struct mmc_host *mmc)
177{
178 struct tmio_mmc_host *host = mmc_priv(mmc);
179
180 host->reset(host);
181
182 tmio_mmc_abort_dma(host);
183
184 if (host->hw_reset)
185 host->hw_reset(host);
186}
187
188static void tmio_mmc_reset_work(struct work_struct *work)
189{
190 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
191 delayed_reset_work.work);
192 struct mmc_request *mrq;
193 unsigned long flags;
194
195 spin_lock_irqsave(&host->lock, flags);
196 mrq = host->mrq;
197
198
199
200
201
202
203 if (IS_ERR_OR_NULL(mrq) ||
204 time_is_after_jiffies(host->last_req_ts +
205 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
206 spin_unlock_irqrestore(&host->lock, flags);
207 return;
208 }
209
210 dev_warn(&host->pdev->dev,
211 "timeout waiting for hardware interrupt (CMD%u)\n",
212 mrq->cmd->opcode);
213
214 if (host->data)
215 host->data->error = -ETIMEDOUT;
216 else if (host->cmd)
217 host->cmd->error = -ETIMEDOUT;
218 else
219 mrq->cmd->error = -ETIMEDOUT;
220
221 host->cmd = NULL;
222 host->data = NULL;
223
224 spin_unlock_irqrestore(&host->lock, flags);
225
226 tmio_mmc_hw_reset(host->mmc);
227
228
229 host->mrq = NULL;
230
231 mmc_request_done(host->mmc, mrq);
232}
233
234
235
236#define APP_CMD 0x0040
237#define RESP_NONE 0x0300
238#define RESP_R1 0x0400
239#define RESP_R1B 0x0500
240#define RESP_R2 0x0600
241#define RESP_R3 0x0700
242#define DATA_PRESENT 0x0800
243#define TRANSFER_READ 0x1000
244#define TRANSFER_MULTI 0x2000
245#define SECURITY_CMD 0x4000
246#define NO_CMD12_ISSUE 0x4000
247
248static int tmio_mmc_start_command(struct tmio_mmc_host *host,
249 struct mmc_command *cmd)
250{
251 struct mmc_data *data = host->data;
252 int c = cmd->opcode;
253
254 switch (mmc_resp_type(cmd)) {
255 case MMC_RSP_NONE: c |= RESP_NONE; break;
256 case MMC_RSP_R1:
257 case MMC_RSP_R1_NO_CRC:
258 c |= RESP_R1; break;
259 case MMC_RSP_R1B: c |= RESP_R1B; break;
260 case MMC_RSP_R2: c |= RESP_R2; break;
261 case MMC_RSP_R3: c |= RESP_R3; break;
262 default:
263 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
264 return -EINVAL;
265 }
266
267 host->cmd = cmd;
268
269
270
271
272
273
274 if (data) {
275 c |= DATA_PRESENT;
276 if (data->blocks > 1) {
277 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
278 c |= TRANSFER_MULTI;
279
280
281
282
283
284 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
285 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
286 c |= NO_CMD12_ISSUE;
287 }
288 if (data->flags & MMC_DATA_READ)
289 c |= TRANSFER_READ;
290 }
291
292 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
293
294
295 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
296 sd_ctrl_write16(host, CTL_SD_CMD, c);
297
298 return 0;
299}
300
301static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
302 unsigned short *buf,
303 unsigned int count)
304{
305 int is_read = host->data->flags & MMC_DATA_READ;
306 u8 *buf8;
307
308
309
310
311 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
312 u32 data = 0;
313 u32 *buf32 = (u32 *)buf;
314
315 if (is_read)
316 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
317 count >> 2);
318 else
319 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
320 count >> 2);
321
322
323 if (!(count & 0x3))
324 return;
325
326 buf32 += count >> 2;
327 count %= 4;
328
329 if (is_read) {
330 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
331 memcpy(buf32, &data, count);
332 } else {
333 memcpy(&data, buf32, count);
334 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
335 }
336
337 return;
338 }
339
340 if (is_read)
341 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
342 else
343 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
344
345
346 if (!(count & 0x1))
347 return;
348
349
350 buf8 = (u8 *)(buf + (count >> 1));
351
352
353
354
355
356
357
358 if (is_read)
359 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
360 else
361 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
362}
363
364
365
366
367
368
369static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
370{
371 struct mmc_data *data = host->data;
372 void *sg_virt;
373 unsigned short *buf;
374 unsigned int count;
375 unsigned long flags;
376
377 if (host->dma_on) {
378 pr_err("PIO IRQ in DMA mode!\n");
379 return;
380 } else if (!data) {
381 pr_debug("Spurious PIO IRQ\n");
382 return;
383 }
384
385 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
386 buf = (unsigned short *)(sg_virt + host->sg_off);
387
388 count = host->sg_ptr->length - host->sg_off;
389 if (count > data->blksz)
390 count = data->blksz;
391
392 pr_debug("count: %08x offset: %08x flags %08x\n",
393 count, host->sg_off, data->flags);
394
395
396 tmio_mmc_transfer_data(host, buf, count);
397
398 host->sg_off += count;
399
400 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
401
402 if (host->sg_off == host->sg_ptr->length)
403 tmio_mmc_next_sg(host);
404}
405
406static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
407{
408 if (host->sg_ptr == &host->bounce_sg) {
409 unsigned long flags;
410 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
411
412 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
413 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
414 }
415}
416
417
418void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
419{
420 struct mmc_data *data = host->data;
421 struct mmc_command *stop;
422
423 host->data = NULL;
424
425 if (!data) {
426 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
427 return;
428 }
429 stop = data->stop;
430
431
432 if (!data->error)
433 data->bytes_xfered = data->blocks * data->blksz;
434 else
435 data->bytes_xfered = 0;
436
437 pr_debug("Completed data request\n");
438
439
440
441
442
443
444
445
446
447
448 if (data->flags & MMC_DATA_READ) {
449 if (host->dma_on)
450 tmio_mmc_check_bounce_buffer(host);
451 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
452 host->mrq);
453 } else {
454 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
455 host->mrq);
456 }
457
458 if (stop && !host->mrq->sbc) {
459 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
460 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
461 stop->opcode, stop->arg);
462
463
464 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
465
466 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
467 }
468
469 schedule_work(&host->done);
470}
471EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
472
473static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
474{
475 struct mmc_data *data;
476
477 spin_lock(&host->lock);
478 data = host->data;
479
480 if (!data)
481 goto out;
482
483 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
484 stat & TMIO_STAT_TXUNDERRUN)
485 data->error = -EILSEQ;
486 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
487 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
488 bool done = false;
489
490
491
492
493
494
495
496
497
498 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
499 if (status & TMIO_STAT_SCLKDIVEN)
500 done = true;
501 } else {
502 if (!(status & TMIO_STAT_CMD_BUSY))
503 done = true;
504 }
505
506 if (done) {
507 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
508 tmio_mmc_dataend_dma(host);
509 }
510 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
511 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
512 tmio_mmc_dataend_dma(host);
513 } else {
514 tmio_mmc_do_data_irq(host);
515 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
516 }
517out:
518 spin_unlock(&host->lock);
519}
520
521static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
522{
523 struct mmc_command *cmd = host->cmd;
524 int i, addr;
525
526 spin_lock(&host->lock);
527
528 if (!host->cmd) {
529 pr_debug("Spurious CMD irq\n");
530 goto out;
531 }
532
533
534
535
536
537
538 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
539 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
540
541 if (cmd->flags & MMC_RSP_136) {
542 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
543 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
544 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
545 cmd->resp[3] <<= 8;
546 } else if (cmd->flags & MMC_RSP_R3) {
547 cmd->resp[0] = cmd->resp[3];
548 }
549
550 if (stat & TMIO_STAT_CMDTIMEOUT)
551 cmd->error = -ETIMEDOUT;
552 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
553 stat & TMIO_STAT_STOPBIT_ERR ||
554 stat & TMIO_STAT_CMD_IDX_ERR)
555 cmd->error = -EILSEQ;
556
557
558
559
560
561 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
562 if (host->data->flags & MMC_DATA_READ) {
563 if (!host->dma_on) {
564 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
565 } else {
566 tmio_mmc_disable_mmc_irqs(host,
567 TMIO_MASK_READOP);
568 tasklet_schedule(&host->dma_issue);
569 }
570 } else {
571 if (!host->dma_on) {
572 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
573 } else {
574 tmio_mmc_disable_mmc_irqs(host,
575 TMIO_MASK_WRITEOP);
576 tasklet_schedule(&host->dma_issue);
577 }
578 }
579 } else {
580 schedule_work(&host->done);
581 }
582
583out:
584 spin_unlock(&host->lock);
585}
586
587static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
588 int ireg, int status)
589{
590 struct mmc_host *mmc = host->mmc;
591
592
593 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
594 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
595 TMIO_STAT_CARD_REMOVE);
596 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
597 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
598 !work_pending(&mmc->detect.work))
599 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
600 return true;
601 }
602
603 return false;
604}
605
606static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
607 int status)
608{
609
610 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
611 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
612 TMIO_STAT_CMDTIMEOUT);
613 tmio_mmc_cmd_irq(host, status);
614 return true;
615 }
616
617
618 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
619 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
620 tmio_mmc_pio_irq(host);
621 return true;
622 }
623
624
625 if (ireg & TMIO_STAT_DATAEND) {
626 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
627 tmio_mmc_data_irq(host, status);
628 return true;
629 }
630
631 return false;
632}
633
634static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
635{
636 struct mmc_host *mmc = host->mmc;
637 struct tmio_mmc_data *pdata = host->pdata;
638 unsigned int ireg, status;
639 unsigned int sdio_status;
640
641 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
642 return false;
643
644 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
645 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
646
647 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
648 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
649 sdio_status |= TMIO_SDIO_SETBITS_MASK;
650
651 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
652
653 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
654 mmc_signal_sdio_irq(mmc);
655
656 return ireg;
657}
658
659irqreturn_t tmio_mmc_irq(int irq, void *devid)
660{
661 struct tmio_mmc_host *host = devid;
662 unsigned int ireg, status;
663
664 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
665 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
666
667
668 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
669
670 if (__tmio_mmc_card_detect_irq(host, ireg, status))
671 return IRQ_HANDLED;
672 if (__tmio_mmc_sdcard_irq(host, ireg, status))
673 return IRQ_HANDLED;
674
675 if (__tmio_mmc_sdio_irq(host))
676 return IRQ_HANDLED;
677
678 return IRQ_NONE;
679}
680EXPORT_SYMBOL_GPL(tmio_mmc_irq);
681
682static int tmio_mmc_start_data(struct tmio_mmc_host *host,
683 struct mmc_data *data)
684{
685 struct tmio_mmc_data *pdata = host->pdata;
686
687 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
688 data->blksz, data->blocks);
689
690
691 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
692 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
693 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
694
695 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
696 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
697 mmc_hostname(host->mmc), data->blksz);
698 return -EINVAL;
699 }
700 }
701
702 tmio_mmc_init_sg(host, data);
703 host->data = data;
704 host->dma_on = false;
705
706
707 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
708 if (host->mmc->max_blk_count >= SZ_64K)
709 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
710 else
711 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
712
713 tmio_mmc_start_dma(host, data);
714
715 return 0;
716}
717
718static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
719{
720 struct tmio_mmc_host *host = mmc_priv(mmc);
721 int i, ret = 0;
722
723 if (!host->init_tuning || !host->select_tuning)
724
725 goto out;
726
727 host->tap_num = host->init_tuning(host);
728 if (!host->tap_num)
729
730 goto out;
731
732 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
733 dev_warn_once(&host->pdev->dev,
734 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
735 goto out;
736 }
737
738 bitmap_zero(host->taps, host->tap_num * 2);
739
740
741 for (i = 0; i < 2 * host->tap_num; i++) {
742 if (host->prepare_tuning)
743 host->prepare_tuning(host, i % host->tap_num);
744
745 ret = mmc_send_tuning(mmc, opcode, NULL);
746 if (ret == 0)
747 set_bit(i, host->taps);
748 }
749
750 ret = host->select_tuning(host);
751
752out:
753 if (ret < 0) {
754 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
755 tmio_mmc_hw_reset(mmc);
756 }
757
758 return ret;
759}
760
761static void tmio_process_mrq(struct tmio_mmc_host *host,
762 struct mmc_request *mrq)
763{
764 struct mmc_command *cmd;
765 int ret;
766
767 if (mrq->sbc && host->cmd != mrq->sbc) {
768 cmd = mrq->sbc;
769 } else {
770 cmd = mrq->cmd;
771 if (mrq->data) {
772 ret = tmio_mmc_start_data(host, mrq->data);
773 if (ret)
774 goto fail;
775 }
776 }
777
778 ret = tmio_mmc_start_command(host, cmd);
779 if (ret)
780 goto fail;
781
782 schedule_delayed_work(&host->delayed_reset_work,
783 msecs_to_jiffies(CMDREQ_TIMEOUT));
784 return;
785
786fail:
787 host->mrq = NULL;
788 mrq->cmd->error = ret;
789 mmc_request_done(host->mmc, mrq);
790}
791
792
793static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
794{
795 struct tmio_mmc_host *host = mmc_priv(mmc);
796 unsigned long flags;
797
798 spin_lock_irqsave(&host->lock, flags);
799
800 if (host->mrq) {
801 pr_debug("request not null\n");
802 if (IS_ERR(host->mrq)) {
803 spin_unlock_irqrestore(&host->lock, flags);
804 mrq->cmd->error = -EAGAIN;
805 mmc_request_done(mmc, mrq);
806 return;
807 }
808 }
809
810 host->last_req_ts = jiffies;
811 wmb();
812 host->mrq = mrq;
813
814 spin_unlock_irqrestore(&host->lock, flags);
815
816 tmio_process_mrq(host, mrq);
817}
818
819static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
820{
821 struct mmc_request *mrq;
822 unsigned long flags;
823
824 spin_lock_irqsave(&host->lock, flags);
825
826 mrq = host->mrq;
827 if (IS_ERR_OR_NULL(mrq)) {
828 spin_unlock_irqrestore(&host->lock, flags);
829 return;
830 }
831
832
833 if (host->cmd != mrq->sbc) {
834 host->cmd = NULL;
835 host->data = NULL;
836 host->mrq = NULL;
837 }
838
839 cancel_delayed_work(&host->delayed_reset_work);
840
841 spin_unlock_irqrestore(&host->lock, flags);
842
843 if (mrq->cmd->error || (mrq->data && mrq->data->error))
844 tmio_mmc_abort_dma(host);
845
846
847 if (host->check_scc_error && host->check_scc_error(host))
848 mmc_retune_needed(host->mmc);
849
850
851 if (host->mrq && !mrq->cmd->error) {
852 tmio_process_mrq(host, mrq);
853 return;
854 }
855
856 mmc_request_done(host->mmc, mrq);
857}
858
859static void tmio_mmc_done_work(struct work_struct *work)
860{
861 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
862 done);
863 tmio_mmc_finish_request(host);
864}
865
866static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
867{
868 struct mmc_host *mmc = host->mmc;
869 int ret = 0;
870
871
872
873 if (host->set_pwr)
874 host->set_pwr(host->pdev, 1);
875
876 if (!IS_ERR(mmc->supply.vmmc)) {
877 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
878
879
880
881
882
883
884 usleep_range(200, 300);
885 }
886
887
888
889
890 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
891 ret = regulator_enable(mmc->supply.vqmmc);
892 usleep_range(200, 300);
893 }
894
895 if (ret < 0)
896 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
897 ret);
898}
899
900static void tmio_mmc_power_off(struct tmio_mmc_host *host)
901{
902 struct mmc_host *mmc = host->mmc;
903
904 if (!IS_ERR(mmc->supply.vqmmc))
905 regulator_disable(mmc->supply.vqmmc);
906
907 if (!IS_ERR(mmc->supply.vmmc))
908 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
909
910 if (host->set_pwr)
911 host->set_pwr(host->pdev, 0);
912}
913
914static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
915 unsigned char bus_width)
916{
917 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
918 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
919
920
921 if (bus_width == MMC_BUS_WIDTH_1)
922 reg |= CARD_OPT_WIDTH;
923 else if (bus_width == MMC_BUS_WIDTH_8)
924 reg |= CARD_OPT_WIDTH8;
925
926 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
927}
928
929
930
931
932
933
934
935static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
936{
937 struct tmio_mmc_host *host = mmc_priv(mmc);
938 struct device *dev = &host->pdev->dev;
939 unsigned long flags;
940
941 mutex_lock(&host->ios_lock);
942
943 spin_lock_irqsave(&host->lock, flags);
944 if (host->mrq) {
945 if (IS_ERR(host->mrq)) {
946 dev_dbg(dev,
947 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
948 current->comm, task_pid_nr(current),
949 ios->clock, ios->power_mode);
950 host->mrq = ERR_PTR(-EINTR);
951 } else {
952 dev_dbg(dev,
953 "%s.%d: CMD%u active since %lu, now %lu!\n",
954 current->comm, task_pid_nr(current),
955 host->mrq->cmd->opcode, host->last_req_ts,
956 jiffies);
957 }
958 spin_unlock_irqrestore(&host->lock, flags);
959
960 mutex_unlock(&host->ios_lock);
961 return;
962 }
963
964 host->mrq = ERR_PTR(-EBUSY);
965
966 spin_unlock_irqrestore(&host->lock, flags);
967
968 switch (ios->power_mode) {
969 case MMC_POWER_OFF:
970 tmio_mmc_power_off(host);
971 host->set_clock(host, 0);
972 break;
973 case MMC_POWER_UP:
974 tmio_mmc_power_on(host, ios->vdd);
975 host->set_clock(host, ios->clock);
976 tmio_mmc_set_bus_width(host, ios->bus_width);
977 break;
978 case MMC_POWER_ON:
979 host->set_clock(host, ios->clock);
980 tmio_mmc_set_bus_width(host, ios->bus_width);
981 break;
982 }
983
984
985 usleep_range(140, 200);
986 if (PTR_ERR(host->mrq) == -EINTR)
987 dev_dbg(&host->pdev->dev,
988 "%s.%d: IOS interrupted: clk %u, mode %u",
989 current->comm, task_pid_nr(current),
990 ios->clock, ios->power_mode);
991 host->mrq = NULL;
992
993 host->clk_cache = ios->clock;
994
995 mutex_unlock(&host->ios_lock);
996}
997
998static int tmio_mmc_get_ro(struct mmc_host *mmc)
999{
1000 struct tmio_mmc_host *host = mmc_priv(mmc);
1001
1002 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1003 TMIO_STAT_WRPROTECT);
1004}
1005
1006static int tmio_mmc_get_cd(struct mmc_host *mmc)
1007{
1008 struct tmio_mmc_host *host = mmc_priv(mmc);
1009
1010 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1011 TMIO_STAT_SIGSTATE);
1012}
1013
1014static int tmio_multi_io_quirk(struct mmc_card *card,
1015 unsigned int direction, int blk_size)
1016{
1017 struct tmio_mmc_host *host = mmc_priv(card->host);
1018
1019 if (host->multi_io_quirk)
1020 return host->multi_io_quirk(card, direction, blk_size);
1021
1022 return blk_size;
1023}
1024
1025static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
1026 struct mmc_ios *ios)
1027{
1028 struct tmio_mmc_host *host = mmc_priv(mmc);
1029
1030 if (host->prepare_hs400_tuning)
1031 host->prepare_hs400_tuning(host);
1032
1033 return 0;
1034}
1035
1036static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
1037{
1038 struct tmio_mmc_host *host = mmc_priv(mmc);
1039
1040 if (host->hs400_downgrade)
1041 host->hs400_downgrade(host);
1042}
1043
1044static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
1045{
1046 struct tmio_mmc_host *host = mmc_priv(mmc);
1047
1048 if (host->hs400_complete)
1049 host->hs400_complete(host);
1050}
1051
1052static const struct mmc_host_ops tmio_mmc_ops = {
1053 .request = tmio_mmc_request,
1054 .set_ios = tmio_mmc_set_ios,
1055 .get_ro = tmio_mmc_get_ro,
1056 .get_cd = tmio_mmc_get_cd,
1057 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1058 .multi_io_quirk = tmio_multi_io_quirk,
1059 .hw_reset = tmio_mmc_hw_reset,
1060 .execute_tuning = tmio_mmc_execute_tuning,
1061 .prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
1062 .hs400_downgrade = tmio_mmc_hs400_downgrade,
1063 .hs400_complete = tmio_mmc_hs400_complete,
1064};
1065
1066static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1067{
1068 struct tmio_mmc_data *pdata = host->pdata;
1069 struct mmc_host *mmc = host->mmc;
1070 int err;
1071
1072 err = mmc_regulator_get_supply(mmc);
1073 if (err)
1074 return err;
1075
1076
1077 if (!mmc->ocr_avail)
1078 mmc->ocr_avail = pdata->ocr_mask;
1079
1080
1081
1082
1083
1084 if (!mmc->ocr_avail)
1085 return -EPROBE_DEFER;
1086
1087 return 0;
1088}
1089
1090static void tmio_mmc_of_parse(struct platform_device *pdev,
1091 struct mmc_host *mmc)
1092{
1093 const struct device_node *np = pdev->dev.of_node;
1094
1095 if (!np)
1096 return;
1097
1098
1099
1100
1101
1102
1103 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1104 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1105}
1106
1107struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1108 struct tmio_mmc_data *pdata)
1109{
1110 struct tmio_mmc_host *host;
1111 struct mmc_host *mmc;
1112 struct resource *res;
1113 void __iomem *ctl;
1114 int ret;
1115
1116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1117 ctl = devm_ioremap_resource(&pdev->dev, res);
1118 if (IS_ERR(ctl))
1119 return ERR_CAST(ctl);
1120
1121 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1122 if (!mmc)
1123 return ERR_PTR(-ENOMEM);
1124
1125 host = mmc_priv(mmc);
1126 host->ctl = ctl;
1127 host->mmc = mmc;
1128 host->pdev = pdev;
1129 host->pdata = pdata;
1130 host->ops = tmio_mmc_ops;
1131 mmc->ops = &host->ops;
1132
1133 ret = mmc_of_parse(host->mmc);
1134 if (ret) {
1135 host = ERR_PTR(ret);
1136 goto free;
1137 }
1138
1139 tmio_mmc_of_parse(pdev, mmc);
1140
1141 platform_set_drvdata(pdev, host);
1142
1143 return host;
1144free:
1145 mmc_free_host(mmc);
1146
1147 return host;
1148}
1149EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1150
1151void tmio_mmc_host_free(struct tmio_mmc_host *host)
1152{
1153 mmc_free_host(host->mmc);
1154}
1155EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1156
1157int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1158{
1159 struct platform_device *pdev = _host->pdev;
1160 struct tmio_mmc_data *pdata = _host->pdata;
1161 struct mmc_host *mmc = _host->mmc;
1162 int ret;
1163
1164
1165
1166
1167
1168 if (mmc->f_min == 0)
1169 return -EINVAL;
1170
1171 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1172 _host->write16_hook = NULL;
1173
1174 _host->set_pwr = pdata->set_pwr;
1175
1176 ret = tmio_mmc_init_ocr(_host);
1177 if (ret < 0)
1178 return ret;
1179
1180
1181
1182
1183
1184 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
1185 if (ret == -EPROBE_DEFER)
1186 return ret;
1187
1188 mmc->caps |= MMC_CAP_ERASE | MMC_CAP_4_BIT_DATA | pdata->capabilities;
1189 mmc->caps2 |= pdata->capabilities2;
1190 mmc->max_segs = pdata->max_segs ? : 32;
1191 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1192 mmc->max_blk_count = pdata->max_blk_count ? :
1193 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1194 mmc->max_req_size = min_t(size_t,
1195 mmc->max_blk_size * mmc->max_blk_count,
1196 dma_max_mapping_size(&pdev->dev));
1197 mmc->max_seg_size = mmc->max_req_size;
1198
1199 if (mmc_can_gpio_ro(mmc))
1200 _host->ops.get_ro = mmc_gpio_get_ro;
1201
1202 if (mmc_can_gpio_cd(mmc))
1203 _host->ops.get_cd = mmc_gpio_get_cd;
1204
1205 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1206 mmc->caps & MMC_CAP_NEEDS_POLL ||
1207 !mmc_card_is_removable(mmc));
1208
1209 if (!_host->reset)
1210 _host->reset = tmio_mmc_reset;
1211
1212
1213
1214
1215
1216
1217
1218 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1219 _host->native_hotplug = true;
1220
1221
1222
1223
1224
1225 if (_host->native_hotplug)
1226 pm_runtime_get_noresume(&pdev->dev);
1227
1228 _host->sdio_irq_enabled = false;
1229 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1230 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1231
1232 _host->set_clock(_host, 0);
1233 tmio_mmc_hw_reset(mmc);
1234
1235 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1236 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1237
1238 if (_host->native_hotplug)
1239 tmio_mmc_enable_mmc_irqs(_host,
1240 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1241
1242 spin_lock_init(&_host->lock);
1243 mutex_init(&_host->ios_lock);
1244
1245
1246 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1247 INIT_WORK(&_host->done, tmio_mmc_done_work);
1248
1249
1250 tmio_mmc_request_dma(_host, pdata);
1251
1252 dev_pm_domain_start(&pdev->dev);
1253 pm_runtime_get_noresume(&pdev->dev);
1254 pm_runtime_set_active(&pdev->dev);
1255 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1256 pm_runtime_use_autosuspend(&pdev->dev);
1257 pm_runtime_enable(&pdev->dev);
1258
1259 ret = mmc_add_host(mmc);
1260 if (ret)
1261 goto remove_host;
1262
1263 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1264 pm_runtime_put(&pdev->dev);
1265
1266 return 0;
1267
1268remove_host:
1269 pm_runtime_put_noidle(&pdev->dev);
1270 tmio_mmc_host_remove(_host);
1271 return ret;
1272}
1273EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1274
1275void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1276{
1277 struct platform_device *pdev = host->pdev;
1278 struct mmc_host *mmc = host->mmc;
1279
1280 pm_runtime_get_sync(&pdev->dev);
1281
1282 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1283 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1284
1285 dev_pm_qos_hide_latency_limit(&pdev->dev);
1286
1287 mmc_remove_host(mmc);
1288 cancel_work_sync(&host->done);
1289 cancel_delayed_work_sync(&host->delayed_reset_work);
1290 tmio_mmc_release_dma(host);
1291
1292 pm_runtime_dont_use_autosuspend(&pdev->dev);
1293 if (host->native_hotplug)
1294 pm_runtime_put_noidle(&pdev->dev);
1295 pm_runtime_put_sync(&pdev->dev);
1296 pm_runtime_disable(&pdev->dev);
1297}
1298EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1299
1300#ifdef CONFIG_PM
1301static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1302{
1303 if (!host->clk_enable)
1304 return -ENOTSUPP;
1305
1306 return host->clk_enable(host);
1307}
1308
1309static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1310{
1311 if (host->clk_disable)
1312 host->clk_disable(host);
1313}
1314
1315int tmio_mmc_host_runtime_suspend(struct device *dev)
1316{
1317 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1318
1319 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1320
1321 if (host->clk_cache)
1322 host->set_clock(host, 0);
1323
1324 tmio_mmc_clk_disable(host);
1325
1326 return 0;
1327}
1328EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1329
1330static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1331{
1332 return host->tap_num && mmc_can_retune(host->mmc);
1333}
1334
1335int tmio_mmc_host_runtime_resume(struct device *dev)
1336{
1337 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1338
1339 tmio_mmc_clk_enable(host);
1340 tmio_mmc_hw_reset(host->mmc);
1341
1342 if (host->clk_cache)
1343 host->set_clock(host, host->clk_cache);
1344
1345 if (host->native_hotplug)
1346 tmio_mmc_enable_mmc_irqs(host,
1347 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1348
1349 tmio_mmc_enable_dma(host, true);
1350
1351 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1352 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1353
1354 return 0;
1355}
1356EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1357#endif
1358
1359MODULE_LICENSE("GPL v2");
1360