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11#include <linux/slab.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/of.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/rawnand.h>
17#include <linux/mtd/partitions.h>
18#include <linux/clk.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/sizes.h>
22#include <linux/platform_data/mtd-orion_nand.h>
23
24struct orion_nand_info {
25 struct nand_chip chip;
26 struct clk *clk;
27};
28
29static void orion_nand_cmd_ctrl(struct nand_chip *nc, int cmd,
30 unsigned int ctrl)
31{
32 struct orion_nand_data *board = nand_get_controller_data(nc);
33 u32 offs;
34
35 if (cmd == NAND_CMD_NONE)
36 return;
37
38 if (ctrl & NAND_CLE)
39 offs = (1 << board->cle);
40 else if (ctrl & NAND_ALE)
41 offs = (1 << board->ale);
42 else
43 return;
44
45 if (nc->options & NAND_BUSWIDTH_16)
46 offs <<= 1;
47
48 writeb(cmd, nc->legacy.IO_ADDR_W + offs);
49}
50
51static void orion_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
52{
53 void __iomem *io_base = chip->legacy.IO_ADDR_R;
54#if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5
55 uint64_t *buf64;
56#endif
57 int i = 0;
58
59 while (len && (unsigned long)buf & 7) {
60 *buf++ = readb(io_base);
61 len--;
62 }
63#if defined(__LINUX_ARM_ARCH__) && __LINUX_ARM_ARCH__ >= 5
64 buf64 = (uint64_t *)buf;
65 while (i < len/8) {
66
67
68
69
70
71 register uint64_t x asm ("r2");
72
73 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
74 buf64[i++] = x;
75 }
76 i *= 8;
77#else
78 readsl(io_base, buf, len/4);
79 i = len / 4 * 4;
80#endif
81 while (i < len)
82 buf[i++] = readb(io_base);
83}
84
85static int __init orion_nand_probe(struct platform_device *pdev)
86{
87 struct orion_nand_info *info;
88 struct mtd_info *mtd;
89 struct nand_chip *nc;
90 struct orion_nand_data *board;
91 struct resource *res;
92 void __iomem *io_base;
93 int ret = 0;
94 u32 val = 0;
95
96 info = devm_kzalloc(&pdev->dev,
97 sizeof(struct orion_nand_info),
98 GFP_KERNEL);
99 if (!info)
100 return -ENOMEM;
101 nc = &info->chip;
102 mtd = nand_to_mtd(nc);
103
104 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
105 io_base = devm_ioremap_resource(&pdev->dev, res);
106
107 if (IS_ERR(io_base))
108 return PTR_ERR(io_base);
109
110 if (pdev->dev.of_node) {
111 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
112 GFP_KERNEL);
113 if (!board)
114 return -ENOMEM;
115 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
116 board->cle = (u8)val;
117 else
118 board->cle = 0;
119 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
120 board->ale = (u8)val;
121 else
122 board->ale = 1;
123 if (!of_property_read_u32(pdev->dev.of_node,
124 "bank-width", &val))
125 board->width = (u8)val * 8;
126 else
127 board->width = 8;
128 if (!of_property_read_u32(pdev->dev.of_node,
129 "chip-delay", &val))
130 board->chip_delay = (u8)val;
131 } else {
132 board = dev_get_platdata(&pdev->dev);
133 }
134
135 mtd->dev.parent = &pdev->dev;
136
137 nand_set_controller_data(nc, board);
138 nand_set_flash_node(nc, pdev->dev.of_node);
139 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base;
140 nc->legacy.cmd_ctrl = orion_nand_cmd_ctrl;
141 nc->legacy.read_buf = orion_nand_read_buf;
142 nc->ecc.mode = NAND_ECC_SOFT;
143 nc->ecc.algo = NAND_ECC_HAMMING;
144
145 if (board->chip_delay)
146 nc->legacy.chip_delay = board->chip_delay;
147
148 WARN(board->width > 16,
149 "%d bit bus width out of range",
150 board->width);
151
152 if (board->width == 16)
153 nc->options |= NAND_BUSWIDTH_16;
154
155 platform_set_drvdata(pdev, info);
156
157
158
159 info->clk = devm_clk_get(&pdev->dev, NULL);
160 if (IS_ERR(info->clk)) {
161 ret = PTR_ERR(info->clk);
162 if (ret == -ENOENT) {
163 info->clk = NULL;
164 } else {
165 dev_err(&pdev->dev, "failed to get clock!\n");
166 return ret;
167 }
168 }
169
170 ret = clk_prepare_enable(info->clk);
171 if (ret) {
172 dev_err(&pdev->dev, "failed to prepare clock!\n");
173 return ret;
174 }
175
176 ret = nand_scan(nc, 1);
177 if (ret)
178 goto no_dev;
179
180 mtd->name = "orion_nand";
181 ret = mtd_device_register(mtd, board->parts, board->nr_parts);
182 if (ret) {
183 nand_release(nc);
184 goto no_dev;
185 }
186
187 return 0;
188
189no_dev:
190 clk_disable_unprepare(info->clk);
191 return ret;
192}
193
194static int orion_nand_remove(struct platform_device *pdev)
195{
196 struct orion_nand_info *info = platform_get_drvdata(pdev);
197 struct nand_chip *chip = &info->chip;
198
199 nand_release(chip);
200
201 clk_disable_unprepare(info->clk);
202
203 return 0;
204}
205
206#ifdef CONFIG_OF
207static const struct of_device_id orion_nand_of_match_table[] = {
208 { .compatible = "marvell,orion-nand", },
209 {},
210};
211MODULE_DEVICE_TABLE(of, orion_nand_of_match_table);
212#endif
213
214static struct platform_driver orion_nand_driver = {
215 .remove = orion_nand_remove,
216 .driver = {
217 .name = "orion_nand",
218 .of_match_table = of_match_ptr(orion_nand_of_match_table),
219 },
220};
221
222module_platform_driver_probe(orion_nand_driver, orion_nand_probe);
223
224MODULE_LICENSE("GPL");
225MODULE_AUTHOR("Tzachi Perelstein");
226MODULE_DESCRIPTION("NAND glue for Orion platforms");
227MODULE_ALIAS("platform:orion_nand");
228
