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6
7#include <linux/if_ether.h>
8#include <linux/if_vlan.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_net.h>
14#include <linux/of_device.h>
15#include <linux/phy.h>
16#include <linux/platform_device.h>
17#include <linux/acpi.h>
18#include "emac.h"
19#include "emac-mac.h"
20#include "emac-phy.h"
21#include "emac-sgmii.h"
22
23#define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
24 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
25
26#define EMAC_RRD_SIZE 4
27
28#define EMAC_TS_RRD_SIZE 6
29#define EMAC_TPD_SIZE 4
30#define EMAC_RFD_SIZE 2
31
32#define REG_MAC_RX_STATUS_BIN EMAC_RXMAC_STATC_REG0
33#define REG_MAC_RX_STATUS_END EMAC_RXMAC_STATC_REG22
34#define REG_MAC_TX_STATUS_BIN EMAC_TXMAC_STATC_REG0
35#define REG_MAC_TX_STATUS_END EMAC_TXMAC_STATC_REG24
36
37#define RXQ0_NUM_RFD_PREF_DEF 8
38#define TXQ0_NUM_TPD_PREF_DEF 5
39
40#define EMAC_PREAMBLE_DEF 7
41
42#define DMAR_DLY_CNT_DEF 15
43#define DMAW_DLY_CNT_DEF 4
44
45#define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT)
46
47#define ISR_TX_PKT (\
48 TX_PKT_INT |\
49 TX_PKT_INT1 |\
50 TX_PKT_INT2 |\
51 TX_PKT_INT3)
52
53#define ISR_OVER (\
54 RFD0_UR_INT |\
55 RFD1_UR_INT |\
56 RFD2_UR_INT |\
57 RFD3_UR_INT |\
58 RFD4_UR_INT |\
59 RXF_OF_INT |\
60 TXF_UR_INT)
61
62#define ISR_ERROR (\
63 DMAR_TO_INT |\
64 DMAW_TO_INT |\
65 TXQ_TO_INT)
66
67
68static const char * const emac_clk_name[] = {
69 "axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk",
70 "rx_clk", "sys_clk"
71};
72
73void emac_reg_update32(void __iomem *addr, u32 mask, u32 val)
74{
75 u32 data = readl(addr);
76
77 writel(((data & ~mask) | val), addr);
78}
79
80
81int emac_reinit_locked(struct emac_adapter *adpt)
82{
83 int ret;
84
85 mutex_lock(&adpt->reset_lock);
86
87 emac_mac_down(adpt);
88 emac_sgmii_reset(adpt);
89 ret = emac_mac_up(adpt);
90
91 mutex_unlock(&adpt->reset_lock);
92
93 return ret;
94}
95
96
97static int emac_napi_rtx(struct napi_struct *napi, int budget)
98{
99 struct emac_rx_queue *rx_q =
100 container_of(napi, struct emac_rx_queue, napi);
101 struct emac_adapter *adpt = netdev_priv(rx_q->netdev);
102 struct emac_irq *irq = rx_q->irq;
103 int work_done = 0;
104
105 emac_mac_rx_process(adpt, rx_q, &work_done, budget);
106
107 if (work_done < budget) {
108 napi_complete_done(napi, work_done);
109
110 irq->mask |= rx_q->intr;
111 writel(irq->mask, adpt->base + EMAC_INT_MASK);
112 }
113
114 return work_done;
115}
116
117
118static int emac_start_xmit(struct sk_buff *skb, struct net_device *netdev)
119{
120 struct emac_adapter *adpt = netdev_priv(netdev);
121
122 return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb);
123}
124
125static irqreturn_t emac_isr(int _irq, void *data)
126{
127 struct emac_irq *irq = data;
128 struct emac_adapter *adpt =
129 container_of(irq, struct emac_adapter, irq);
130 struct emac_rx_queue *rx_q = &adpt->rx_q;
131 u32 isr, status;
132
133
134 writel(0, adpt->base + EMAC_INT_MASK);
135
136 isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
137
138 status = isr & irq->mask;
139 if (status == 0)
140 goto exit;
141
142 if (status & ISR_ERROR) {
143 net_err_ratelimited("%s: error interrupt 0x%lx\n",
144 adpt->netdev->name, status & ISR_ERROR);
145
146 schedule_work(&adpt->work_thread);
147 }
148
149
150
151
152 if (status & rx_q->intr) {
153 if (napi_schedule_prep(&rx_q->napi)) {
154 irq->mask &= ~rx_q->intr;
155 __napi_schedule(&rx_q->napi);
156 }
157 }
158
159 if (status & TX_PKT_INT)
160 emac_mac_tx_process(adpt, &adpt->tx_q);
161
162 if (status & ISR_OVER)
163 net_warn_ratelimited("%s: TX/RX overflow interrupt\n",
164 adpt->netdev->name);
165
166exit:
167
168 writel(irq->mask, adpt->base + EMAC_INT_MASK);
169
170 return IRQ_HANDLED;
171}
172
173
174static int emac_set_features(struct net_device *netdev,
175 netdev_features_t features)
176{
177 netdev_features_t changed = features ^ netdev->features;
178 struct emac_adapter *adpt = netdev_priv(netdev);
179
180
181
182
183 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX)))
184 return 0;
185
186 if (!netif_running(netdev))
187 return 0;
188
189
190
191
192 netdev->features = features;
193
194 return emac_reinit_locked(adpt);
195}
196
197
198static void emac_rx_mode_set(struct net_device *netdev)
199{
200 struct emac_adapter *adpt = netdev_priv(netdev);
201 struct netdev_hw_addr *ha;
202
203 emac_mac_mode_config(adpt);
204
205
206 emac_mac_multicast_addr_clear(adpt);
207 netdev_for_each_mc_addr(ha, netdev)
208 emac_mac_multicast_addr_set(adpt, ha->addr);
209}
210
211
212static int emac_change_mtu(struct net_device *netdev, int new_mtu)
213{
214 struct emac_adapter *adpt = netdev_priv(netdev);
215
216 netif_dbg(adpt, hw, adpt->netdev,
217 "changing MTU from %d to %d\n", netdev->mtu,
218 new_mtu);
219 netdev->mtu = new_mtu;
220
221 if (netif_running(netdev))
222 return emac_reinit_locked(adpt);
223
224 return 0;
225}
226
227
228static int emac_open(struct net_device *netdev)
229{
230 struct emac_adapter *adpt = netdev_priv(netdev);
231 struct emac_irq *irq = &adpt->irq;
232 int ret;
233
234 ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq);
235 if (ret) {
236 netdev_err(adpt->netdev, "could not request emac-core0 irq\n");
237 return ret;
238 }
239
240
241 ret = emac_mac_rx_tx_rings_alloc_all(adpt);
242 if (ret) {
243 netdev_err(adpt->netdev, "error allocating rx/tx rings\n");
244 free_irq(irq->irq, irq);
245 return ret;
246 }
247
248 ret = emac_sgmii_open(adpt);
249 if (ret) {
250 emac_mac_rx_tx_rings_free_all(adpt);
251 free_irq(irq->irq, irq);
252 return ret;
253 }
254
255 ret = emac_mac_up(adpt);
256 if (ret) {
257 emac_mac_rx_tx_rings_free_all(adpt);
258 free_irq(irq->irq, irq);
259 emac_sgmii_close(adpt);
260 return ret;
261 }
262
263 return 0;
264}
265
266
267static int emac_close(struct net_device *netdev)
268{
269 struct emac_adapter *adpt = netdev_priv(netdev);
270
271 mutex_lock(&adpt->reset_lock);
272
273 emac_sgmii_close(adpt);
274 emac_mac_down(adpt);
275 emac_mac_rx_tx_rings_free_all(adpt);
276
277 free_irq(adpt->irq.irq, &adpt->irq);
278
279 mutex_unlock(&adpt->reset_lock);
280
281 return 0;
282}
283
284
285static void emac_tx_timeout(struct net_device *netdev)
286{
287 struct emac_adapter *adpt = netdev_priv(netdev);
288
289 schedule_work(&adpt->work_thread);
290}
291
292
293static int emac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
294{
295 if (!netif_running(netdev))
296 return -EINVAL;
297
298 if (!netdev->phydev)
299 return -ENODEV;
300
301 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
302}
303
304
305
306
307
308
309
310
311
312void emac_update_hw_stats(struct emac_adapter *adpt)
313{
314 struct emac_stats *stats = &adpt->stats;
315 u64 *stats_itr = &adpt->stats.rx_ok;
316 void __iomem *base = adpt->base;
317 unsigned int addr;
318
319 addr = REG_MAC_RX_STATUS_BIN;
320 while (addr <= REG_MAC_RX_STATUS_END) {
321 *stats_itr += readl_relaxed(base + addr);
322 stats_itr++;
323 addr += sizeof(u32);
324 }
325
326
327 stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
328 stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
329
330
331 addr = REG_MAC_TX_STATUS_BIN;
332 stats_itr = &stats->tx_ok;
333
334 while (addr <= REG_MAC_TX_STATUS_END) {
335 *stats_itr += readl_relaxed(base + addr);
336 stats_itr++;
337 addr += sizeof(u32);
338 }
339
340
341 stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
342}
343
344
345static void emac_get_stats64(struct net_device *netdev,
346 struct rtnl_link_stats64 *net_stats)
347{
348 struct emac_adapter *adpt = netdev_priv(netdev);
349 struct emac_stats *stats = &adpt->stats;
350
351 spin_lock(&stats->lock);
352
353 emac_update_hw_stats(adpt);
354
355
356 net_stats->rx_packets = stats->rx_ok;
357 net_stats->tx_packets = stats->tx_ok;
358 net_stats->rx_bytes = stats->rx_byte_cnt;
359 net_stats->tx_bytes = stats->tx_byte_cnt;
360 net_stats->multicast = stats->rx_mcast;
361 net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 +
362 stats->tx_late_col + stats->tx_abort_col;
363
364 net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err +
365 stats->rx_len_err + stats->rx_sz_ov +
366 stats->rx_align_err;
367 net_stats->rx_fifo_errors = stats->rx_rxf_ov;
368 net_stats->rx_length_errors = stats->rx_len_err;
369 net_stats->rx_crc_errors = stats->rx_fcs_err;
370 net_stats->rx_frame_errors = stats->rx_align_err;
371 net_stats->rx_over_errors = stats->rx_rxf_ov;
372 net_stats->rx_missed_errors = stats->rx_rxf_ov;
373
374 net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col +
375 stats->tx_underrun + stats->tx_trunc;
376 net_stats->tx_fifo_errors = stats->tx_underrun;
377 net_stats->tx_aborted_errors = stats->tx_abort_col;
378 net_stats->tx_window_errors = stats->tx_late_col;
379
380 spin_unlock(&stats->lock);
381}
382
383static const struct net_device_ops emac_netdev_ops = {
384 .ndo_open = emac_open,
385 .ndo_stop = emac_close,
386 .ndo_validate_addr = eth_validate_addr,
387 .ndo_start_xmit = emac_start_xmit,
388 .ndo_set_mac_address = eth_mac_addr,
389 .ndo_change_mtu = emac_change_mtu,
390 .ndo_do_ioctl = emac_ioctl,
391 .ndo_tx_timeout = emac_tx_timeout,
392 .ndo_get_stats64 = emac_get_stats64,
393 .ndo_set_features = emac_set_features,
394 .ndo_set_rx_mode = emac_rx_mode_set,
395};
396
397
398static void emac_work_thread(struct work_struct *work)
399{
400 struct emac_adapter *adpt =
401 container_of(work, struct emac_adapter, work_thread);
402
403 emac_reinit_locked(adpt);
404}
405
406
407static void emac_init_adapter(struct emac_adapter *adpt)
408{
409 u32 reg;
410
411 adpt->rrd_size = EMAC_RRD_SIZE;
412 adpt->tpd_size = EMAC_TPD_SIZE;
413 adpt->rfd_size = EMAC_RFD_SIZE;
414
415
416 adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS;
417 adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS;
418
419
420 adpt->dma_order = emac_dma_ord_out;
421 adpt->dmar_block = emac_dma_req_4096;
422 adpt->dmaw_block = emac_dma_req_128;
423 adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF;
424 adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF;
425 adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF;
426 adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF;
427
428
429 reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) |
430 ((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT);
431 adpt->irq_mod = reg;
432
433
434 adpt->preamble = EMAC_PREAMBLE_DEF;
435
436
437 adpt->automatic = true;
438
439
440 adpt->single_pause_mode = false;
441}
442
443
444static int emac_clks_get(struct platform_device *pdev,
445 struct emac_adapter *adpt)
446{
447 unsigned int i;
448
449 for (i = 0; i < EMAC_CLK_CNT; i++) {
450 struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);
451
452 if (IS_ERR(clk)) {
453 dev_err(&pdev->dev,
454 "could not claim clock %s (error=%li)\n",
455 emac_clk_name[i], PTR_ERR(clk));
456
457 return PTR_ERR(clk);
458 }
459
460 adpt->clk[i] = clk;
461 }
462
463 return 0;
464}
465
466
467static int emac_clks_phase1_init(struct platform_device *pdev,
468 struct emac_adapter *adpt)
469{
470 int ret;
471
472
473
474
475 if (has_acpi_companion(&pdev->dev))
476 return 0;
477
478 ret = emac_clks_get(pdev, adpt);
479 if (ret)
480 return ret;
481
482 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);
483 if (ret)
484 return ret;
485
486 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);
487 if (ret)
488 return ret;
489
490 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);
491 if (ret)
492 return ret;
493
494 return clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);
495}
496
497
498static int emac_clks_phase2_init(struct platform_device *pdev,
499 struct emac_adapter *adpt)
500{
501 int ret;
502
503 if (has_acpi_companion(&pdev->dev))
504 return 0;
505
506 ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);
507 if (ret)
508 return ret;
509
510 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);
511 if (ret)
512 return ret;
513
514 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);
515 if (ret)
516 return ret;
517
518 ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);
519 if (ret)
520 return ret;
521
522 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);
523 if (ret)
524 return ret;
525
526 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);
527 if (ret)
528 return ret;
529
530 return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);
531}
532
533static void emac_clks_teardown(struct emac_adapter *adpt)
534{
535
536 unsigned int i;
537
538 for (i = 0; i < EMAC_CLK_CNT; i++)
539 clk_disable_unprepare(adpt->clk[i]);
540}
541
542
543static int emac_probe_resources(struct platform_device *pdev,
544 struct emac_adapter *adpt)
545{
546 struct net_device *netdev = adpt->netdev;
547 char maddr[ETH_ALEN];
548 int ret = 0;
549
550
551 if (device_get_mac_address(&pdev->dev, maddr, ETH_ALEN))
552 ether_addr_copy(netdev->dev_addr, maddr);
553 else
554 eth_hw_addr_random(netdev);
555
556
557 ret = platform_get_irq(pdev, 0);
558 if (ret < 0)
559 return ret;
560 adpt->irq.irq = ret;
561
562
563 adpt->base = devm_platform_ioremap_resource(pdev, 0);
564 if (IS_ERR(adpt->base))
565 return PTR_ERR(adpt->base);
566
567
568 adpt->csr = devm_platform_ioremap_resource(pdev, 1);
569 if (IS_ERR(adpt->csr))
570 return PTR_ERR(adpt->csr);
571
572 netdev->base_addr = (unsigned long)adpt->base;
573
574 return 0;
575}
576
577static const struct of_device_id emac_dt_match[] = {
578 {
579 .compatible = "qcom,fsm9900-emac",
580 },
581 {}
582};
583MODULE_DEVICE_TABLE(of, emac_dt_match);
584
585#if IS_ENABLED(CONFIG_ACPI)
586static const struct acpi_device_id emac_acpi_match[] = {
587 {
588 .id = "QCOM8070",
589 },
590 {}
591};
592MODULE_DEVICE_TABLE(acpi, emac_acpi_match);
593#endif
594
595static int emac_probe(struct platform_device *pdev)
596{
597 struct net_device *netdev;
598 struct emac_adapter *adpt;
599 struct emac_sgmii *phy;
600 u16 devid, revid;
601 u32 reg;
602 int ret;
603
604
605
606
607
608 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(46));
609 if (ret) {
610 dev_err(&pdev->dev, "could not set DMA mask\n");
611 return ret;
612 }
613
614 netdev = alloc_etherdev(sizeof(struct emac_adapter));
615 if (!netdev)
616 return -ENOMEM;
617
618 dev_set_drvdata(&pdev->dev, netdev);
619 SET_NETDEV_DEV(netdev, &pdev->dev);
620 emac_set_ethtool_ops(netdev);
621
622 adpt = netdev_priv(netdev);
623 adpt->netdev = netdev;
624 adpt->msg_enable = EMAC_MSG_DEFAULT;
625
626 phy = &adpt->phy;
627 atomic_set(&phy->decode_error_count, 0);
628
629 mutex_init(&adpt->reset_lock);
630 spin_lock_init(&adpt->stats.lock);
631
632 adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK;
633
634 ret = emac_probe_resources(pdev, adpt);
635 if (ret)
636 goto err_undo_netdev;
637
638
639 ret = emac_clks_phase1_init(pdev, adpt);
640 if (ret) {
641 dev_err(&pdev->dev, "could not initialize clocks\n");
642 goto err_undo_netdev;
643 }
644
645 netdev->watchdog_timeo = EMAC_WATCHDOG_TIME;
646 netdev->irq = adpt->irq.irq;
647
648 netdev->netdev_ops = &emac_netdev_ops;
649
650 emac_init_adapter(adpt);
651
652
653 ret = emac_phy_config(pdev, adpt);
654 if (ret)
655 goto err_undo_clocks;
656
657
658 ret = emac_sgmii_config(pdev, adpt);
659 if (ret)
660 goto err_undo_mdiobus;
661
662
663 ret = emac_clks_phase2_init(pdev, adpt);
664 if (ret) {
665 dev_err(&pdev->dev, "could not initialize clocks\n");
666 goto err_undo_mdiobus;
667 }
668
669
670 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
671 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
672 NETIF_F_HW_VLAN_CTAG_TX;
673 netdev->hw_features = netdev->features;
674
675 netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM |
676 NETIF_F_TSO | NETIF_F_TSO6;
677
678
679 netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE -
680 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
681 netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE -
682 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
683
684 INIT_WORK(&adpt->work_thread, emac_work_thread);
685
686
687 emac_mac_rx_tx_ring_init_all(pdev, adpt);
688
689 netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx,
690 NAPI_POLL_WEIGHT);
691
692 ret = register_netdev(netdev);
693 if (ret) {
694 dev_err(&pdev->dev, "could not register net device\n");
695 goto err_undo_napi;
696 }
697
698 reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
699 devid = (reg & DEV_ID_NUM_BMSK) >> DEV_ID_NUM_SHFT;
700 revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT;
701 reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
702
703 netif_info(adpt, probe, netdev,
704 "hardware id %d.%d, hardware version %d.%d.%d\n",
705 devid, revid,
706 (reg & MAJOR_BMSK) >> MAJOR_SHFT,
707 (reg & MINOR_BMSK) >> MINOR_SHFT,
708 (reg & STEP_BMSK) >> STEP_SHFT);
709
710 return 0;
711
712err_undo_napi:
713 netif_napi_del(&adpt->rx_q.napi);
714err_undo_mdiobus:
715 put_device(&adpt->phydev->mdio.dev);
716 mdiobus_unregister(adpt->mii_bus);
717err_undo_clocks:
718 emac_clks_teardown(adpt);
719err_undo_netdev:
720 free_netdev(netdev);
721
722 return ret;
723}
724
725static int emac_remove(struct platform_device *pdev)
726{
727 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
728 struct emac_adapter *adpt = netdev_priv(netdev);
729
730 unregister_netdev(netdev);
731 netif_napi_del(&adpt->rx_q.napi);
732
733 emac_clks_teardown(adpt);
734
735 put_device(&adpt->phydev->mdio.dev);
736 mdiobus_unregister(adpt->mii_bus);
737 free_netdev(netdev);
738
739 if (adpt->phy.digital)
740 iounmap(adpt->phy.digital);
741 iounmap(adpt->phy.base);
742
743 return 0;
744}
745
746static void emac_shutdown(struct platform_device *pdev)
747{
748 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
749 struct emac_adapter *adpt = netdev_priv(netdev);
750
751 if (netdev->flags & IFF_UP) {
752
753 emac_sgmii_close(adpt);
754
755
756 emac_mac_reset(adpt);
757 }
758}
759
760static struct platform_driver emac_platform_driver = {
761 .probe = emac_probe,
762 .remove = emac_remove,
763 .driver = {
764 .name = "qcom-emac",
765 .of_match_table = emac_dt_match,
766 .acpi_match_table = ACPI_PTR(emac_acpi_match),
767 },
768 .shutdown = emac_shutdown,
769};
770
771module_platform_driver(emac_platform_driver);
772
773MODULE_LICENSE("GPL v2");
774MODULE_ALIAS("platform:qcom-emac");
775