1
2
3
4
5
6
7
8
9
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/pci.h>
15#include <linux/workqueue.h>
16#include <linux/pm_runtime.h>
17#include <linux/platform_device.h>
18#include <linux/gpio/consumer.h>
19#include <linux/gpio/machine.h>
20#include <linux/acpi.h>
21#include <linux/delay.h>
22
23#define PCI_DEVICE_ID_INTEL_BYT 0x0f37
24#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
25#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
26#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
27#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
28#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
29#define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
30#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
31#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
32#define PCI_DEVICE_ID_INTEL_CMLLP 0x02ee
33#define PCI_DEVICE_ID_INTEL_CMLH 0x06ee
34#define PCI_DEVICE_ID_INTEL_GLK 0x31aa
35#define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
36#define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
37#define PCI_DEVICE_ID_INTEL_ICLLP 0x34ee
38#define PCI_DEVICE_ID_INTEL_EHLLP 0x4b7e
39#define PCI_DEVICE_ID_INTEL_TGPLP 0xa0ee
40
41#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
42#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
43#define PCI_INTEL_BXT_STATE_D0 0
44#define PCI_INTEL_BXT_STATE_D3 3
45
46#define GP_RWBAR 1
47#define GP_RWREG1 0xa0
48#define GP_RWREG1_ULPI_REFCLK_DISABLE (1 << 17)
49
50
51
52
53
54
55
56
57
58struct dwc3_pci {
59 struct platform_device *dwc3;
60 struct pci_dev *pci;
61
62 guid_t guid;
63
64 unsigned int has_dsm_for_pm:1;
65 struct work_struct wakeup_work;
66};
67
68static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
69static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
70
71static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
72 { "reset-gpios", &reset_gpios, 1 },
73 { "cs-gpios", &cs_gpios, 1 },
74 { },
75};
76
77static struct gpiod_lookup_table platform_bytcr_gpios = {
78 .dev_id = "0000:00:16.0",
79 .table = {
80 GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH),
81 GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH),
82 {}
83 },
84};
85
86static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci)
87{
88 void __iomem *reg;
89 u32 value;
90
91 reg = pcim_iomap(pci, GP_RWBAR, 0);
92 if (!reg)
93 return -ENOMEM;
94
95 value = readl(reg + GP_RWREG1);
96 if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
97 goto unmap;
98
99 value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
100 writel(value, reg + GP_RWREG1);
101
102 msleep(100);
103unmap:
104 pcim_iounmap(pci, reg);
105 return 0;
106}
107
108static const struct property_entry dwc3_pci_intel_properties[] = {
109 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
110 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
111 {}
112};
113
114static const struct property_entry dwc3_pci_mrfld_properties[] = {
115 PROPERTY_ENTRY_STRING("dr_mode", "otg"),
116 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
117 {}
118};
119
120static const struct property_entry dwc3_pci_amd_properties[] = {
121 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
122 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
123 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
124 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
125 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
126 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
127 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
128 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
129 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
130 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
131 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
132
133 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
134 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
135 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
136 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
137 {}
138};
139
140static int dwc3_pci_quirks(struct dwc3_pci *dwc)
141{
142 struct pci_dev *pdev = dwc->pci;
143
144 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
145 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
146 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
147 guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
148 dwc->has_dsm_for_pm = true;
149 }
150
151 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
152 struct gpio_desc *gpio;
153 int ret;
154
155
156 ret = dwc3_byt_enable_ulpi_refclock(pdev);
157 if (ret)
158 return ret;
159
160 ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
161 acpi_dwc3_byt_gpios);
162 if (ret)
163 dev_dbg(&pdev->dev, "failed to add mapping table\n");
164
165
166
167
168
169
170 gpiod_add_lookup_table(&platform_bytcr_gpios);
171
172
173
174
175
176
177 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
178 if (IS_ERR(gpio))
179 return PTR_ERR(gpio);
180
181 gpiod_set_value_cansleep(gpio, 1);
182 gpiod_put(gpio);
183
184 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
185 if (IS_ERR(gpio))
186 return PTR_ERR(gpio);
187
188 if (gpio) {
189 gpiod_set_value_cansleep(gpio, 1);
190 gpiod_put(gpio);
191 usleep_range(10000, 11000);
192 }
193 }
194 }
195
196 return 0;
197}
198
199#ifdef CONFIG_PM
200static void dwc3_pci_resume_work(struct work_struct *work)
201{
202 struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
203 struct platform_device *dwc3 = dwc->dwc3;
204 int ret;
205
206 ret = pm_runtime_get_sync(&dwc3->dev);
207 if (ret)
208 return;
209
210 pm_runtime_mark_last_busy(&dwc3->dev);
211 pm_runtime_put_sync_autosuspend(&dwc3->dev);
212}
213#endif
214
215static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
216{
217 struct property_entry *p = (struct property_entry *)id->driver_data;
218 struct dwc3_pci *dwc;
219 struct resource res[2];
220 int ret;
221 struct device *dev = &pci->dev;
222
223 ret = pcim_enable_device(pci);
224 if (ret) {
225 dev_err(dev, "failed to enable pci device\n");
226 return -ENODEV;
227 }
228
229 pci_set_master(pci);
230
231 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
232 if (!dwc)
233 return -ENOMEM;
234
235 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
236 if (!dwc->dwc3)
237 return -ENOMEM;
238
239 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
240
241 res[0].start = pci_resource_start(pci, 0);
242 res[0].end = pci_resource_end(pci, 0);
243 res[0].name = "dwc_usb3";
244 res[0].flags = IORESOURCE_MEM;
245
246 res[1].start = pci->irq;
247 res[1].name = "dwc_usb3";
248 res[1].flags = IORESOURCE_IRQ;
249
250 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
251 if (ret) {
252 dev_err(dev, "couldn't add resources to dwc3 device\n");
253 goto err;
254 }
255
256 dwc->pci = pci;
257 dwc->dwc3->dev.parent = dev;
258 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
259
260 ret = platform_device_add_properties(dwc->dwc3, p);
261 if (ret < 0)
262 goto err;
263
264 ret = dwc3_pci_quirks(dwc);
265 if (ret)
266 goto err;
267
268 ret = platform_device_add(dwc->dwc3);
269 if (ret) {
270 dev_err(dev, "failed to register dwc3 device\n");
271 goto err;
272 }
273
274 device_init_wakeup(dev, true);
275 pci_set_drvdata(pci, dwc);
276 pm_runtime_put(dev);
277#ifdef CONFIG_PM
278 INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
279#endif
280
281 return 0;
282err:
283 platform_device_put(dwc->dwc3);
284 return ret;
285}
286
287static void dwc3_pci_remove(struct pci_dev *pci)
288{
289 struct dwc3_pci *dwc = pci_get_drvdata(pci);
290 struct pci_dev *pdev = dwc->pci;
291
292 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
293 gpiod_remove_lookup_table(&platform_bytcr_gpios);
294#ifdef CONFIG_PM
295 cancel_work_sync(&dwc->wakeup_work);
296#endif
297 device_init_wakeup(&pci->dev, false);
298 pm_runtime_get(&pci->dev);
299 platform_device_unregister(dwc->dwc3);
300}
301
302static const struct pci_device_id dwc3_pci_id_table[] = {
303 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW),
304 (kernel_ulong_t) &dwc3_pci_intel_properties },
305
306 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT),
307 (kernel_ulong_t) &dwc3_pci_intel_properties, },
308
309 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD),
310 (kernel_ulong_t) &dwc3_pci_mrfld_properties, },
311
312 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLLP),
313 (kernel_ulong_t) &dwc3_pci_intel_properties, },
314
315 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH),
316 (kernel_ulong_t) &dwc3_pci_intel_properties, },
317
318 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP),
319 (kernel_ulong_t) &dwc3_pci_intel_properties, },
320
321 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH),
322 (kernel_ulong_t) &dwc3_pci_intel_properties, },
323
324 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT),
325 (kernel_ulong_t) &dwc3_pci_intel_properties, },
326
327 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M),
328 (kernel_ulong_t) &dwc3_pci_intel_properties, },
329
330 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL),
331 (kernel_ulong_t) &dwc3_pci_intel_properties, },
332
333 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP),
334 (kernel_ulong_t) &dwc3_pci_intel_properties, },
335
336 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK),
337 (kernel_ulong_t) &dwc3_pci_intel_properties, },
338
339 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP),
340 (kernel_ulong_t) &dwc3_pci_intel_properties, },
341
342 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH),
343 (kernel_ulong_t) &dwc3_pci_intel_properties, },
344
345 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP),
346 (kernel_ulong_t) &dwc3_pci_intel_properties, },
347
348 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_EHLLP),
349 (kernel_ulong_t) &dwc3_pci_intel_properties, },
350
351 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGPLP),
352 (kernel_ulong_t) &dwc3_pci_intel_properties, },
353
354 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB),
355 (kernel_ulong_t) &dwc3_pci_amd_properties, },
356 { }
357};
358MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
359
360#if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
361static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
362{
363 union acpi_object *obj;
364 union acpi_object tmp;
365 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
366
367 if (!dwc->has_dsm_for_pm)
368 return 0;
369
370 tmp.type = ACPI_TYPE_INTEGER;
371 tmp.integer.value = param;
372
373 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
374 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
375 if (!obj) {
376 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
377 return -EIO;
378 }
379
380 ACPI_FREE(obj);
381
382 return 0;
383}
384#endif
385
386#ifdef CONFIG_PM
387static int dwc3_pci_runtime_suspend(struct device *dev)
388{
389 struct dwc3_pci *dwc = dev_get_drvdata(dev);
390
391 if (device_can_wakeup(dev))
392 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
393
394 return -EBUSY;
395}
396
397static int dwc3_pci_runtime_resume(struct device *dev)
398{
399 struct dwc3_pci *dwc = dev_get_drvdata(dev);
400 int ret;
401
402 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
403 if (ret)
404 return ret;
405
406 queue_work(pm_wq, &dwc->wakeup_work);
407
408 return 0;
409}
410#endif
411
412#ifdef CONFIG_PM_SLEEP
413static int dwc3_pci_suspend(struct device *dev)
414{
415 struct dwc3_pci *dwc = dev_get_drvdata(dev);
416
417 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
418}
419
420static int dwc3_pci_resume(struct device *dev)
421{
422 struct dwc3_pci *dwc = dev_get_drvdata(dev);
423
424 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
425}
426#endif
427
428static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
429 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
430 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
431 NULL)
432};
433
434static struct pci_driver dwc3_pci_driver = {
435 .name = "dwc3-pci",
436 .id_table = dwc3_pci_id_table,
437 .probe = dwc3_pci_probe,
438 .remove = dwc3_pci_remove,
439 .driver = {
440 .pm = &dwc3_pci_dev_pm_ops,
441 }
442};
443
444MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
445MODULE_LICENSE("GPL v2");
446MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
447
448module_pci_driver(dwc3_pci_driver);
449
