linux/drivers/usb/early/ehci-dbgp.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Standalone EHCI usb debug driver
   4 *
   5 * Originally written by:
   6 *  Eric W. Biederman" <ebiederm@xmission.com> and
   7 *  Yinghai Lu <yhlu.kernel@gmail.com>
   8 *
   9 * Changes for early/late printk and HW errata:
  10 *  Jason Wessel <jason.wessel@windriver.com>
  11 *  Copyright (C) 2009 Wind River Systems, Inc.
  12 *
  13 */
  14
  15#include <linux/console.h>
  16#include <linux/errno.h>
  17#include <linux/init.h>
  18#include <linux/pci_regs.h>
  19#include <linux/pci_ids.h>
  20#include <linux/usb/ch9.h>
  21#include <linux/usb/ehci_def.h>
  22#include <linux/delay.h>
  23#include <linux/serial_core.h>
  24#include <linux/kgdb.h>
  25#include <linux/kthread.h>
  26#include <asm/io.h>
  27#include <asm/pci-direct.h>
  28#include <asm/fixmap.h>
  29
  30/* The code here is intended to talk directly to the EHCI debug port
  31 * and does not require that you have any kind of USB host controller
  32 * drivers or USB device drivers compiled into the kernel.
  33 *
  34 * If you make a change to anything in here, the following test cases
  35 * need to pass where a USB debug device works in the following
  36 * configurations.
  37 *
  38 * 1. boot args:  earlyprintk=dbgp
  39 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  40 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  41 * 2. boot args: earlyprintk=dbgp,keep
  42 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  43 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  44 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
  45 *     o kernel has CONFIG_USB_EHCI_HCD=y and
  46 *       CONFIG_USB_SERIAL_DEBUG=y
  47 * 4. boot args: earlyprintk=vga,dbgp
  48 *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  49 *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
  50 *
  51 * For the 4th configuration you can turn on or off the DBGP_DEBUG
  52 * such that you can debug the dbgp device's driver code.
  53 */
  54
  55static int dbgp_phys_port = 1;
  56
  57static struct ehci_caps __iomem *ehci_caps;
  58static struct ehci_regs __iomem *ehci_regs;
  59static struct ehci_dbg_port __iomem *ehci_debug;
  60static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
  61static unsigned int dbgp_endpoint_out;
  62static unsigned int dbgp_endpoint_in;
  63
  64struct ehci_dev {
  65        u32 bus;
  66        u32 slot;
  67        u32 func;
  68};
  69
  70static struct ehci_dev ehci_dev;
  71
  72#define USB_DEBUG_DEVNUM 127
  73
  74#ifdef DBGP_DEBUG
  75#define dbgp_printk printk
  76static void dbgp_ehci_status(char *str)
  77{
  78        if (!ehci_debug)
  79                return;
  80        dbgp_printk("dbgp: %s\n", str);
  81        dbgp_printk("  Debug control: %08x", readl(&ehci_debug->control));
  82        dbgp_printk("  ehci cmd     : %08x", readl(&ehci_regs->command));
  83        dbgp_printk("  ehci conf flg: %08x\n",
  84                    readl(&ehci_regs->configured_flag));
  85        dbgp_printk("  ehci status  : %08x", readl(&ehci_regs->status));
  86        dbgp_printk("  ehci portsc  : %08x\n",
  87                    readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
  88}
  89#else
  90static inline void dbgp_ehci_status(char *str) { }
  91static inline void dbgp_printk(const char *fmt, ...) { }
  92#endif
  93
  94static inline u32 dbgp_len_update(u32 x, u32 len)
  95{
  96        return (x & ~0x0f) | (len & 0x0f);
  97}
  98
  99#ifdef CONFIG_KGDB
 100static struct kgdb_io kgdbdbgp_io_ops;
 101#define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
 102#else
 103#define dbgp_kgdb_mode (0)
 104#endif
 105
 106/* Local version of HC_LENGTH macro as ehci struct is not available here */
 107#define EARLY_HC_LENGTH(p)      (0x00ff & (p)) /* bits 7 : 0 */
 108
 109/*
 110 * USB Packet IDs (PIDs)
 111 */
 112
 113/* token */
 114#define USB_PID_OUT             0xe1
 115#define USB_PID_IN              0x69
 116#define USB_PID_SOF             0xa5
 117#define USB_PID_SETUP           0x2d
 118/* handshake */
 119#define USB_PID_ACK             0xd2
 120#define USB_PID_NAK             0x5a
 121#define USB_PID_STALL           0x1e
 122#define USB_PID_NYET            0x96
 123/* data */
 124#define USB_PID_DATA0           0xc3
 125#define USB_PID_DATA1           0x4b
 126#define USB_PID_DATA2           0x87
 127#define USB_PID_MDATA           0x0f
 128/* Special */
 129#define USB_PID_PREAMBLE        0x3c
 130#define USB_PID_ERR             0x3c
 131#define USB_PID_SPLIT           0x78
 132#define USB_PID_PING            0xb4
 133#define USB_PID_UNDEF_0         0xf0
 134
 135#define USB_PID_DATA_TOGGLE     0x88
 136#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
 137
 138#define PCI_CAP_ID_EHCI_DEBUG   0xa
 139
 140#define HUB_ROOT_RESET_TIME     50      /* times are in msec */
 141#define HUB_SHORT_RESET_TIME    10
 142#define HUB_LONG_RESET_TIME     200
 143#define HUB_RESET_TIMEOUT       500
 144
 145#define DBGP_MAX_PACKET         8
 146#define DBGP_TIMEOUT            (250 * 1000)
 147#define DBGP_LOOPS              1000
 148
 149static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
 150{
 151        static int data0 = USB_PID_DATA1;
 152        data0 ^= USB_PID_DATA_TOGGLE;
 153        return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
 154}
 155
 156static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
 157{
 158        return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
 159}
 160
 161static int dbgp_wait_until_complete(void)
 162{
 163        u32 ctrl;
 164        int loop = DBGP_TIMEOUT;
 165
 166        do {
 167                ctrl = readl(&ehci_debug->control);
 168                /* Stop when the transaction is finished */
 169                if (ctrl & DBGP_DONE)
 170                        break;
 171                udelay(1);
 172        } while (--loop > 0);
 173
 174        if (!loop)
 175                return -DBGP_TIMEOUT;
 176
 177        /*
 178         * Now that we have observed the completed transaction,
 179         * clear the done bit.
 180         */
 181        writel(ctrl | DBGP_DONE, &ehci_debug->control);
 182        return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
 183}
 184
 185static inline void dbgp_mdelay(int ms)
 186{
 187        int i;
 188
 189        while (ms--) {
 190                for (i = 0; i < 1000; i++)
 191                        outb(0x1, 0x80);
 192        }
 193}
 194
 195static void dbgp_breath(void)
 196{
 197        /* Sleep to give the debug port a chance to breathe */
 198}
 199
 200static int dbgp_wait_until_done(unsigned ctrl, int loop)
 201{
 202        u32 pids, lpid;
 203        int ret;
 204
 205retry:
 206        writel(ctrl | DBGP_GO, &ehci_debug->control);
 207        ret = dbgp_wait_until_complete();
 208        pids = readl(&ehci_debug->pids);
 209        lpid = DBGP_PID_GET(pids);
 210
 211        if (ret < 0) {
 212                /* A -DBGP_TIMEOUT failure here means the device has
 213                 * failed, perhaps because it was unplugged, in which
 214                 * case we do not want to hang the system so the dbgp
 215                 * will be marked as unsafe to use.  EHCI reset is the
 216                 * only way to recover if you unplug the dbgp device.
 217                 */
 218                if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
 219                        dbgp_not_safe = 1;
 220                if (ret == -DBGP_ERR_BAD && --loop > 0)
 221                        goto retry;
 222                return ret;
 223        }
 224
 225        /*
 226         * If the port is getting full or it has dropped data
 227         * start pacing ourselves, not necessary but it's friendly.
 228         */
 229        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
 230                dbgp_breath();
 231
 232        /* If I get a NACK reissue the transmission */
 233        if (lpid == USB_PID_NAK) {
 234                if (--loop > 0)
 235                        goto retry;
 236        }
 237
 238        return ret;
 239}
 240
 241static inline void dbgp_set_data(const void *buf, int size)
 242{
 243        const unsigned char *bytes = buf;
 244        u32 lo, hi;
 245        int i;
 246
 247        lo = hi = 0;
 248        for (i = 0; i < 4 && i < size; i++)
 249                lo |= bytes[i] << (8*i);
 250        for (; i < 8 && i < size; i++)
 251                hi |= bytes[i] << (8*(i - 4));
 252        writel(lo, &ehci_debug->data03);
 253        writel(hi, &ehci_debug->data47);
 254}
 255
 256static inline void dbgp_get_data(void *buf, int size)
 257{
 258        unsigned char *bytes = buf;
 259        u32 lo, hi;
 260        int i;
 261
 262        lo = readl(&ehci_debug->data03);
 263        hi = readl(&ehci_debug->data47);
 264        for (i = 0; i < 4 && i < size; i++)
 265                bytes[i] = (lo >> (8*i)) & 0xff;
 266        for (; i < 8 && i < size; i++)
 267                bytes[i] = (hi >> (8*(i - 4))) & 0xff;
 268}
 269
 270static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
 271                         const char *bytes, int size)
 272{
 273        int ret;
 274        u32 addr;
 275        u32 pids, ctrl;
 276
 277        if (size > DBGP_MAX_PACKET)
 278                return -1;
 279
 280        addr = DBGP_EPADDR(devnum, endpoint);
 281
 282        pids = readl(&ehci_debug->pids);
 283        pids = dbgp_pid_write_update(pids, USB_PID_OUT);
 284
 285        ctrl = readl(&ehci_debug->control);
 286        ctrl = dbgp_len_update(ctrl, size);
 287        ctrl |= DBGP_OUT;
 288        ctrl |= DBGP_GO;
 289
 290        dbgp_set_data(bytes, size);
 291        writel(addr, &ehci_debug->address);
 292        writel(pids, &ehci_debug->pids);
 293        ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
 294
 295        return ret;
 296}
 297
 298static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
 299                          int size, int loops)
 300{
 301        u32 pids, addr, ctrl;
 302        int ret;
 303
 304        if (size > DBGP_MAX_PACKET)
 305                return -1;
 306
 307        addr = DBGP_EPADDR(devnum, endpoint);
 308
 309        pids = readl(&ehci_debug->pids);
 310        pids = dbgp_pid_read_update(pids, USB_PID_IN);
 311
 312        ctrl = readl(&ehci_debug->control);
 313        ctrl = dbgp_len_update(ctrl, size);
 314        ctrl &= ~DBGP_OUT;
 315        ctrl |= DBGP_GO;
 316
 317        writel(addr, &ehci_debug->address);
 318        writel(pids, &ehci_debug->pids);
 319        ret = dbgp_wait_until_done(ctrl, loops);
 320        if (ret < 0)
 321                return ret;
 322
 323        if (size > ret)
 324                size = ret;
 325        dbgp_get_data(data, size);
 326        return ret;
 327}
 328
 329static int dbgp_control_msg(unsigned devnum, int requesttype,
 330        int request, int value, int index, void *data, int size)
 331{
 332        u32 pids, addr, ctrl;
 333        struct usb_ctrlrequest req;
 334        int read;
 335        int ret;
 336
 337        read = (requesttype & USB_DIR_IN) != 0;
 338        if (size > (read ? DBGP_MAX_PACKET : 0))
 339                return -1;
 340
 341        /* Compute the control message */
 342        req.bRequestType = requesttype;
 343        req.bRequest = request;
 344        req.wValue = cpu_to_le16(value);
 345        req.wIndex = cpu_to_le16(index);
 346        req.wLength = cpu_to_le16(size);
 347
 348        pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
 349        addr = DBGP_EPADDR(devnum, 0);
 350
 351        ctrl = readl(&ehci_debug->control);
 352        ctrl = dbgp_len_update(ctrl, sizeof(req));
 353        ctrl |= DBGP_OUT;
 354        ctrl |= DBGP_GO;
 355
 356        /* Send the setup message */
 357        dbgp_set_data(&req, sizeof(req));
 358        writel(addr, &ehci_debug->address);
 359        writel(pids, &ehci_debug->pids);
 360        ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
 361        if (ret < 0)
 362                return ret;
 363
 364        /* Read the result */
 365        return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
 366}
 367
 368/* Find a PCI capability */
 369static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
 370{
 371        u8 pos;
 372        int bytes;
 373
 374        if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
 375                PCI_STATUS_CAP_LIST))
 376                return 0;
 377
 378        pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
 379        for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
 380                u8 id;
 381
 382                pos &= ~3;
 383                id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
 384                if (id == 0xff)
 385                        break;
 386                if (id == cap)
 387                        return pos;
 388
 389                pos = read_pci_config_byte(num, slot, func,
 390                                                 pos+PCI_CAP_LIST_NEXT);
 391        }
 392        return 0;
 393}
 394
 395static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
 396{
 397        u32 class;
 398
 399        class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
 400        if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
 401                return 0;
 402
 403        return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
 404}
 405
 406static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
 407{
 408        u32 bus, slot, func;
 409
 410        for (bus = 0; bus < 256; bus++) {
 411                for (slot = 0; slot < 32; slot++) {
 412                        for (func = 0; func < 8; func++) {
 413                                unsigned cap;
 414
 415                                cap = __find_dbgp(bus, slot, func);
 416
 417                                if (!cap)
 418                                        continue;
 419                                if (ehci_num-- != 0)
 420                                        continue;
 421                                *rbus = bus;
 422                                *rslot = slot;
 423                                *rfunc = func;
 424                                return cap;
 425                        }
 426                }
 427        }
 428        return 0;
 429}
 430
 431static int dbgp_ehci_startup(void)
 432{
 433        u32 ctrl, cmd, status;
 434        int loop;
 435
 436        /* Claim ownership, but do not enable yet */
 437        ctrl = readl(&ehci_debug->control);
 438        ctrl |= DBGP_OWNER;
 439        ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
 440        writel(ctrl, &ehci_debug->control);
 441        udelay(1);
 442
 443        dbgp_ehci_status("EHCI startup");
 444        /* Start the ehci running */
 445        cmd = readl(&ehci_regs->command);
 446        cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
 447        cmd |= CMD_RUN;
 448        writel(cmd, &ehci_regs->command);
 449
 450        /* Ensure everything is routed to the EHCI */
 451        writel(FLAG_CF, &ehci_regs->configured_flag);
 452
 453        /* Wait until the controller is no longer halted */
 454        loop = 1000;
 455        do {
 456                status = readl(&ehci_regs->status);
 457                if (!(status & STS_HALT))
 458                        break;
 459                udelay(1);
 460        } while (--loop > 0);
 461
 462        if (!loop) {
 463                dbgp_printk("ehci can not be started\n");
 464                return -ENODEV;
 465        }
 466        dbgp_printk("ehci started\n");
 467        return 0;
 468}
 469
 470static int dbgp_ehci_controller_reset(void)
 471{
 472        int loop = 250 * 1000;
 473        u32 cmd;
 474
 475        /* Reset the EHCI controller */
 476        cmd = readl(&ehci_regs->command);
 477        cmd |= CMD_RESET;
 478        writel(cmd, &ehci_regs->command);
 479        do {
 480                cmd = readl(&ehci_regs->command);
 481        } while ((cmd & CMD_RESET) && (--loop > 0));
 482
 483        if (!loop) {
 484                dbgp_printk("can not reset ehci\n");
 485                return -1;
 486        }
 487        dbgp_ehci_status("ehci reset done");
 488        return 0;
 489}
 490static int ehci_wait_for_port(int port);
 491/* Return 0 on success
 492 * Return -ENODEV for any general failure
 493 * Return -EIO if wait for port fails
 494 */
 495static int _dbgp_external_startup(void)
 496{
 497        int devnum;
 498        struct usb_debug_descriptor dbgp_desc;
 499        int ret;
 500        u32 ctrl, portsc, cmd;
 501        int dbg_port = dbgp_phys_port;
 502        int tries = 3;
 503        int reset_port_tries = 1;
 504        int try_hard_once = 1;
 505
 506try_port_reset_again:
 507        ret = dbgp_ehci_startup();
 508        if (ret)
 509                return ret;
 510
 511        /* Wait for a device to show up in the debug port */
 512        ret = ehci_wait_for_port(dbg_port);
 513        if (ret < 0) {
 514                portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 515                if (!(portsc & PORT_CONNECT) && try_hard_once) {
 516                        /* Last ditch effort to try to force enable
 517                         * the debug device by using the packet test
 518                         * ehci command to try and wake it up. */
 519                        try_hard_once = 0;
 520                        cmd = readl(&ehci_regs->command);
 521                        cmd &= ~CMD_RUN;
 522                        writel(cmd, &ehci_regs->command);
 523                        portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 524                        portsc |= PORT_TEST_PKT;
 525                        writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
 526                        dbgp_ehci_status("Trying to force debug port online");
 527                        mdelay(50);
 528                        dbgp_ehci_controller_reset();
 529                        goto try_port_reset_again;
 530                } else if (reset_port_tries--) {
 531                        goto try_port_reset_again;
 532                }
 533                dbgp_printk("No device found in debug port\n");
 534                return -EIO;
 535        }
 536        dbgp_ehci_status("wait for port done");
 537
 538        /* Enable the debug port */
 539        ctrl = readl(&ehci_debug->control);
 540        ctrl |= DBGP_CLAIM;
 541        writel(ctrl, &ehci_debug->control);
 542        ctrl = readl(&ehci_debug->control);
 543        if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
 544                dbgp_printk("No device in debug port\n");
 545                writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
 546                return -ENODEV;
 547        }
 548        dbgp_ehci_status("debug ported enabled");
 549
 550        /* Completely transfer the debug device to the debug controller */
 551        portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
 552        portsc &= ~PORT_PE;
 553        writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
 554
 555        dbgp_mdelay(100);
 556
 557try_again:
 558        /* Find the debug device and make it device number 127 */
 559        for (devnum = 0; devnum <= 127; devnum++) {
 560                ret = dbgp_control_msg(devnum,
 561                        USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 562                        USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
 563                        &dbgp_desc, sizeof(dbgp_desc));
 564                if (ret > 0)
 565                        break;
 566        }
 567        if (devnum > 127) {
 568                dbgp_printk("Could not find attached debug device\n");
 569                goto err;
 570        }
 571        dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
 572        dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
 573
 574        /* Move the device to 127 if it isn't already there */
 575        if (devnum != USB_DEBUG_DEVNUM) {
 576                ret = dbgp_control_msg(devnum,
 577                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 578                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
 579                if (ret < 0) {
 580                        dbgp_printk("Could not move attached device to %d\n",
 581                                USB_DEBUG_DEVNUM);
 582                        goto err;
 583                }
 584                dbgp_printk("debug device renamed to 127\n");
 585        }
 586
 587        /* Enable the debug interface */
 588        ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
 589                USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 590                USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
 591        if (ret < 0) {
 592                dbgp_printk(" Could not enable the debug device\n");
 593                goto err;
 594        }
 595        dbgp_printk("debug interface enabled\n");
 596        /* Perform a small write to get the even/odd data state in sync
 597         */
 598        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
 599        if (ret < 0) {
 600                dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
 601                goto err;
 602        }
 603        dbgp_printk("small write done\n");
 604        dbgp_not_safe = 0;
 605
 606        return 0;
 607err:
 608        if (tries--)
 609                goto try_again;
 610        return -ENODEV;
 611}
 612
 613static int ehci_reset_port(int port)
 614{
 615        u32 portsc;
 616        u32 delay_time, delay;
 617        int loop;
 618
 619        dbgp_ehci_status("reset port");
 620        /* Reset the usb debug port */
 621        portsc = readl(&ehci_regs->port_status[port - 1]);
 622        portsc &= ~PORT_PE;
 623        portsc |= PORT_RESET;
 624        writel(portsc, &ehci_regs->port_status[port - 1]);
 625
 626        delay = HUB_ROOT_RESET_TIME;
 627        for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
 628             delay_time += delay) {
 629                dbgp_mdelay(delay);
 630                portsc = readl(&ehci_regs->port_status[port - 1]);
 631                if (!(portsc & PORT_RESET))
 632                        break;
 633        }
 634        if (portsc & PORT_RESET) {
 635                /* force reset to complete */
 636                loop = 100 * 1000;
 637                writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
 638                        &ehci_regs->port_status[port - 1]);
 639                do {
 640                        udelay(1);
 641                        portsc = readl(&ehci_regs->port_status[port-1]);
 642                } while ((portsc & PORT_RESET) && (--loop > 0));
 643        }
 644
 645        /* Device went away? */
 646        if (!(portsc & PORT_CONNECT))
 647                return -ENOTCONN;
 648
 649        /* bomb out completely if something weird happened */
 650        if ((portsc & PORT_CSC))
 651                return -EINVAL;
 652
 653        /* If we've finished resetting, then break out of the loop */
 654        if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
 655                return 0;
 656        return -EBUSY;
 657}
 658
 659static int ehci_wait_for_port(int port)
 660{
 661        u32 status;
 662        int ret, reps;
 663
 664        for (reps = 0; reps < 300; reps++) {
 665                status = readl(&ehci_regs->status);
 666                if (status & STS_PCD)
 667                        break;
 668                dbgp_mdelay(1);
 669        }
 670        ret = ehci_reset_port(port);
 671        if (ret == 0)
 672                return 0;
 673        return -ENOTCONN;
 674}
 675
 676typedef void (*set_debug_port_t)(int port);
 677
 678static void __init default_set_debug_port(int port)
 679{
 680}
 681
 682static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
 683
 684static void __init nvidia_set_debug_port(int port)
 685{
 686        u32 dword;
 687        dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 688                                 0x74);
 689        dword &= ~(0x0f<<12);
 690        dword |= ((port & 0x0f)<<12);
 691        write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
 692                                 dword);
 693        dbgp_printk("set debug port to %d\n", port);
 694}
 695
 696static void __init detect_set_debug_port(void)
 697{
 698        u32 vendorid;
 699
 700        vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 701                 0x00);
 702
 703        if ((vendorid & 0xffff) == 0x10de) {
 704                dbgp_printk("using nvidia set_debug_port\n");
 705                set_debug_port = nvidia_set_debug_port;
 706        }
 707}
 708
 709/* The code in early_ehci_bios_handoff() is derived from the usb pci
 710 * quirk initialization, but altered so as to use the early PCI
 711 * routines. */
 712#define EHCI_USBLEGSUP_BIOS     (1 << 16)       /* BIOS semaphore */
 713#define EHCI_USBLEGCTLSTS       4               /* legacy control/status */
 714static void __init early_ehci_bios_handoff(void)
 715{
 716        u32 hcc_params = readl(&ehci_caps->hcc_params);
 717        int offset = (hcc_params >> 8) & 0xff;
 718        u32 cap;
 719        int msec;
 720
 721        if (!offset)
 722                return;
 723
 724        cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
 725                              ehci_dev.func, offset);
 726        dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
 727
 728        if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
 729                dbgp_printk("dbgp: BIOS handoff\n");
 730                write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
 731                                      ehci_dev.func, offset + 3, 1);
 732        }
 733
 734        /* if boot firmware now owns EHCI, spin till it hands it over. */
 735        msec = 1000;
 736        while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
 737                mdelay(10);
 738                msec -= 10;
 739                cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
 740                                      ehci_dev.func, offset);
 741        }
 742
 743        if (cap & EHCI_USBLEGSUP_BIOS) {
 744                /* well, possibly buggy BIOS... try to shut it down,
 745                 * and hope nothing goes too wrong */
 746                dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
 747                write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
 748                                      ehci_dev.func, offset + 2, 0);
 749        }
 750
 751        /* just in case, always disable EHCI SMIs */
 752        write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
 753                              offset + EHCI_USBLEGCTLSTS, 0);
 754}
 755
 756static int __init ehci_setup(void)
 757{
 758        u32 ctrl, portsc, hcs_params;
 759        u32 debug_port, new_debug_port = 0, n_ports;
 760        int ret, i;
 761        int port_map_tried;
 762        int playtimes = 3;
 763
 764        early_ehci_bios_handoff();
 765
 766try_next_time:
 767        port_map_tried = 0;
 768
 769try_next_port:
 770
 771        hcs_params = readl(&ehci_caps->hcs_params);
 772        debug_port = HCS_DEBUG_PORT(hcs_params);
 773        dbgp_phys_port = debug_port;
 774        n_ports    = HCS_N_PORTS(hcs_params);
 775
 776        dbgp_printk("debug_port: %d\n", debug_port);
 777        dbgp_printk("n_ports:    %d\n", n_ports);
 778        dbgp_ehci_status("");
 779
 780        for (i = 1; i <= n_ports; i++) {
 781                portsc = readl(&ehci_regs->port_status[i-1]);
 782                dbgp_printk("portstatus%d: %08x\n", i, portsc);
 783        }
 784
 785        if (port_map_tried && (new_debug_port != debug_port)) {
 786                if (--playtimes) {
 787                        set_debug_port(new_debug_port);
 788                        goto try_next_time;
 789                }
 790                return -1;
 791        }
 792
 793        /* Only reset the controller if it is not already in the
 794         * configured state */
 795        if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
 796                if (dbgp_ehci_controller_reset() != 0)
 797                        return -1;
 798        } else {
 799                dbgp_ehci_status("ehci skip - already configured");
 800        }
 801
 802        ret = _dbgp_external_startup();
 803        if (ret == -EIO)
 804                goto next_debug_port;
 805
 806        if (ret < 0) {
 807                /* Things didn't work so remove my claim */
 808                ctrl = readl(&ehci_debug->control);
 809                ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
 810                writel(ctrl, &ehci_debug->control);
 811                return -1;
 812        }
 813        return 0;
 814
 815next_debug_port:
 816        port_map_tried |= (1<<(debug_port - 1));
 817        new_debug_port = ((debug_port-1+1)%n_ports) + 1;
 818        if (port_map_tried != ((1<<n_ports) - 1)) {
 819                set_debug_port(new_debug_port);
 820                goto try_next_port;
 821        }
 822        if (--playtimes) {
 823                set_debug_port(new_debug_port);
 824                goto try_next_time;
 825        }
 826
 827        return -1;
 828}
 829
 830int __init early_dbgp_init(char *s)
 831{
 832        u32 debug_port, bar, offset;
 833        u32 bus, slot, func, cap;
 834        void __iomem *ehci_bar;
 835        u32 dbgp_num;
 836        u32 bar_val;
 837        char *e;
 838        int ret;
 839        u8 byte;
 840
 841        if (!early_pci_allowed())
 842                return -1;
 843
 844        dbgp_num = 0;
 845        if (*s)
 846                dbgp_num = simple_strtoul(s, &e, 10);
 847        dbgp_printk("dbgp_num: %d\n", dbgp_num);
 848
 849        cap = find_dbgp(dbgp_num, &bus, &slot, &func);
 850        if (!cap)
 851                return -1;
 852
 853        dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
 854                         func);
 855
 856        debug_port = read_pci_config(bus, slot, func, cap);
 857        bar = (debug_port >> 29) & 0x7;
 858        bar = (bar * 4) + 0xc;
 859        offset = (debug_port >> 16) & 0xfff;
 860        dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
 861        if (bar != PCI_BASE_ADDRESS_0) {
 862                dbgp_printk("only debug ports on bar 1 handled.\n");
 863
 864                return -1;
 865        }
 866
 867        bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
 868        dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
 869        if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
 870                dbgp_printk("only simple 32bit mmio bars supported\n");
 871
 872                return -1;
 873        }
 874
 875        /* double check if the mem space is enabled */
 876        byte = read_pci_config_byte(bus, slot, func, 0x04);
 877        if (!(byte & 0x2)) {
 878                byte  |= 0x02;
 879                write_pci_config_byte(bus, slot, func, 0x04, byte);
 880                dbgp_printk("mmio for ehci enabled\n");
 881        }
 882
 883        /*
 884         * FIXME I don't have the bar size so just guess PAGE_SIZE is more
 885         * than enough.  1K is the biggest I have seen.
 886         */
 887        set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
 888        ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
 889        ehci_bar += bar_val & ~PAGE_MASK;
 890        dbgp_printk("ehci_bar: %p\n", ehci_bar);
 891
 892        ehci_caps  = ehci_bar;
 893        ehci_regs  = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
 894        ehci_debug = ehci_bar + offset;
 895        ehci_dev.bus = bus;
 896        ehci_dev.slot = slot;
 897        ehci_dev.func = func;
 898
 899        detect_set_debug_port();
 900
 901        ret = ehci_setup();
 902        if (ret < 0) {
 903                dbgp_printk("ehci_setup failed\n");
 904                ehci_debug = NULL;
 905
 906                return -1;
 907        }
 908        dbgp_ehci_status("early_init_complete");
 909
 910        return 0;
 911}
 912
 913static void early_dbgp_write(struct console *con, const char *str, u32 n)
 914{
 915        int chunk, ret;
 916        char buf[DBGP_MAX_PACKET];
 917        int use_cr = 0;
 918        u32 cmd, ctrl;
 919        int reset_run = 0;
 920
 921        if (!ehci_debug || dbgp_not_safe)
 922                return;
 923
 924        cmd = readl(&ehci_regs->command);
 925        if (unlikely(!(cmd & CMD_RUN))) {
 926                /* If the ehci controller is not in the run state do extended
 927                 * checks to see if the acpi or some other initialization also
 928                 * reset the ehci debug port */
 929                ctrl = readl(&ehci_debug->control);
 930                if (!(ctrl & DBGP_ENABLED)) {
 931                        dbgp_not_safe = 1;
 932                        _dbgp_external_startup();
 933                } else {
 934                        cmd |= CMD_RUN;
 935                        writel(cmd, &ehci_regs->command);
 936                        reset_run = 1;
 937                }
 938        }
 939        while (n > 0) {
 940                for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
 941                     str++, chunk++, n--) {
 942                        if (!use_cr && *str == '\n') {
 943                                use_cr = 1;
 944                                buf[chunk] = '\r';
 945                                str--;
 946                                n++;
 947                                continue;
 948                        }
 949                        if (use_cr)
 950                                use_cr = 0;
 951                        buf[chunk] = *str;
 952                }
 953                if (chunk > 0) {
 954                        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
 955                                      dbgp_endpoint_out, buf, chunk);
 956                }
 957        }
 958        if (unlikely(reset_run)) {
 959                cmd = readl(&ehci_regs->command);
 960                cmd &= ~CMD_RUN;
 961                writel(cmd, &ehci_regs->command);
 962        }
 963}
 964
 965struct console early_dbgp_console = {
 966        .name =         "earlydbg",
 967        .write =        early_dbgp_write,
 968        .flags =        CON_PRINTBUFFER,
 969        .index =        -1,
 970};
 971
 972#if IS_ENABLED(CONFIG_USB)
 973int dbgp_reset_prep(struct usb_hcd *hcd)
 974{
 975        int ret = xen_dbgp_reset_prep(hcd);
 976        u32 ctrl;
 977
 978        if (ret)
 979                return ret;
 980
 981        dbgp_not_safe = 1;
 982        if (!ehci_debug)
 983                return 0;
 984
 985        if ((early_dbgp_console.index != -1 &&
 986             !(early_dbgp_console.flags & CON_BOOT)) ||
 987            dbgp_kgdb_mode)
 988                return 1;
 989        /* This means the console is not initialized, or should get
 990         * shutdown so as to allow for reuse of the usb device, which
 991         * means it is time to shutdown the usb debug port. */
 992        ctrl = readl(&ehci_debug->control);
 993        if (ctrl & DBGP_ENABLED) {
 994                ctrl &= ~(DBGP_CLAIM);
 995                writel(ctrl, &ehci_debug->control);
 996        }
 997        return 0;
 998}
 999EXPORT_SYMBOL_GPL(dbgp_reset_prep);
1000
1001int dbgp_external_startup(struct usb_hcd *hcd)
1002{
1003        return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
1004}
1005EXPORT_SYMBOL_GPL(dbgp_external_startup);
1006#endif /* USB */
1007
1008#ifdef CONFIG_KGDB
1009
1010static char kgdbdbgp_buf[DBGP_MAX_PACKET];
1011static int kgdbdbgp_buf_sz;
1012static int kgdbdbgp_buf_idx;
1013static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
1014
1015static int kgdbdbgp_read_char(void)
1016{
1017        int ret;
1018
1019        if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
1020                char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
1021                return ch;
1022        }
1023
1024        ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
1025                             &kgdbdbgp_buf, DBGP_MAX_PACKET,
1026                             kgdbdbgp_loop_cnt);
1027        if (ret <= 0)
1028                return NO_POLL_CHAR;
1029        kgdbdbgp_buf_sz = ret;
1030        kgdbdbgp_buf_idx = 1;
1031        return kgdbdbgp_buf[0];
1032}
1033
1034static void kgdbdbgp_write_char(u8 chr)
1035{
1036        early_dbgp_write(NULL, &chr, 1);
1037}
1038
1039static struct kgdb_io kgdbdbgp_io_ops = {
1040        .name = "kgdbdbgp",
1041        .read_char = kgdbdbgp_read_char,
1042        .write_char = kgdbdbgp_write_char,
1043};
1044
1045static int kgdbdbgp_wait_time;
1046
1047static int __init kgdbdbgp_parse_config(char *str)
1048{
1049        char *ptr;
1050
1051        if (!ehci_debug) {
1052                if (early_dbgp_init(str))
1053                        return -1;
1054        }
1055        ptr = strchr(str, ',');
1056        if (ptr) {
1057                ptr++;
1058                kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
1059        }
1060        kgdb_register_io_module(&kgdbdbgp_io_ops);
1061        kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
1062
1063        return 0;
1064}
1065early_param("kgdbdbgp", kgdbdbgp_parse_config);
1066
1067static int kgdbdbgp_reader_thread(void *ptr)
1068{
1069        int ret;
1070
1071        while (readl(&ehci_debug->control) & DBGP_ENABLED) {
1072                kgdbdbgp_loop_cnt = 1;
1073                ret = kgdbdbgp_read_char();
1074                kgdbdbgp_loop_cnt = DBGP_LOOPS;
1075                if (ret != NO_POLL_CHAR) {
1076                        if (ret == 0x3 || ret == '$') {
1077                                if (ret == '$')
1078                                        kgdbdbgp_buf_idx--;
1079                                kgdb_breakpoint();
1080                        }
1081                        continue;
1082                }
1083                schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
1084        }
1085        return 0;
1086}
1087
1088static int __init kgdbdbgp_start_thread(void)
1089{
1090        if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
1091                kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
1092
1093        return 0;
1094}
1095device_initcall(kgdbdbgp_start_thread);
1096#endif /* CONFIG_KGDB */
1097