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7#ifndef LINUX_MMC_HOST_H
8#define LINUX_MMC_HOST_H
9
10#include <linux/sched.h>
11#include <linux/device.h>
12#include <linux/fault-inject.h>
13
14#include <linux/mmc/core.h>
15#include <linux/mmc/card.h>
16#include <linux/mmc/pm.h>
17#include <linux/dma-direction.h>
18
19struct mmc_ios {
20 unsigned int clock;
21 unsigned short vdd;
22 unsigned int power_delay_ms;
23
24
25
26 unsigned char bus_mode;
27
28#define MMC_BUSMODE_OPENDRAIN 1
29#define MMC_BUSMODE_PUSHPULL 2
30
31 unsigned char chip_select;
32
33#define MMC_CS_DONTCARE 0
34#define MMC_CS_HIGH 1
35#define MMC_CS_LOW 2
36
37 unsigned char power_mode;
38
39#define MMC_POWER_OFF 0
40#define MMC_POWER_UP 1
41#define MMC_POWER_ON 2
42#define MMC_POWER_UNDEFINED 3
43
44 unsigned char bus_width;
45
46#define MMC_BUS_WIDTH_1 0
47#define MMC_BUS_WIDTH_4 2
48#define MMC_BUS_WIDTH_8 3
49
50 unsigned char timing;
51
52#define MMC_TIMING_LEGACY 0
53#define MMC_TIMING_MMC_HS 1
54#define MMC_TIMING_SD_HS 2
55#define MMC_TIMING_UHS_SDR12 3
56#define MMC_TIMING_UHS_SDR25 4
57#define MMC_TIMING_UHS_SDR50 5
58#define MMC_TIMING_UHS_SDR104 6
59#define MMC_TIMING_UHS_DDR50 7
60#define MMC_TIMING_MMC_DDR52 8
61#define MMC_TIMING_MMC_HS200 9
62#define MMC_TIMING_MMC_HS400 10
63
64 unsigned char signal_voltage;
65
66#define MMC_SIGNAL_VOLTAGE_330 0
67#define MMC_SIGNAL_VOLTAGE_180 1
68#define MMC_SIGNAL_VOLTAGE_120 2
69
70 unsigned char drv_type;
71
72#define MMC_SET_DRIVER_TYPE_B 0
73#define MMC_SET_DRIVER_TYPE_A 1
74#define MMC_SET_DRIVER_TYPE_C 2
75#define MMC_SET_DRIVER_TYPE_D 3
76
77 bool enhanced_strobe;
78};
79
80struct mmc_host;
81
82struct mmc_host_ops {
83
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87
88
89
90
91 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
92 int err);
93 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
94 void (*request)(struct mmc_host *host, struct mmc_request *req);
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108
109
110 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
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118
119 int (*get_ro)(struct mmc_host *host);
120
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126
127
128 int (*get_cd)(struct mmc_host *host);
129
130 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
131
132 void (*ack_sdio_irq)(struct mmc_host *host);
133
134
135 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
136
137 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
138
139
140 int (*card_busy)(struct mmc_host *host);
141
142
143 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
144
145
146 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
147
148
149 int (*hs400_prepare_ddr)(struct mmc_host *host);
150
151
152 void (*hs400_downgrade)(struct mmc_host *host);
153
154
155 void (*hs400_complete)(struct mmc_host *host);
156
157
158 void (*hs400_enhanced_strobe)(struct mmc_host *host,
159 struct mmc_ios *ios);
160 int (*select_drive_strength)(struct mmc_card *card,
161 unsigned int max_dtr, int host_drv,
162 int card_drv, int *drv_type);
163 void (*hw_reset)(struct mmc_host *host);
164 void (*card_event)(struct mmc_host *host);
165
166
167
168
169
170 int (*multi_io_quirk)(struct mmc_card *card,
171 unsigned int direction, int blk_size);
172};
173
174struct mmc_cqe_ops {
175
176 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
177
178 void (*cqe_disable)(struct mmc_host *host);
179
180
181
182
183 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
184
185 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
186
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189
190
191 void (*cqe_off)(struct mmc_host *host);
192
193
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195
196 int (*cqe_wait_for_idle)(struct mmc_host *host);
197
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201
202 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
203 bool *recovery_needed);
204
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207
208 void (*cqe_recovery_start)(struct mmc_host *host);
209
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214
215 void (*cqe_recovery_finish)(struct mmc_host *host);
216};
217
218struct mmc_async_req {
219
220 struct mmc_request *mrq;
221
222
223
224
225 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
226};
227
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238
239struct mmc_slot {
240 int cd_irq;
241 bool cd_wake_enabled;
242 void *handler_priv;
243};
244
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248
249
250
251
252struct mmc_context_info {
253 bool is_done_rcv;
254 bool is_new_req;
255 bool is_waiting_last_req;
256 wait_queue_head_t wait;
257};
258
259struct regulator;
260struct mmc_pwrseq;
261
262struct mmc_supply {
263 struct regulator *vmmc;
264 struct regulator *vqmmc;
265};
266
267struct mmc_ctx {
268 struct task_struct *task;
269};
270
271struct mmc_host {
272 struct device *parent;
273 struct device class_dev;
274 int index;
275 const struct mmc_host_ops *ops;
276 struct mmc_pwrseq *pwrseq;
277 unsigned int f_min;
278 unsigned int f_max;
279 unsigned int f_init;
280 u32 ocr_avail;
281 u32 ocr_avail_sdio;
282 u32 ocr_avail_sd;
283 u32 ocr_avail_mmc;
284#ifdef CONFIG_PM_SLEEP
285 struct notifier_block pm_notify;
286#endif
287 u32 max_current_330;
288 u32 max_current_300;
289 u32 max_current_180;
290
291#define MMC_VDD_165_195 0x00000080
292#define MMC_VDD_20_21 0x00000100
293#define MMC_VDD_21_22 0x00000200
294#define MMC_VDD_22_23 0x00000400
295#define MMC_VDD_23_24 0x00000800
296#define MMC_VDD_24_25 0x00001000
297#define MMC_VDD_25_26 0x00002000
298#define MMC_VDD_26_27 0x00004000
299#define MMC_VDD_27_28 0x00008000
300#define MMC_VDD_28_29 0x00010000
301#define MMC_VDD_29_30 0x00020000
302#define MMC_VDD_30_31 0x00040000
303#define MMC_VDD_31_32 0x00080000
304#define MMC_VDD_32_33 0x00100000
305#define MMC_VDD_33_34 0x00200000
306#define MMC_VDD_34_35 0x00400000
307#define MMC_VDD_35_36 0x00800000
308
309 u32 caps;
310
311#define MMC_CAP_4_BIT_DATA (1 << 0)
312#define MMC_CAP_MMC_HIGHSPEED (1 << 1)
313#define MMC_CAP_SD_HIGHSPEED (1 << 2)
314#define MMC_CAP_SDIO_IRQ (1 << 3)
315#define MMC_CAP_SPI (1 << 4)
316#define MMC_CAP_NEEDS_POLL (1 << 5)
317#define MMC_CAP_8_BIT_DATA (1 << 6)
318#define MMC_CAP_AGGRESSIVE_PM (1 << 7)
319#define MMC_CAP_NONREMOVABLE (1 << 8)
320#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)
321#define MMC_CAP_ERASE (1 << 10)
322#define MMC_CAP_3_3V_DDR (1 << 11)
323#define MMC_CAP_1_8V_DDR (1 << 12)
324#define MMC_CAP_1_2V_DDR (1 << 13)
325#define MMC_CAP_POWER_OFF_CARD (1 << 14)
326#define MMC_CAP_BUS_WIDTH_TEST (1 << 15)
327#define MMC_CAP_UHS_SDR12 (1 << 16)
328#define MMC_CAP_UHS_SDR25 (1 << 17)
329#define MMC_CAP_UHS_SDR50 (1 << 18)
330#define MMC_CAP_UHS_SDR104 (1 << 19)
331#define MMC_CAP_UHS_DDR50 (1 << 20)
332#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
333 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
334 MMC_CAP_UHS_DDR50)
335#define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)
336#define MMC_CAP_DRIVER_TYPE_A (1 << 23)
337#define MMC_CAP_DRIVER_TYPE_C (1 << 24)
338#define MMC_CAP_DRIVER_TYPE_D (1 << 25)
339#define MMC_CAP_DONE_COMPLETE (1 << 27)
340#define MMC_CAP_CD_WAKE (1 << 28)
341#define MMC_CAP_CMD_DURING_TFR (1 << 29)
342#define MMC_CAP_CMD23 (1 << 30)
343#define MMC_CAP_HW_RESET (1 << 31)
344
345 u32 caps2;
346
347#define MMC_CAP2_BOOTPART_NOACC (1 << 0)
348#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)
349#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)
350#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)
351#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
352 MMC_CAP2_HS200_1_2V_SDR)
353#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)
354#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)
355#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)
356#define MMC_CAP2_HS400_1_8V (1 << 15)
357#define MMC_CAP2_HS400_1_2V (1 << 16)
358#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
359 MMC_CAP2_HS400_1_2V)
360#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
361#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
362#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
363#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)
364#define MMC_CAP2_NO_SDIO (1 << 19)
365#define MMC_CAP2_HS400_ES (1 << 20)
366#define MMC_CAP2_NO_SD (1 << 21)
367#define MMC_CAP2_NO_MMC (1 << 22)
368#define MMC_CAP2_CQE (1 << 23)
369#define MMC_CAP2_CQE_DCMD (1 << 24)
370#define MMC_CAP2_AVOID_3_3V (1 << 25)
371#define MMC_CAP2_MERGE_CAPABLE (1 << 26)
372
373 int fixed_drv_type;
374
375 mmc_pm_flag_t pm_caps;
376
377
378 unsigned int max_seg_size;
379 unsigned short max_segs;
380 unsigned short unused;
381 unsigned int max_req_size;
382 unsigned int max_blk_size;
383 unsigned int max_blk_count;
384 unsigned int max_busy_timeout;
385
386
387 spinlock_t lock;
388
389 struct mmc_ios ios;
390
391
392 unsigned int use_spi_crc:1;
393 unsigned int claimed:1;
394 unsigned int bus_dead:1;
395 unsigned int can_retune:1;
396 unsigned int doing_retune:1;
397 unsigned int retune_now:1;
398 unsigned int retune_paused:1;
399 unsigned int use_blk_mq:1;
400 unsigned int retune_crc_disable:1;
401 unsigned int can_dma_map_merge:1;
402
403 int rescan_disable;
404 int rescan_entered;
405
406 int need_retune;
407 int hold_retune;
408 unsigned int retune_period;
409 struct timer_list retune_timer;
410
411 bool trigger_card_event;
412
413 struct mmc_card *card;
414
415 wait_queue_head_t wq;
416 struct mmc_ctx *claimer;
417 int claim_cnt;
418 struct mmc_ctx default_ctx;
419
420 struct delayed_work detect;
421 int detect_change;
422 struct mmc_slot slot;
423
424 const struct mmc_bus_ops *bus_ops;
425 unsigned int bus_refs;
426
427 unsigned int sdio_irqs;
428 struct task_struct *sdio_irq_thread;
429 struct delayed_work sdio_irq_work;
430 bool sdio_irq_pending;
431 atomic_t sdio_irq_thread_abort;
432
433 mmc_pm_flag_t pm_flags;
434
435 struct led_trigger *led;
436
437#ifdef CONFIG_REGULATOR
438 bool regulator_enabled;
439#endif
440 struct mmc_supply supply;
441
442 struct dentry *debugfs_root;
443
444
445 struct mmc_request *ongoing_mrq;
446
447#ifdef CONFIG_FAIL_MMC_REQUEST
448 struct fault_attr fail_mmc_request;
449#endif
450
451 unsigned int actual_clock;
452
453 unsigned int slotno;
454
455 int dsr_req;
456 u32 dsr;
457
458
459 const struct mmc_cqe_ops *cqe_ops;
460 void *cqe_private;
461 int cqe_qdepth;
462 bool cqe_enabled;
463 bool cqe_on;
464
465 unsigned long private[0] ____cacheline_aligned;
466};
467
468struct device_node;
469
470struct mmc_host *mmc_alloc_host(int extra, struct device *);
471int mmc_add_host(struct mmc_host *);
472void mmc_remove_host(struct mmc_host *);
473void mmc_free_host(struct mmc_host *);
474int mmc_of_parse(struct mmc_host *host);
475int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
476
477static inline void *mmc_priv(struct mmc_host *host)
478{
479 return (void *)host->private;
480}
481
482static inline struct mmc_host *mmc_from_priv(void *priv)
483{
484 return container_of(priv, struct mmc_host, private);
485}
486
487#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
488
489#define mmc_dev(x) ((x)->parent)
490#define mmc_classdev(x) (&(x)->class_dev)
491#define mmc_hostname(x) (dev_name(&(x)->class_dev))
492
493void mmc_detect_change(struct mmc_host *, unsigned long delay);
494void mmc_request_done(struct mmc_host *, struct mmc_request *);
495void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
496
497void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
498
499
500
501
502
503static inline bool sdio_irq_claimed(struct mmc_host *host)
504{
505 return host->sdio_irqs > 0;
506}
507
508static inline void mmc_signal_sdio_irq(struct mmc_host *host)
509{
510 host->ops->enable_sdio_irq(host, 0);
511 host->sdio_irq_pending = true;
512 if (host->sdio_irq_thread)
513 wake_up_process(host->sdio_irq_thread);
514}
515
516void sdio_signal_irq(struct mmc_host *host);
517
518#ifdef CONFIG_REGULATOR
519int mmc_regulator_set_ocr(struct mmc_host *mmc,
520 struct regulator *supply,
521 unsigned short vdd_bit);
522int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
523#else
524static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
525 struct regulator *supply,
526 unsigned short vdd_bit)
527{
528 return 0;
529}
530
531static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
532 struct mmc_ios *ios)
533{
534 return -EINVAL;
535}
536#endif
537
538int mmc_regulator_get_supply(struct mmc_host *mmc);
539
540static inline int mmc_card_is_removable(struct mmc_host *host)
541{
542 return !(host->caps & MMC_CAP_NONREMOVABLE);
543}
544
545static inline int mmc_card_keep_power(struct mmc_host *host)
546{
547 return host->pm_flags & MMC_PM_KEEP_POWER;
548}
549
550static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
551{
552 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
553}
554
555
556static inline int mmc_card_hs(struct mmc_card *card)
557{
558 return card->host->ios.timing == MMC_TIMING_SD_HS ||
559 card->host->ios.timing == MMC_TIMING_MMC_HS;
560}
561
562
563static inline int mmc_card_uhs(struct mmc_card *card)
564{
565 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
566 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
567}
568
569void mmc_retune_timer_stop(struct mmc_host *host);
570
571static inline void mmc_retune_needed(struct mmc_host *host)
572{
573 if (host->can_retune)
574 host->need_retune = 1;
575}
576
577static inline bool mmc_can_retune(struct mmc_host *host)
578{
579 return host->can_retune == 1;
580}
581
582static inline bool mmc_doing_retune(struct mmc_host *host)
583{
584 return host->doing_retune == 1;
585}
586
587static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
588{
589 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
590}
591
592int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
593int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
594
595#endif
596