linux/sound/soc/sh/dma-sh7760.c
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   1// SPDX-License-Identifier: GPL-2.0
   2//
   3// SH7760 ("camelot") DMABRG audio DMA unit support
   4//
   5// Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
   6//
   7// The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
   8// trigger an interrupt when one half of the programmed transfer size
   9// has been xmitted.
  10//
  11// FIXME: little-endian only for now
  12
  13#include <linux/module.h>
  14#include <linux/gfp.h>
  15#include <linux/init.h>
  16#include <linux/platform_device.h>
  17#include <linux/dma-mapping.h>
  18#include <sound/core.h>
  19#include <sound/pcm.h>
  20#include <sound/pcm_params.h>
  21#include <sound/soc.h>
  22#include <asm/dmabrg.h>
  23
  24
  25/* registers and bits */
  26#define BRGATXSAR       0x00
  27#define BRGARXDAR       0x04
  28#define BRGATXTCR       0x08
  29#define BRGARXTCR       0x0C
  30#define BRGACR          0x10
  31#define BRGATXTCNT      0x14
  32#define BRGARXTCNT      0x18
  33
  34#define ACR_RAR         (1 << 18)
  35#define ACR_RDS         (1 << 17)
  36#define ACR_RDE         (1 << 16)
  37#define ACR_TAR         (1 << 2)
  38#define ACR_TDS         (1 << 1)
  39#define ACR_TDE         (1 << 0)
  40
  41/* receiver/transmitter data alignment */
  42#define ACR_RAM_NONE    (0 << 24)
  43#define ACR_RAM_4BYTE   (1 << 24)
  44#define ACR_RAM_2WORD   (2 << 24)
  45#define ACR_TAM_NONE    (0 << 8)
  46#define ACR_TAM_4BYTE   (1 << 8)
  47#define ACR_TAM_2WORD   (2 << 8)
  48
  49
  50struct camelot_pcm {
  51        unsigned long mmio;  /* DMABRG audio channel control reg MMIO */
  52        unsigned int txid;    /* ID of first DMABRG IRQ for this unit */
  53
  54        struct snd_pcm_substream *tx_ss;
  55        unsigned long tx_period_size;
  56        unsigned int  tx_period;
  57
  58        struct snd_pcm_substream *rx_ss;
  59        unsigned long rx_period_size;
  60        unsigned int  rx_period;
  61
  62} cam_pcm_data[2] = {
  63        {
  64                .mmio   =       0xFE3C0040,
  65                .txid   =       DMABRGIRQ_A0TXF,
  66        },
  67        {
  68                .mmio   =       0xFE3C0060,
  69                .txid   =       DMABRGIRQ_A1TXF,
  70        },
  71};
  72
  73#define BRGREG(x)       (*(unsigned long *)(cam->mmio + (x)))
  74
  75/*
  76 * set a minimum of 16kb per period, to avoid interrupt-"storm" and
  77 * resulting skipping. In general, the bigger the minimum size, the
  78 * better for overall system performance. (The SH7760 is a puny CPU
  79 * with a slow SDRAM interface and poor internal bus bandwidth,
  80 * *especially* when the LCDC is active).  The minimum for the DMAC
  81 * is 8 bytes; 16kbytes are enough to get skip-free playback of a
  82 * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
  83 * reasonable responsiveness in MPlayer.
  84 */
  85#define DMABRG_PERIOD_MIN               16 * 1024
  86#define DMABRG_PERIOD_MAX               0x03fffffc
  87#define DMABRG_PREALLOC_BUFFER          32 * 1024
  88#define DMABRG_PREALLOC_BUFFER_MAX      32 * 1024
  89
  90static const struct snd_pcm_hardware camelot_pcm_hardware = {
  91        .info = (SNDRV_PCM_INFO_MMAP |
  92                SNDRV_PCM_INFO_INTERLEAVED |
  93                SNDRV_PCM_INFO_BLOCK_TRANSFER |
  94                SNDRV_PCM_INFO_MMAP_VALID |
  95                SNDRV_PCM_INFO_BATCH),
  96        .buffer_bytes_max =     DMABRG_PERIOD_MAX,
  97        .period_bytes_min =     DMABRG_PERIOD_MIN,
  98        .period_bytes_max =     DMABRG_PERIOD_MAX / 2,
  99        .periods_min =          2,
 100        .periods_max =          2,
 101        .fifo_size =            128,
 102};
 103
 104static void camelot_txdma(void *data)
 105{
 106        struct camelot_pcm *cam = data;
 107        cam->tx_period ^= 1;
 108        snd_pcm_period_elapsed(cam->tx_ss);
 109}
 110
 111static void camelot_rxdma(void *data)
 112{
 113        struct camelot_pcm *cam = data;
 114        cam->rx_period ^= 1;
 115        snd_pcm_period_elapsed(cam->rx_ss);
 116}
 117
 118static int camelot_pcm_open(struct snd_soc_component *component,
 119                            struct snd_pcm_substream *substream)
 120{
 121        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 122        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 123        int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
 124        int ret, dmairq;
 125
 126        snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
 127
 128        /* DMABRG buffer half/full events */
 129        dmairq = (recv) ? cam->txid + 2 : cam->txid;
 130        if (recv) {
 131                cam->rx_ss = substream;
 132                ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
 133                if (unlikely(ret)) {
 134                        pr_debug("audio unit %d irqs already taken!\n",
 135                             rtd->cpu_dai->id);
 136                        return -EBUSY;
 137                }
 138                (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
 139        } else {
 140                cam->tx_ss = substream;
 141                ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
 142                if (unlikely(ret)) {
 143                        pr_debug("audio unit %d irqs already taken!\n",
 144                             rtd->cpu_dai->id);
 145                        return -EBUSY;
 146                }
 147                (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
 148        }
 149        return 0;
 150}
 151
 152static int camelot_pcm_close(struct snd_soc_component *component,
 153                             struct snd_pcm_substream *substream)
 154{
 155        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 156        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 157        int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
 158        int dmairq;
 159
 160        dmairq = (recv) ? cam->txid + 2 : cam->txid;
 161
 162        if (recv)
 163                cam->rx_ss = NULL;
 164        else
 165                cam->tx_ss = NULL;
 166
 167        dmabrg_free_irq(dmairq + 1);
 168        dmabrg_free_irq(dmairq);
 169
 170        return 0;
 171}
 172
 173static int camelot_hw_params(struct snd_soc_component *component,
 174                             struct snd_pcm_substream *substream,
 175                             struct snd_pcm_hw_params *hw_params)
 176{
 177        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 178        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 179        int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
 180        int ret;
 181
 182        ret = snd_pcm_lib_malloc_pages(substream,
 183                                       params_buffer_bytes(hw_params));
 184        if (ret < 0)
 185                return ret;
 186
 187        if (recv) {
 188                cam->rx_period_size = params_period_bytes(hw_params);
 189                cam->rx_period = 0;
 190        } else {
 191                cam->tx_period_size = params_period_bytes(hw_params);
 192                cam->tx_period = 0;
 193        }
 194        return 0;
 195}
 196
 197static int camelot_hw_free(struct snd_soc_component *component,
 198                           struct snd_pcm_substream *substream)
 199{
 200        return snd_pcm_lib_free_pages(substream);
 201}
 202
 203static int camelot_prepare(struct snd_soc_component *component,
 204                           struct snd_pcm_substream *substream)
 205{
 206        struct snd_pcm_runtime *runtime = substream->runtime;
 207        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 208        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 209
 210        pr_debug("PCM data: addr 0x%08lx len %d\n",
 211                 (u32)runtime->dma_addr, runtime->dma_bytes);
 212 
 213        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 214                BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
 215                BRGREG(BRGATXTCR) = runtime->dma_bytes;
 216        } else {
 217                BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
 218                BRGREG(BRGARXTCR) = runtime->dma_bytes;
 219        }
 220
 221        return 0;
 222}
 223
 224static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
 225{
 226        unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
 227        /* start DMABRG engine: XFER start, auto-addr-reload */
 228        BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
 229}
 230
 231static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
 232{
 233        unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
 234        /* forcibly terminate data transmission */
 235        BRGREG(BRGACR) = acr | ACR_TDS;
 236}
 237
 238static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
 239{
 240        unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
 241        /* start DMABRG engine: recv start, auto-reload */
 242        BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
 243}
 244
 245static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
 246{
 247        unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
 248        /* forcibly terminate data receiver */
 249        BRGREG(BRGACR) = acr | ACR_RDS;
 250}
 251
 252static int camelot_trigger(struct snd_soc_component *component,
 253                           struct snd_pcm_substream *substream, int cmd)
 254{
 255        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 256        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 257        int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
 258
 259        switch (cmd) {
 260        case SNDRV_PCM_TRIGGER_START:
 261                if (recv)
 262                        dmabrg_rec_dma_start(cam);
 263                else
 264                        dmabrg_play_dma_start(cam);
 265                break;
 266        case SNDRV_PCM_TRIGGER_STOP:
 267                if (recv)
 268                        dmabrg_rec_dma_stop(cam);
 269                else
 270                        dmabrg_play_dma_stop(cam);
 271                break;
 272        default:
 273                return -EINVAL;
 274        }
 275
 276        return 0;
 277}
 278
 279static snd_pcm_uframes_t camelot_pos(struct snd_soc_component *component,
 280                                     struct snd_pcm_substream *substream)
 281{
 282        struct snd_pcm_runtime *runtime = substream->runtime;
 283        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 284        struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id];
 285        int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
 286        unsigned long pos;
 287
 288        /* cannot use the DMABRG pointer register: under load, by the
 289         * time ALSA comes around to read the register, it is already
 290         * far ahead (or worse, already done with the fragment) of the
 291         * position at the time the IRQ was triggered, which results in
 292         * fast-playback sound in my test application (ScummVM)
 293         */
 294        if (recv)
 295                pos = cam->rx_period ? cam->rx_period_size : 0;
 296        else
 297                pos = cam->tx_period ? cam->tx_period_size : 0;
 298
 299        return bytes_to_frames(runtime, pos);
 300}
 301
 302static int camelot_pcm_new(struct snd_soc_component *component,
 303                           struct snd_soc_pcm_runtime *rtd)
 304{
 305        struct snd_pcm *pcm = rtd->pcm;
 306
 307        /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
 308         * in MMAP mode (i.e. aplay -M)
 309         */
 310        snd_pcm_lib_preallocate_pages_for_all(pcm,
 311                SNDRV_DMA_TYPE_CONTINUOUS,
 312                NULL,
 313                DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
 314
 315        return 0;
 316}
 317
 318static const struct snd_soc_component_driver sh7760_soc_component = {
 319        .open           = camelot_pcm_open,
 320        .close          = camelot_pcm_close,
 321        .ioctl          = snd_soc_pcm_lib_ioctl,
 322        .hw_params      = camelot_hw_params,
 323        .hw_free        = camelot_hw_free,
 324        .prepare        = camelot_prepare,
 325        .trigger        = camelot_trigger,
 326        .pointer        = camelot_pos,
 327        .pcm_construct  = camelot_pcm_new,
 328};
 329
 330static int sh7760_soc_platform_probe(struct platform_device *pdev)
 331{
 332        return devm_snd_soc_register_component(&pdev->dev, &sh7760_soc_component,
 333                                               NULL, 0);
 334}
 335
 336static struct platform_driver sh7760_pcm_driver = {
 337        .driver = {
 338                        .name = "sh7760-pcm-audio",
 339        },
 340
 341        .probe = sh7760_soc_platform_probe,
 342};
 343
 344module_platform_driver(sh7760_pcm_driver);
 345
 346MODULE_LICENSE("GPL v2");
 347MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
 348MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
 349