1
2
3
4
5
6#define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
7
8#include <linux/export.h>
9#include <linux/init.h>
10#include <linux/jump_label.h>
11#include <linux/libfdt.h>
12#include <linux/memblock.h>
13#include <linux/printk.h>
14#include <linux/sched.h>
15#include <linux/string.h>
16#include <linux/threads.h>
17
18#include <asm/cputable.h>
19#include <asm/dt_cpu_ftrs.h>
20#include <asm/mmu.h>
21#include <asm/oprofile_impl.h>
22#include <asm/prom.h>
23#include <asm/setup.h>
24
25
26
27#define ISA_V2_07B 2070
28#define ISA_V3_0B 3000
29
30#define USABLE_PR (1U << 0)
31#define USABLE_OS (1U << 1)
32#define USABLE_HV (1U << 2)
33
34#define HV_SUPPORT_HFSCR (1U << 0)
35#define OS_SUPPORT_FSCR (1U << 0)
36
37
38#define HV_SUPPORT_NONE 0xffffffffU
39#define OS_SUPPORT_NONE 0xffffffffU
40
41struct dt_cpu_feature {
42 const char *name;
43 uint32_t isa;
44 uint32_t usable_privilege;
45 uint32_t hv_support;
46 uint32_t os_support;
47 uint32_t hfscr_bit_nr;
48 uint32_t fscr_bit_nr;
49 uint32_t hwcap_bit_nr;
50
51 unsigned long node;
52 int enabled;
53 int disabled;
54};
55
56#define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
57
58#define COMMON_USER_BASE (PPC_FEATURE_32 | PPC_FEATURE_64 | \
59 PPC_FEATURE_ARCH_2_06 |\
60 PPC_FEATURE_ICACHE_SNOOP)
61#define COMMON_USER2_BASE (PPC_FEATURE2_ARCH_2_07 | \
62 PPC_FEATURE2_ISEL)
63
64
65
66
67extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
68extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
69
70static int hv_mode;
71
72static struct {
73 u64 lpcr;
74 u64 lpcr_clear;
75 u64 hfscr;
76 u64 fscr;
77} system_registers;
78
79static void (*init_pmu_registers)(void);
80
81static void __restore_cpu_cpufeatures(void)
82{
83 u64 lpcr;
84
85
86
87
88
89
90
91
92
93
94
95
96
97 lpcr = mfspr(SPRN_LPCR);
98 lpcr |= system_registers.lpcr;
99 lpcr &= ~system_registers.lpcr_clear;
100 mtspr(SPRN_LPCR, lpcr);
101 if (hv_mode) {
102 mtspr(SPRN_LPID, 0);
103 mtspr(SPRN_HFSCR, system_registers.hfscr);
104 mtspr(SPRN_PCR, PCR_MASK);
105 }
106 mtspr(SPRN_FSCR, system_registers.fscr);
107
108 if (init_pmu_registers)
109 init_pmu_registers();
110}
111
112static char dt_cpu_name[64];
113
114static struct cpu_spec __initdata base_cpu_spec = {
115 .cpu_name = NULL,
116 .cpu_features = CPU_FTRS_DT_CPU_BASE,
117 .cpu_user_features = COMMON_USER_BASE,
118 .cpu_user_features2 = COMMON_USER2_BASE,
119 .mmu_features = 0,
120 .icache_bsize = 32,
121 .dcache_bsize = 32,
122 .num_pmcs = 0,
123 .pmc_type = PPC_PMC_DEFAULT,
124 .oprofile_cpu_type = NULL,
125 .oprofile_type = PPC_OPROFILE_INVALID,
126 .cpu_setup = NULL,
127 .cpu_restore = __restore_cpu_cpufeatures,
128 .machine_check_early = NULL,
129 .platform = NULL,
130};
131
132static void __init cpufeatures_setup_cpu(void)
133{
134 set_cur_cpu_spec(&base_cpu_spec);
135
136 cur_cpu_spec->pvr_mask = -1;
137 cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
138
139
140 hv_mode = !!(mfmsr() & MSR_HV);
141 if (hv_mode) {
142
143 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
144 mtspr(SPRN_HFSCR, 0);
145 }
146 mtspr(SPRN_FSCR, 0);
147 mtspr(SPRN_PCR, PCR_MASK);
148
149
150
151
152
153
154}
155
156static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
157{
158 if (f->hv_support == HV_SUPPORT_NONE) {
159 } else if (f->hv_support & HV_SUPPORT_HFSCR) {
160 u64 hfscr = mfspr(SPRN_HFSCR);
161 hfscr |= 1UL << f->hfscr_bit_nr;
162 mtspr(SPRN_HFSCR, hfscr);
163 } else {
164
165 return 0;
166 }
167
168 if (f->os_support == OS_SUPPORT_NONE) {
169 } else if (f->os_support & OS_SUPPORT_FSCR) {
170 u64 fscr = mfspr(SPRN_FSCR);
171 fscr |= 1UL << f->fscr_bit_nr;
172 mtspr(SPRN_FSCR, fscr);
173 } else {
174
175 return 0;
176 }
177
178 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
179 uint32_t word = f->hwcap_bit_nr / 32;
180 uint32_t bit = f->hwcap_bit_nr % 32;
181
182 if (word == 0)
183 cur_cpu_spec->cpu_user_features |= 1U << bit;
184 else if (word == 1)
185 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
186 else
187 pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
188 }
189
190 return 1;
191}
192
193static int __init feat_enable(struct dt_cpu_feature *f)
194{
195 if (f->hv_support != HV_SUPPORT_NONE) {
196 if (f->hfscr_bit_nr != -1) {
197 u64 hfscr = mfspr(SPRN_HFSCR);
198 hfscr |= 1UL << f->hfscr_bit_nr;
199 mtspr(SPRN_HFSCR, hfscr);
200 }
201 }
202
203 if (f->os_support != OS_SUPPORT_NONE) {
204 if (f->fscr_bit_nr != -1) {
205 u64 fscr = mfspr(SPRN_FSCR);
206 fscr |= 1UL << f->fscr_bit_nr;
207 mtspr(SPRN_FSCR, fscr);
208 }
209 }
210
211 if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
212 uint32_t word = f->hwcap_bit_nr / 32;
213 uint32_t bit = f->hwcap_bit_nr % 32;
214
215 if (word == 0)
216 cur_cpu_spec->cpu_user_features |= 1U << bit;
217 else if (word == 1)
218 cur_cpu_spec->cpu_user_features2 |= 1U << bit;
219 else
220 pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
221 }
222
223 return 1;
224}
225
226static int __init feat_disable(struct dt_cpu_feature *f)
227{
228 return 0;
229}
230
231static int __init feat_enable_hv(struct dt_cpu_feature *f)
232{
233 u64 lpcr;
234
235 if (!hv_mode) {
236 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
237 return 0;
238 }
239
240 mtspr(SPRN_LPID, 0);
241
242 lpcr = mfspr(SPRN_LPCR);
243 lpcr &= ~LPCR_LPES0;
244 mtspr(SPRN_LPCR, lpcr);
245
246 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
247
248 return 1;
249}
250
251static int __init feat_enable_le(struct dt_cpu_feature *f)
252{
253 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
254 return 1;
255}
256
257static int __init feat_enable_smt(struct dt_cpu_feature *f)
258{
259 cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
260 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
261 return 1;
262}
263
264static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
265{
266 u64 lpcr;
267
268
269 lpcr = mfspr(SPRN_LPCR);
270 lpcr |= LPCR_PECE0;
271 lpcr |= LPCR_PECE1;
272 lpcr |= LPCR_PECE2;
273 mtspr(SPRN_LPCR, lpcr);
274
275 return 1;
276}
277
278static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
279{
280 cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
281
282 return 1;
283}
284
285static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
286{
287 u64 lpcr;
288
289
290 lpcr = mfspr(SPRN_LPCR);
291 lpcr |= LPCR_PECE0;
292 lpcr |= LPCR_PECE1;
293 lpcr |= LPCR_PECE2;
294 mtspr(SPRN_LPCR, lpcr);
295
296 return 1;
297}
298
299static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
300{
301 u64 lpcr;
302
303 lpcr = mfspr(SPRN_LPCR);
304 lpcr &= ~LPCR_ISL;
305
306
307 lpcr |= LPCR_VPM0;
308 lpcr &= ~LPCR_VPM1;
309 lpcr |= 0x10UL << LPCR_VRMASD_SH;
310 mtspr(SPRN_LPCR, lpcr);
311
312 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
313 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
314
315 return 1;
316}
317
318static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
319{
320 u64 lpcr;
321
322 system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
323 lpcr = mfspr(SPRN_LPCR);
324 lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
325 mtspr(SPRN_LPCR, lpcr);
326
327 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
328 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
329
330 return 1;
331}
332
333
334static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
335{
336#ifdef CONFIG_PPC_RADIX_MMU
337 cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
338 cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
339 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
340
341 return 1;
342#endif
343 return 0;
344}
345
346static int __init feat_enable_dscr(struct dt_cpu_feature *f)
347{
348 u64 lpcr;
349
350 feat_enable(f);
351
352 lpcr = mfspr(SPRN_LPCR);
353 lpcr &= ~LPCR_DPFD;
354 lpcr |= (4UL << LPCR_DPFD_SH);
355 mtspr(SPRN_LPCR, lpcr);
356
357 return 1;
358}
359
360static void hfscr_pmu_enable(void)
361{
362 u64 hfscr = mfspr(SPRN_HFSCR);
363 hfscr |= PPC_BIT(60);
364 mtspr(SPRN_HFSCR, hfscr);
365}
366
367static void init_pmu_power8(void)
368{
369 if (hv_mode) {
370 mtspr(SPRN_MMCRC, 0);
371 mtspr(SPRN_MMCRH, 0);
372 }
373
374 mtspr(SPRN_MMCRA, 0);
375 mtspr(SPRN_MMCR0, 0);
376 mtspr(SPRN_MMCR1, 0);
377 mtspr(SPRN_MMCR2, 0);
378 mtspr(SPRN_MMCRS, 0);
379}
380
381static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
382{
383 cur_cpu_spec->platform = "power8";
384 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
385
386 return 1;
387}
388
389static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
390{
391 hfscr_pmu_enable();
392
393 init_pmu_power8();
394 init_pmu_registers = init_pmu_power8;
395
396 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
397 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
398 if (pvr_version_is(PVR_POWER8E))
399 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
400
401 cur_cpu_spec->num_pmcs = 6;
402 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
403 cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
404
405 return 1;
406}
407
408static void init_pmu_power9(void)
409{
410 if (hv_mode)
411 mtspr(SPRN_MMCRC, 0);
412
413 mtspr(SPRN_MMCRA, 0);
414 mtspr(SPRN_MMCR0, 0);
415 mtspr(SPRN_MMCR1, 0);
416 mtspr(SPRN_MMCR2, 0);
417}
418
419static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
420{
421 cur_cpu_spec->platform = "power9";
422 cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
423
424 return 1;
425}
426
427static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
428{
429 hfscr_pmu_enable();
430
431 init_pmu_power9();
432 init_pmu_registers = init_pmu_power9;
433
434 cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
435 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
436
437 cur_cpu_spec->num_pmcs = 6;
438 cur_cpu_spec->pmc_type = PPC_PMC_IBM;
439 cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
440
441 return 1;
442}
443
444static int __init feat_enable_tm(struct dt_cpu_feature *f)
445{
446#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
447 feat_enable(f);
448 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
449 return 1;
450#endif
451 return 0;
452}
453
454static int __init feat_enable_fp(struct dt_cpu_feature *f)
455{
456 feat_enable(f);
457 cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
458
459 return 1;
460}
461
462static int __init feat_enable_vector(struct dt_cpu_feature *f)
463{
464#ifdef CONFIG_ALTIVEC
465 feat_enable(f);
466 cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
467 cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
468 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
469
470 return 1;
471#endif
472 return 0;
473}
474
475static int __init feat_enable_vsx(struct dt_cpu_feature *f)
476{
477#ifdef CONFIG_VSX
478 feat_enable(f);
479 cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
480 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
481
482 return 1;
483#endif
484 return 0;
485}
486
487static int __init feat_enable_purr(struct dt_cpu_feature *f)
488{
489 cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
490
491 return 1;
492}
493
494static int __init feat_enable_ebb(struct dt_cpu_feature *f)
495{
496
497
498
499
500
501
502 f->hwcap_bit_nr = -1;
503 feat_enable(f);
504
505 return 1;
506}
507
508static int __init feat_enable_dbell(struct dt_cpu_feature *f)
509{
510 u64 lpcr;
511
512
513 feat_enable(f);
514
515 cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
516
517 lpcr = mfspr(SPRN_LPCR);
518 lpcr |= LPCR_PECEDH;
519 mtspr(SPRN_LPCR, lpcr);
520
521 return 1;
522}
523
524static int __init feat_enable_hvi(struct dt_cpu_feature *f)
525{
526 u64 lpcr;
527
528
529
530
531
532
533
534
535
536
537
538
539
540 lpcr = mfspr(SPRN_LPCR);
541 lpcr |= LPCR_HVICE;
542 lpcr |= LPCR_HEIC;
543 lpcr |= LPCR_PECE_HVEE;
544 mtspr(SPRN_LPCR, lpcr);
545
546 return 1;
547}
548
549static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
550{
551 cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
552
553 return 1;
554}
555
556struct dt_cpu_feature_match {
557 const char *name;
558 int (*enable)(struct dt_cpu_feature *f);
559 u64 cpu_ftr_bit_mask;
560};
561
562static struct dt_cpu_feature_match __initdata
563 dt_cpu_feature_match_table[] = {
564 {"hypervisor", feat_enable_hv, 0},
565 {"big-endian", feat_enable, 0},
566 {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
567 {"smt", feat_enable_smt, 0},
568 {"interrupt-facilities", feat_enable, 0},
569 {"timer-facilities", feat_enable, 0},
570 {"timer-facilities-v3", feat_enable, 0},
571 {"debug-facilities", feat_enable, 0},
572 {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
573 {"branch-tracing", feat_enable, 0},
574 {"floating-point", feat_enable_fp, 0},
575 {"vector", feat_enable_vector, 0},
576 {"vector-scalar", feat_enable_vsx, 0},
577 {"vector-scalar-v3", feat_enable, 0},
578 {"decimal-floating-point", feat_enable, 0},
579 {"decimal-integer", feat_enable, 0},
580 {"quadword-load-store", feat_enable, 0},
581 {"vector-crypto", feat_enable, 0},
582 {"mmu-hash", feat_enable_mmu_hash, 0},
583 {"mmu-radix", feat_enable_mmu_radix, 0},
584 {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
585 {"virtual-page-class-key-protection", feat_enable, 0},
586 {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
587 {"transactional-memory-v3", feat_enable_tm, 0},
588 {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
589 {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
590 {"idle-nap", feat_enable_idle_nap, 0},
591 {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
592 {"idle-stop", feat_enable_idle_stop, 0},
593 {"machine-check-power8", feat_enable_mce_power8, 0},
594 {"performance-monitor-power8", feat_enable_pmu_power8, 0},
595 {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
596 {"event-based-branch", feat_enable_ebb, 0},
597 {"target-address-register", feat_enable, 0},
598 {"branch-history-rolling-buffer", feat_enable, 0},
599 {"control-register", feat_enable, CPU_FTR_CTRL},
600 {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
601 {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
602 {"processor-utilization-of-resources-register", feat_enable_purr, 0},
603 {"no-execute", feat_enable, 0},
604 {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
605 {"cache-inhibited-large-page", feat_enable_large_ci, 0},
606 {"coprocessor-icswx", feat_enable, 0},
607 {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
608 {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
609 {"wait", feat_enable, 0},
610 {"atomic-memory-operations", feat_enable, 0},
611 {"branch-v3", feat_enable, 0},
612 {"copy-paste", feat_enable, 0},
613 {"decimal-floating-point-v3", feat_enable, 0},
614 {"decimal-integer-v3", feat_enable, 0},
615 {"fixed-point-v3", feat_enable, 0},
616 {"floating-point-v3", feat_enable, 0},
617 {"group-start-register", feat_enable, 0},
618 {"pc-relative-addressing", feat_enable, 0},
619 {"machine-check-power9", feat_enable_mce_power9, 0},
620 {"performance-monitor-power9", feat_enable_pmu_power9, 0},
621 {"event-based-branch-v3", feat_enable, 0},
622 {"random-number-generator", feat_enable, 0},
623 {"system-call-vectored", feat_disable, 0},
624 {"trace-interrupt-v3", feat_enable, 0},
625 {"vector-v3", feat_enable, 0},
626 {"vector-binary128", feat_enable, 0},
627 {"vector-binary16", feat_enable, 0},
628 {"wait-v3", feat_enable, 0},
629};
630
631static bool __initdata using_dt_cpu_ftrs;
632static bool __initdata enable_unknown = true;
633
634static int __init dt_cpu_ftrs_parse(char *str)
635{
636 if (!str)
637 return 0;
638
639 if (!strcmp(str, "off"))
640 using_dt_cpu_ftrs = false;
641 else if (!strcmp(str, "known"))
642 enable_unknown = false;
643 else
644 return 1;
645
646 return 0;
647}
648early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
649
650static void __init cpufeatures_setup_start(u32 isa)
651{
652 pr_info("setup for ISA %d\n", isa);
653
654 if (isa >= 3000) {
655 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
656 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
657 }
658}
659
660static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
661{
662 const struct dt_cpu_feature_match *m;
663 bool known = false;
664 int i;
665
666 for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
667 m = &dt_cpu_feature_match_table[i];
668 if (!strcmp(f->name, m->name)) {
669 known = true;
670 if (m->enable(f)) {
671 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
672 break;
673 }
674
675 pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
676 f->name);
677 return false;
678 }
679 }
680
681 if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) {
682 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
683 f->name);
684 return false;
685 }
686
687 if (known)
688 pr_debug("enabling: %s\n", f->name);
689 else
690 pr_debug("enabling: %s (unknown)\n", f->name);
691
692 return true;
693}
694
695
696
697
698
699static __init void update_tlbie_feature_flag(unsigned long pvr)
700{
701 if (PVR_VER(pvr) == PVR_POWER9) {
702
703
704
705
706 if ((pvr & 0xe000) == 0) {
707
708 if ((pvr & 0xfff) < 0x203)
709 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
710 } else if ((pvr & 0xc000) == 0) {
711
712 if ((pvr & 0xfff) < 0x103)
713 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
714 } else {
715 WARN_ONCE(1, "Unknown PVR");
716 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
717 }
718
719 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
720 }
721}
722
723static __init void cpufeatures_cpu_quirks(void)
724{
725 unsigned long version = mfspr(SPRN_PVR);
726
727
728
729
730 if ((version & 0xffffefff) == 0x004e0200) {
731
732 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
733 } else if ((version & 0xffffefff) == 0x004e0201) {
734 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
735 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
736 } else if ((version & 0xffffefff) == 0x004e0202) {
737 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
738 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
739 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
740 } else if ((version & 0xffff0000) == 0x004e0000) {
741
742 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
743 }
744
745 if ((version & 0xffff0000) == 0x004e0000) {
746 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
747 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
748 }
749
750 update_tlbie_feature_flag(version);
751
752
753
754
755
756 cur_cpu_spec->cpu_features |= CPU_FTR_PKEY;
757}
758
759static void __init cpufeatures_setup_finished(void)
760{
761 cpufeatures_cpu_quirks();
762
763 if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
764 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
765 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
766 }
767
768
769 powerpc_base_platform = cur_cpu_spec->platform;
770
771 system_registers.lpcr = mfspr(SPRN_LPCR);
772 system_registers.hfscr = mfspr(SPRN_HFSCR);
773 system_registers.fscr = mfspr(SPRN_FSCR);
774
775 pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
776 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
777}
778
779static int __init disabled_on_cmdline(void)
780{
781 unsigned long root, chosen;
782 const char *p;
783
784 root = of_get_flat_dt_root();
785 chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
786 if (chosen == -FDT_ERR_NOTFOUND)
787 return false;
788
789 p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
790 if (!p)
791 return false;
792
793 if (strstr(p, "dt_cpu_ftrs=off"))
794 return true;
795
796 return false;
797}
798
799static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
800 int depth, void *data)
801{
802 if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
803 && of_get_flat_dt_prop(node, "isa", NULL))
804 return 1;
805
806 return 0;
807}
808
809bool __init dt_cpu_ftrs_in_use(void)
810{
811 return using_dt_cpu_ftrs;
812}
813
814bool __init dt_cpu_ftrs_init(void *fdt)
815{
816 using_dt_cpu_ftrs = false;
817
818
819 if (!early_init_dt_verify(fdt))
820 return false;
821
822 if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
823 return false;
824
825 if (disabled_on_cmdline())
826 return false;
827
828 cpufeatures_setup_cpu();
829
830 using_dt_cpu_ftrs = true;
831 return true;
832}
833
834static int nr_dt_cpu_features;
835static struct dt_cpu_feature *dt_cpu_features;
836
837static int __init process_cpufeatures_node(unsigned long node,
838 const char *uname, int i)
839{
840 const __be32 *prop;
841 struct dt_cpu_feature *f;
842 int len;
843
844 f = &dt_cpu_features[i];
845
846 f->node = node;
847
848 f->name = uname;
849
850 prop = of_get_flat_dt_prop(node, "isa", &len);
851 if (!prop) {
852 pr_warn("%s: missing isa property\n", uname);
853 return 0;
854 }
855 f->isa = be32_to_cpup(prop);
856
857 prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
858 if (!prop) {
859 pr_warn("%s: missing usable-privilege property", uname);
860 return 0;
861 }
862 f->usable_privilege = be32_to_cpup(prop);
863
864 prop = of_get_flat_dt_prop(node, "hv-support", &len);
865 if (prop)
866 f->hv_support = be32_to_cpup(prop);
867 else
868 f->hv_support = HV_SUPPORT_NONE;
869
870 prop = of_get_flat_dt_prop(node, "os-support", &len);
871 if (prop)
872 f->os_support = be32_to_cpup(prop);
873 else
874 f->os_support = OS_SUPPORT_NONE;
875
876 prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
877 if (prop)
878 f->hfscr_bit_nr = be32_to_cpup(prop);
879 else
880 f->hfscr_bit_nr = -1;
881 prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
882 if (prop)
883 f->fscr_bit_nr = be32_to_cpup(prop);
884 else
885 f->fscr_bit_nr = -1;
886 prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
887 if (prop)
888 f->hwcap_bit_nr = be32_to_cpup(prop);
889 else
890 f->hwcap_bit_nr = -1;
891
892 if (f->usable_privilege & USABLE_HV) {
893 if (!(mfmsr() & MSR_HV)) {
894 pr_warn("%s: HV feature passed to guest\n", uname);
895 return 0;
896 }
897
898 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
899 pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
900 return 0;
901 }
902
903 if (f->hv_support == HV_SUPPORT_HFSCR) {
904 if (f->hfscr_bit_nr == -1) {
905 pr_warn("%s: missing hfscr_bit_nr\n", uname);
906 return 0;
907 }
908 }
909 } else {
910 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
911 pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
912 return 0;
913 }
914 }
915
916 if (f->usable_privilege & USABLE_OS) {
917 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
918 pr_warn("%s: unwanted fscr_bit_nr\n", uname);
919 return 0;
920 }
921
922 if (f->os_support == OS_SUPPORT_FSCR) {
923 if (f->fscr_bit_nr == -1) {
924 pr_warn("%s: missing fscr_bit_nr\n", uname);
925 return 0;
926 }
927 }
928 } else {
929 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
930 pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
931 return 0;
932 }
933 }
934
935 if (!(f->usable_privilege & USABLE_PR)) {
936 if (f->hwcap_bit_nr != -1) {
937 pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
938 return 0;
939 }
940 }
941
942
943 if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
944 if (cpufeatures_process_feature(f))
945 f->enabled = 1;
946 else
947 f->disabled = 1;
948 }
949
950 return 0;
951}
952
953static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
954{
955 const __be32 *prop;
956 int len;
957 int nr_deps;
958 int i;
959
960 if (f->enabled || f->disabled)
961 return;
962
963 prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
964 if (!prop) {
965 pr_warn("%s: missing dependencies property", f->name);
966 return;
967 }
968
969 nr_deps = len / sizeof(int);
970
971 for (i = 0; i < nr_deps; i++) {
972 unsigned long phandle = be32_to_cpu(prop[i]);
973 int j;
974
975 for (j = 0; j < nr_dt_cpu_features; j++) {
976 struct dt_cpu_feature *d = &dt_cpu_features[j];
977
978 if (of_get_flat_dt_phandle(d->node) == phandle) {
979 cpufeatures_deps_enable(d);
980 if (d->disabled) {
981 f->disabled = 1;
982 return;
983 }
984 }
985 }
986 }
987
988 if (cpufeatures_process_feature(f))
989 f->enabled = 1;
990 else
991 f->disabled = 1;
992}
993
994static int __init scan_cpufeatures_subnodes(unsigned long node,
995 const char *uname,
996 void *data)
997{
998 int *count = data;
999
1000 process_cpufeatures_node(node, uname, *count);
1001
1002 (*count)++;
1003
1004 return 0;
1005}
1006
1007static int __init count_cpufeatures_subnodes(unsigned long node,
1008 const char *uname,
1009 void *data)
1010{
1011 int *count = data;
1012
1013 (*count)++;
1014
1015 return 0;
1016}
1017
1018static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1019 *uname, int depth, void *data)
1020{
1021 const __be32 *prop;
1022 int count, i;
1023 u32 isa;
1024
1025
1026 if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1027 return 0;
1028
1029 prop = of_get_flat_dt_prop(node, "isa", NULL);
1030 if (!prop)
1031
1032 return 0;
1033
1034 isa = be32_to_cpup(prop);
1035
1036
1037 of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1038 &nr_dt_cpu_features);
1039 dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);
1040 if (!dt_cpu_features)
1041 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
1042 __func__,
1043 sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,
1044 PAGE_SIZE);
1045
1046 cpufeatures_setup_start(isa);
1047
1048
1049 count = 0;
1050 of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1051
1052
1053 for (i = 0; i < nr_dt_cpu_features; i++) {
1054 struct dt_cpu_feature *f = &dt_cpu_features[i];
1055
1056 cpufeatures_deps_enable(f);
1057 }
1058
1059 prop = of_get_flat_dt_prop(node, "display-name", NULL);
1060 if (prop && strlen((char *)prop) != 0) {
1061 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1062 cur_cpu_spec->cpu_name = dt_cpu_name;
1063 }
1064
1065 cpufeatures_setup_finished();
1066
1067 memblock_free(__pa(dt_cpu_features),
1068 sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1069
1070 return 0;
1071}
1072
1073void __init dt_cpu_ftrs_scan(void)
1074{
1075 if (!using_dt_cpu_ftrs)
1076 return;
1077
1078 of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1079}
1080
