LXR linux/drivers/gpu/drm/amd/display/dc/dc

   1/*
   2 * Copyright 2012-14 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef DC_STREAM_H_
  27#define DC_STREAM_H_
  28
  29#include "dc_types.h"
  30#include "grph_object_defs.h"
  31
  32/*******************************************************************************
  33 * Stream Interfaces
  34 ******************************************************************************/
  35struct timing_sync_info {
  36        int group_id;
  37        int group_size;
  38        bool master;
  39};
  40
  41struct dc_stream_status {
  42        int primary_otg_inst;
  43        int stream_enc_inst;
  44        int plane_count;
  45        int audio_inst;
  46        struct timing_sync_info timing_sync_info;
  47        struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
  48};
  49
  50// TODO: References to this needs to be removed..
  51struct freesync_context {
  52        bool dummy;
  53};
  54
  55enum hubp_dmdata_mode {
  56        DMDATA_SW_MODE,
  57        DMDATA_HW_MODE
  58};
  59
  60struct dc_dmdata_attributes {
  61        /* Specifies whether dynamic meta data will be updated by software
  62         * or has to be fetched by hardware (DMA mode)
  63         */
  64        enum hubp_dmdata_mode dmdata_mode;
  65        /* Specifies if current dynamic meta data is to be used only for the current frame */
  66        bool dmdata_repeat;
  67        /* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
  68        uint32_t dmdata_size;
  69        /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
  70        bool dmdata_updated;
  71        /* If hardware mode is used, the base address where DMDATA surface is located */
  72        PHYSICAL_ADDRESS_LOC address;
  73        /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
  74        bool dmdata_qos_mode;
  75        /* If qos_mode = 1, this is the QOS value to be used: */
  76        uint32_t dmdata_qos_level;
  77        /* Specifies the value in unit of REFCLK cycles to be added to the
  78         * current time to produce the Amortized deadline for Dynamic Metadata chunk request
  79         */
  80        uint32_t dmdata_dl_delta;
  81        /* An unbounded array of uint32s, represents software dmdata to be loaded */
  82        uint32_t *dmdata_sw_data;
  83};
  84
  85struct dc_writeback_info {
  86        bool wb_enabled;
  87        int dwb_pipe_inst;
  88        struct dc_dwb_params dwb_params;
  89        struct mcif_buf_params mcif_buf_params;
  90};
  91
  92struct dc_writeback_update {
  93        unsigned int num_wb_info;
  94        struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
  95};
  96
  97enum vertical_interrupt_ref_point {
  98        START_V_UPDATE = 0,
  99        START_V_SYNC,
 100        INVALID_POINT
 101
 102        //For now, only v_update interrupt is used.
 103        //START_V_BLANK,
 104        //START_V_ACTIVE
 105};
 106
 107struct periodic_interrupt_config {
 108        enum vertical_interrupt_ref_point ref_point;
 109        int lines_offset;
 110};
 111
 112union stream_update_flags {
 113        struct {
 114                uint32_t scaling:1;
 115                uint32_t out_tf:1;
 116                uint32_t out_csc:1;
 117                uint32_t abm_level:1;
 118                uint32_t dpms_off:1;
 119                uint32_t gamut_remap:1;
 120                uint32_t wb_update:1;
 121        } bits;
 122
 123        uint32_t raw;
 124};
 125
 126struct dc_stream_state {
 127        // sink is deprecated, new code should not reference
 128        // this pointer
 129        struct dc_sink *sink;
 130
 131        struct dc_link *link;
 132        struct dc_panel_patch sink_patches;
 133        union display_content_support content_support;
 134        struct dc_crtc_timing timing;
 135        struct dc_crtc_timing_adjust adjust;
 136        struct dc_info_packet vrr_infopacket;
 137        struct dc_info_packet vsc_infopacket;
 138        struct dc_info_packet vsp_infopacket;
 139
 140        struct rect src; /* composition area */
 141        struct rect dst; /* stream addressable area */
 142
 143        // TODO: References to this needs to be removed..
 144        struct freesync_context freesync_ctx;
 145
 146        struct audio_info audio_info;
 147
 148        struct dc_info_packet hdr_static_metadata;
 149        PHYSICAL_ADDRESS_LOC dmdata_address;
 150        bool   use_dynamic_meta;
 151
 152        struct dc_transfer_func *out_transfer_func;
 153        struct colorspace_transform gamut_remap_matrix;
 154        struct dc_csc_transform csc_color_matrix;
 155
 156        enum dc_color_space output_color_space;
 157        enum dc_dither_option dither_option;
 158
 159        enum view_3d_format view_format;
 160
 161        bool use_vsc_sdp_for_colorimetry;
 162        bool ignore_msa_timing_param;
 163        bool converter_disable_audio;
 164        uint8_t qs_bit;
 165        uint8_t qy_bit;
 166
 167        /* TODO: custom INFO packets */
 168        /* TODO: ABM info (DMCU) */
 169        /* PSR info */
 170        unsigned char psr_version;
 171        /* TODO: CEA VIC */
 172
 173        /* DMCU info */
 174        unsigned int abm_level;
 175
 176        struct periodic_interrupt_config periodic_interrupt0;
 177        struct periodic_interrupt_config periodic_interrupt1;
 178
 179        /* from core_stream struct */
 180        struct dc_context *ctx;
 181
 182        /* used by DCP and FMT */
 183        struct bit_depth_reduction_params bit_depth_params;
 184        struct clamping_and_pixel_encoding_params clamping;
 185
 186        int phy_pix_clk;
 187        enum signal_type signal;
 188        bool dpms_off;
 189
 190        void *dm_stream_context;
 191
 192        struct dc_cursor_attributes cursor_attributes;
 193        struct dc_cursor_position cursor_position;
 194        uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
 195
 196        /* from stream struct */
 197        struct kref refcount;
 198
 199        struct crtc_trigger_info triggered_crtc_reset;
 200
 201        /* writeback */
 202        unsigned int num_wb_info;
 203        struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
 204        /* Computed state bits */
 205        bool mode_changed : 1;
 206
 207        /* Output from DC when stream state is committed or altered
 208         * DC may only access these values during:
 209         * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
 210         * values may not change outside of those calls
 211         */
 212        struct {
 213                // For interrupt management, some hardware instance
 214                // offsets need to be exposed to DM
 215                uint8_t otg_offset;
 216        } out;
 217
 218        bool apply_edp_fast_boot_optimization;
 219        bool apply_seamless_boot_optimization;
 220
 221        uint32_t stream_id;
 222        bool is_dsc_enabled;
 223        union stream_update_flags update_flags;
 224};
 225
 226#define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
 227
 228struct dc_stream_update {
 229        struct dc_stream_state *stream;
 230
 231        struct rect src;
 232        struct rect dst;
 233        struct dc_transfer_func *out_transfer_func;
 234        struct dc_info_packet *hdr_static_metadata;
 235        unsigned int *abm_level;
 236
 237        struct periodic_interrupt_config *periodic_interrupt0;
 238        struct periodic_interrupt_config *periodic_interrupt1;
 239
 240        struct dc_info_packet *vrr_infopacket;
 241        struct dc_info_packet *vsc_infopacket;
 242        struct dc_info_packet *vsp_infopacket;
 243
 244        bool *dpms_off;
 245        bool integer_scaling_update;
 246
 247        struct colorspace_transform *gamut_remap;
 248        enum dc_color_space *output_color_space;
 249        enum dc_dither_option *dither_option;
 250
 251        struct dc_csc_transform *output_csc_transform;
 252
 253        struct dc_writeback_update *wb_update;
 254        struct dc_dsc_config *dsc_config;
 255};
 256
 257bool dc_is_stream_unchanged(
 258        struct dc_stream_state *old_stream, struct dc_stream_state *stream);
 259bool dc_is_stream_scaling_unchanged(
 260        struct dc_stream_state *old_stream, struct dc_stream_state *stream);
 261
 262/*
 263 * Set up surface attributes and associate to a stream
 264 * The surfaces parameter is an absolute set of all surface active for the stream.
 265 * If no surfaces are provided, the stream will be blanked; no memory read.
 266 * Any flip related attribute changes must be done through this interface.
 267 *
 268 * After this call:
 269 *   Surfaces attributes are programmed and configured to be composed into stream.
 270 *   This does not trigger a flip.  No surface address is programmed.
 271 */
 272
 273void dc_commit_updates_for_stream(struct dc *dc,
 274                struct dc_surface_update *srf_updates,
 275                int surface_count,
 276                struct dc_stream_state *stream,
 277                struct dc_stream_update *stream_update,
 278                struct dc_state *state);
 279/*
 280 * Log the current stream state.
 281 */
 282void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
 283
 284uint8_t dc_get_current_stream_count(struct dc *dc);
 285struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
 286
 287/*
 288 * Return the current frame counter.
 289 */
 290uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
 291
 292/*
 293 * Send dp sdp message.
 294 */
 295bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
 296                const uint8_t *custom_sdp_message,
 297                unsigned int sdp_message_size);
 298
 299/* TODO: Return parsed values rather than direct register read
 300 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
 301 * being refactored properly to be dce-specific
 302 */
 303bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
 304                                  uint32_t *v_blank_start,
 305                                  uint32_t *v_blank_end,
 306                                  uint32_t *h_position,
 307                                  uint32_t *v_position);
 308
 309enum dc_status dc_add_stream_to_ctx(
 310                        struct dc *dc,
 311                struct dc_state *new_ctx,
 312                struct dc_stream_state *stream);
 313
 314enum dc_status dc_remove_stream_from_ctx(
 315                struct dc *dc,
 316                        struct dc_state *new_ctx,
 317                        struct dc_stream_state *stream);
 318
 319
 320bool dc_add_plane_to_context(
 321                const struct dc *dc,
 322                struct dc_stream_state *stream,
 323                struct dc_plane_state *plane_state,
 324                struct dc_state *context);
 325
 326bool dc_remove_plane_from_context(
 327                const struct dc *dc,
 328                struct dc_stream_state *stream,
 329                struct dc_plane_state *plane_state,
 330                struct dc_state *context);
 331
 332bool dc_rem_all_planes_for_stream(
 333                const struct dc *dc,
 334                struct dc_stream_state *stream,
 335                struct dc_state *context);
 336
 337bool dc_add_all_planes_for_stream(
 338                const struct dc *dc,
 339                struct dc_stream_state *stream,
 340                struct dc_plane_state * const *plane_states,
 341                int plane_count,
 342                struct dc_state *context);
 343
 344bool dc_stream_add_writeback(struct dc *dc,
 345                struct dc_stream_state *stream,
 346                struct dc_writeback_info *wb_info);
 347
 348bool dc_stream_remove_writeback(struct dc *dc,
 349                struct dc_stream_state *stream,
 350                uint32_t dwb_pipe_inst);
 351
 352bool dc_stream_warmup_writeback(struct dc *dc,
 353                int num_dwb,
 354                struct dc_writeback_info *wb_info);
 355
 356bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
 357
 358bool dc_stream_set_dynamic_metadata(struct dc *dc,
 359                struct dc_stream_state *stream,
 360                struct dc_dmdata_attributes *dmdata_attr);
 361
 362enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
 363
 364/*
 365 * Set up streams and links associated to drive sinks
 366 * The streams parameter is an absolute set of all active streams.
 367 *
 368 * After this call:
 369 *   Phy, Encoder, Timing Generator are programmed and enabled.
 370 *   New streams are enabled with blank stream; no memory read.
 371 */
 372/*
 373 * Enable stereo when commit_streams is not required,
 374 * for example, frame alternate.
 375 */
 376bool dc_enable_stereo(
 377        struct dc *dc,
 378        struct dc_state *context,
 379        struct dc_stream_state *streams[],
 380        uint8_t stream_count);
 381
 382
 383enum surface_update_type dc_check_update_surfaces_for_stream(
 384                struct dc *dc,
 385                struct dc_surface_update *updates,
 386                int surface_count,
 387                struct dc_stream_update *stream_update,
 388                const struct dc_stream_status *stream_status);
 389
 390/**
 391 * Create a new default stream for the requested sink
 392 */
 393struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
 394
 395struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
 396
 397void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
 398
 399void dc_stream_retain(struct dc_stream_state *dc_stream);
 400void dc_stream_release(struct dc_stream_state *dc_stream);
 401
 402struct dc_stream_status *dc_stream_get_status_from_state(
 403        struct dc_state *state,
 404        struct dc_stream_state *stream);
 405struct dc_stream_status *dc_stream_get_status(
 406        struct dc_stream_state *dc_stream);
 407
 408/*******************************************************************************
 409 * Cursor interfaces - To manages the cursor within a stream
 410 ******************************************************************************/
 411/* TODO: Deprecated once we switch to dc_set_cursor_position */
 412bool dc_stream_set_cursor_attributes(
 413        struct dc_stream_state *stream,
 414        const struct dc_cursor_attributes *attributes);
 415
 416bool dc_stream_set_cursor_position(
 417        struct dc_stream_state *stream,
 418        const struct dc_cursor_position *position);
 419
 420
 421bool dc_stream_adjust_vmin_vmax(struct dc *dc,
 422                                struct dc_stream_state *stream,
 423                                struct dc_crtc_timing_adjust *adjust);
 424
 425bool dc_stream_get_crtc_position(struct dc *dc,
 426                                 struct dc_stream_state **stream,
 427                                 int num_streams,
 428                                 unsigned int *v_pos,
 429                                 unsigned int *nom_v_pos);
 430
 431bool dc_stream_configure_crc(struct dc *dc,
 432                             struct dc_stream_state *stream,
 433                             bool enable,
 434                             bool continuous);
 435
 436bool dc_stream_get_crc(struct dc *dc,
 437                       struct dc_stream_state *stream,
 438                       uint32_t *r_cr,
 439                       uint32_t *g_y,
 440                       uint32_t *b_cb);
 441
 442void dc_stream_set_static_screen_params(struct dc *dc,
 443                                        struct dc_stream_state **stream,
 444                                        int num_streams,
 445                                        const struct dc_static_screen_params *params);
 446
 447void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
 448                enum dc_dynamic_expansion option);
 449
 450void dc_stream_set_dither_option(struct dc_stream_state *stream,
 451                                 enum dc_dither_option option);
 452
 453bool dc_stream_set_gamut_remap(struct dc *dc,
 454                               const struct dc_stream_state *stream);
 455
 456bool dc_stream_program_csc_matrix(struct dc *dc,
 457                                  struct dc_stream_state *stream);
 458
 459bool dc_stream_get_crtc_position(struct dc *dc,
 460                                 struct dc_stream_state **stream,
 461                                 int num_streams,
 462                                 unsigned int *v_pos,
 463                                 unsigned int *nom_v_pos);
 464
 465#endif /* DC_STREAM_H_ */
 466