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13#include <drm/drm_modes.h>
14#include <drm/drm_panel.h>
15#include <drm/drm_print.h>
16
17#include <linux/bitops.h>
18#include <linux/delay.h>
19#include <linux/gpio/consumer.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/of.h>
24#include <linux/platform_device.h>
25#include <linux/spi/spi.h>
26
27#define TPG110_TEST 0x00
28#define TPG110_CHIPID 0x01
29#define TPG110_CTRL1 0x02
30#define TPG110_RES_MASK GENMASK(2, 0)
31#define TPG110_RES_800X480 0x07
32#define TPG110_RES_640X480 0x06
33#define TPG110_RES_480X272 0x05
34#define TPG110_RES_480X640 0x04
35#define TPG110_RES_480X272_D 0x01
36#define TPG110_RES_400X240_D 0x00
37#define TPG110_CTRL2 0x03
38#define TPG110_CTRL2_PM BIT(0)
39#define TPG110_CTRL2_RES_PM_CTRL BIT(7)
40
41
42
43
44struct tpg110_panel_mode {
45
46
47
48 const char *name;
49
50
51
52 u32 magic;
53
54
55
56 struct drm_display_mode mode;
57
58
59
60 u32 bus_flags;
61};
62
63
64
65
66struct tpg110 {
67
68
69
70 struct device *dev;
71
72
73
74 struct spi_device *spi;
75
76
77
78 struct drm_panel panel;
79
80
81
82 const struct tpg110_panel_mode *panel_mode;
83
84
85
86 u32 width;
87
88
89
90 u32 height;
91
92
93
94 struct gpio_desc *grestb;
95};
96
97
98
99
100
101static const struct tpg110_panel_mode tpg110_modes[] = {
102 {
103 .name = "800x480 RGB",
104 .magic = TPG110_RES_800X480,
105 .mode = {
106 .clock = 33200,
107 .hdisplay = 800,
108 .hsync_start = 800 + 40,
109 .hsync_end = 800 + 40 + 1,
110 .htotal = 800 + 40 + 1 + 216,
111 .vdisplay = 480,
112 .vsync_start = 480 + 10,
113 .vsync_end = 480 + 10 + 1,
114 .vtotal = 480 + 10 + 1 + 35,
115 .vrefresh = 60,
116 },
117 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
118 },
119 {
120 .name = "640x480 RGB",
121 .magic = TPG110_RES_640X480,
122 .mode = {
123 .clock = 25200,
124 .hdisplay = 640,
125 .hsync_start = 640 + 24,
126 .hsync_end = 640 + 24 + 1,
127 .htotal = 640 + 24 + 1 + 136,
128 .vdisplay = 480,
129 .vsync_start = 480 + 18,
130 .vsync_end = 480 + 18 + 1,
131 .vtotal = 480 + 18 + 1 + 27,
132 .vrefresh = 60,
133 },
134 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
135 },
136 {
137 .name = "480x272 RGB",
138 .magic = TPG110_RES_480X272,
139 .mode = {
140 .clock = 9000,
141 .hdisplay = 480,
142 .hsync_start = 480 + 2,
143 .hsync_end = 480 + 2 + 1,
144 .htotal = 480 + 2 + 1 + 43,
145 .vdisplay = 272,
146 .vsync_start = 272 + 2,
147 .vsync_end = 272 + 2 + 1,
148 .vtotal = 272 + 2 + 1 + 12,
149 .vrefresh = 60,
150 },
151 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
152 },
153 {
154 .name = "480x640 RGB",
155 .magic = TPG110_RES_480X640,
156 .mode = {
157 .clock = 20500,
158 .hdisplay = 480,
159 .hsync_start = 480 + 2,
160 .hsync_end = 480 + 2 + 1,
161 .htotal = 480 + 2 + 1 + 43,
162 .vdisplay = 640,
163 .vsync_start = 640 + 4,
164 .vsync_end = 640 + 4 + 1,
165 .vtotal = 640 + 4 + 1 + 8,
166 .vrefresh = 60,
167 },
168 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
169 },
170 {
171 .name = "400x240 RGB",
172 .magic = TPG110_RES_400X240_D,
173 .mode = {
174 .clock = 8300,
175 .hdisplay = 400,
176 .hsync_start = 400 + 20,
177 .hsync_end = 400 + 20 + 1,
178 .htotal = 400 + 20 + 1 + 108,
179 .vdisplay = 240,
180 .vsync_start = 240 + 2,
181 .vsync_end = 240 + 2 + 1,
182 .vtotal = 240 + 2 + 1 + 20,
183 .vrefresh = 60,
184 },
185 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
186 },
187};
188
189static inline struct tpg110 *
190to_tpg110(struct drm_panel *panel)
191{
192 return container_of(panel, struct tpg110, panel);
193}
194
195static u8 tpg110_readwrite_reg(struct tpg110 *tpg, bool write,
196 u8 address, u8 outval)
197{
198 struct spi_message m;
199 struct spi_transfer t[2];
200 u8 buf[2];
201 int ret;
202
203 spi_message_init(&m);
204 memset(t, 0, sizeof(t));
205
206 if (write) {
207
208
209
210
211
212 buf[0] = address << 2;
213 buf[0] &= ~0x03;
214 buf[1] = outval;
215
216 t[0].bits_per_word = 8;
217 t[0].tx_buf = &buf[0];
218 t[0].len = 1;
219
220 t[1].tx_buf = &buf[1];
221 t[1].len = 1;
222 t[1].bits_per_word = 8;
223 } else {
224
225 buf[0] = address << 1;
226 buf[0] |= 0x01;
227
228
229
230
231
232
233 t[0].bits_per_word = 7;
234 t[0].tx_buf = &buf[0];
235 t[0].len = 1;
236
237 t[1].rx_buf = &buf[1];
238 t[1].len = 1;
239 t[1].bits_per_word = 8;
240 }
241
242 spi_message_add_tail(&t[0], &m);
243 spi_message_add_tail(&t[1], &m);
244 ret = spi_sync(tpg->spi, &m);
245 if (ret) {
246 DRM_DEV_ERROR(tpg->dev, "SPI message error %d\n", ret);
247 return ret;
248 }
249 if (write)
250 return 0;
251
252 return buf[1];
253}
254
255static u8 tpg110_read_reg(struct tpg110 *tpg, u8 address)
256{
257 return tpg110_readwrite_reg(tpg, false, address, 0);
258}
259
260static void tpg110_write_reg(struct tpg110 *tpg, u8 address, u8 outval)
261{
262 tpg110_readwrite_reg(tpg, true, address, outval);
263}
264
265static int tpg110_startup(struct tpg110 *tpg)
266{
267 u8 val;
268 int i;
269
270
271 gpiod_set_value_cansleep(tpg->grestb, 0);
272 usleep_range(1000, 2000);
273 DRM_DEV_DEBUG(tpg->dev, "de-asserted GRESTB\n");
274
275
276 tpg110_write_reg(tpg, TPG110_TEST, 0x55);
277 val = tpg110_read_reg(tpg, TPG110_TEST);
278 if (val != 0x55) {
279 DRM_DEV_ERROR(tpg->dev, "failed communication test\n");
280 return -ENODEV;
281 }
282
283 val = tpg110_read_reg(tpg, TPG110_CHIPID);
284 DRM_DEV_INFO(tpg->dev, "TPG110 chip ID: %d version: %d\n",
285 val >> 4, val & 0x0f);
286
287
288 val = tpg110_read_reg(tpg, TPG110_CTRL1);
289 val &= TPG110_RES_MASK;
290 switch (val) {
291 case TPG110_RES_400X240_D:
292 DRM_DEV_INFO(tpg->dev,
293 "IN 400x240 RGB -> OUT 800x480 RGB (dual scan)\n");
294 break;
295 case TPG110_RES_480X272_D:
296 DRM_DEV_INFO(tpg->dev,
297 "IN 480x272 RGB -> OUT 800x480 RGB (dual scan)\n");
298 break;
299 case TPG110_RES_480X640:
300 DRM_DEV_INFO(tpg->dev, "480x640 RGB\n");
301 break;
302 case TPG110_RES_480X272:
303 DRM_DEV_INFO(tpg->dev, "480x272 RGB\n");
304 break;
305 case TPG110_RES_640X480:
306 DRM_DEV_INFO(tpg->dev, "640x480 RGB\n");
307 break;
308 case TPG110_RES_800X480:
309 DRM_DEV_INFO(tpg->dev, "800x480 RGB\n");
310 break;
311 default:
312 DRM_DEV_ERROR(tpg->dev, "ILLEGAL RESOLUTION 0x%02x\n", val);
313 break;
314 }
315
316
317 if (val == TPG110_RES_480X272_D)
318 val = TPG110_RES_480X272;
319
320 for (i = 0; i < ARRAY_SIZE(tpg110_modes); i++) {
321 const struct tpg110_panel_mode *pm;
322
323 pm = &tpg110_modes[i];
324 if (pm->magic == val) {
325 tpg->panel_mode = pm;
326 break;
327 }
328 }
329 if (i == ARRAY_SIZE(tpg110_modes)) {
330 DRM_DEV_ERROR(tpg->dev, "unsupported mode (%02x) detected\n",
331 val);
332 return -ENODEV;
333 }
334
335 val = tpg110_read_reg(tpg, TPG110_CTRL2);
336 DRM_DEV_INFO(tpg->dev, "resolution and standby is controlled by %s\n",
337 (val & TPG110_CTRL2_RES_PM_CTRL) ? "software" : "hardware");
338
339 val |= TPG110_CTRL2_RES_PM_CTRL;
340 tpg110_write_reg(tpg, TPG110_CTRL2, val);
341
342 return 0;
343}
344
345static int tpg110_disable(struct drm_panel *panel)
346{
347 struct tpg110 *tpg = to_tpg110(panel);
348 u8 val;
349
350
351 val = tpg110_read_reg(tpg, TPG110_CTRL2_PM);
352 val &= ~TPG110_CTRL2_PM;
353 tpg110_write_reg(tpg, TPG110_CTRL2_PM, val);
354
355 return 0;
356}
357
358static int tpg110_enable(struct drm_panel *panel)
359{
360 struct tpg110 *tpg = to_tpg110(panel);
361 u8 val;
362
363
364 val = tpg110_read_reg(tpg, TPG110_CTRL2_PM);
365 val |= TPG110_CTRL2_PM;
366 tpg110_write_reg(tpg, TPG110_CTRL2_PM, val);
367
368 return 0;
369}
370
371
372
373
374
375
376
377
378
379static int tpg110_get_modes(struct drm_panel *panel,
380 struct drm_connector *connector)
381{
382 struct tpg110 *tpg = to_tpg110(panel);
383 struct drm_display_mode *mode;
384
385 connector->display_info.width_mm = tpg->width;
386 connector->display_info.height_mm = tpg->height;
387 connector->display_info.bus_flags = tpg->panel_mode->bus_flags;
388
389 mode = drm_mode_duplicate(connector->dev, &tpg->panel_mode->mode);
390 drm_mode_set_name(mode);
391 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
392
393 mode->width_mm = tpg->width;
394 mode->height_mm = tpg->height;
395
396 drm_mode_probed_add(connector, mode);
397
398 return 1;
399}
400
401static const struct drm_panel_funcs tpg110_drm_funcs = {
402 .disable = tpg110_disable,
403 .enable = tpg110_enable,
404 .get_modes = tpg110_get_modes,
405};
406
407static int tpg110_probe(struct spi_device *spi)
408{
409 struct device *dev = &spi->dev;
410 struct device_node *np = dev->of_node;
411 struct tpg110 *tpg;
412 int ret;
413
414 tpg = devm_kzalloc(dev, sizeof(*tpg), GFP_KERNEL);
415 if (!tpg)
416 return -ENOMEM;
417 tpg->dev = dev;
418
419
420 ret = of_property_read_u32(np, "width-mm", &tpg->width);
421 if (ret)
422 DRM_DEV_ERROR(dev, "no panel width specified\n");
423 ret = of_property_read_u32(np, "height-mm", &tpg->height);
424 if (ret)
425 DRM_DEV_ERROR(dev, "no panel height specified\n");
426
427
428 tpg->grestb = devm_gpiod_get(dev, "grestb", GPIOD_OUT_HIGH);
429 if (IS_ERR(tpg->grestb)) {
430 DRM_DEV_ERROR(dev, "no GRESTB GPIO\n");
431 return -ENODEV;
432 }
433
434 spi->bits_per_word = 8;
435 spi->mode |= SPI_3WIRE_HIZ;
436 ret = spi_setup(spi);
437 if (ret < 0) {
438 DRM_DEV_ERROR(dev, "spi setup failed.\n");
439 return ret;
440 }
441 tpg->spi = spi;
442
443 ret = tpg110_startup(tpg);
444 if (ret)
445 return ret;
446
447 drm_panel_init(&tpg->panel, dev, &tpg110_drm_funcs,
448 DRM_MODE_CONNECTOR_DPI);
449
450 ret = drm_panel_of_backlight(&tpg->panel);
451 if (ret)
452 return ret;
453
454 spi_set_drvdata(spi, tpg);
455
456 return drm_panel_add(&tpg->panel);
457}
458
459static int tpg110_remove(struct spi_device *spi)
460{
461 struct tpg110 *tpg = spi_get_drvdata(spi);
462
463 drm_panel_remove(&tpg->panel);
464 return 0;
465}
466
467static const struct of_device_id tpg110_match[] = {
468 { .compatible = "tpo,tpg110", },
469 {},
470};
471MODULE_DEVICE_TABLE(of, tpg110_match);
472
473static struct spi_driver tpg110_driver = {
474 .probe = tpg110_probe,
475 .remove = tpg110_remove,
476 .driver = {
477 .name = "tpo-tpg110-panel",
478 .of_match_table = tpg110_match,
479 },
480};
481module_spi_driver(tpg110_driver);
482
483MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
484MODULE_DESCRIPTION("TPO TPG110 panel driver");
485MODULE_LICENSE("GPL v2");
486