LXR linux/drivers/media/platform/exynos-gsc/gsc-core.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
   4 *              http://www.samsung.com
   5 *
   6 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
   7
   8 */
   9
  10#ifndef GSC_CORE_H_
  11#define GSC_CORE_H_
  12
  13#include <linux/delay.h>
  14#include <linux/sched.h>
  15#include <linux/spinlock.h>
  16#include <linux/types.h>
  17#include <linux/videodev2.h>
  18#include <linux/io.h>
  19#include <linux/pm_runtime.h>
  20#include <media/videobuf2-v4l2.h>
  21#include <media/v4l2-ctrls.h>
  22#include <media/v4l2-device.h>
  23#include <media/v4l2-mem2mem.h>
  24#include <media/v4l2-mediabus.h>
  25#include <media/videobuf2-dma-contig.h>
  26
  27#include "gsc-regs.h"
  28
  29#define CONFIG_VB2_GSC_DMA_CONTIG       1
  30#define GSC_MODULE_NAME                 "exynos-gsc"
  31
  32#define GSC_SHUTDOWN_TIMEOUT            ((100*HZ)/1000)
  33#define GSC_MAX_DEVS                    4
  34#define GSC_MAX_CLOCKS                  4
  35#define GSC_M2M_BUF_NUM                 0
  36#define GSC_MAX_CTRL_NUM                10
  37#define GSC_SC_ALIGN_4                  4
  38#define GSC_SC_ALIGN_2                  2
  39#define DEFAULT_CSC_EQ                  1
  40#define DEFAULT_CSC_RANGE               1
  41
  42#define GSC_PARAMS                      (1 << 0)
  43#define GSC_SRC_FMT                     (1 << 1)
  44#define GSC_DST_FMT                     (1 << 2)
  45#define GSC_CTX_M2M                     (1 << 3)
  46#define GSC_CTX_STOP_REQ                (1 << 6)
  47#define GSC_CTX_ABORT                   (1 << 7)
  48
  49enum gsc_dev_flags {
  50        /* for m2m node */
  51        ST_M2M_OPEN,
  52        ST_M2M_RUN,
  53        ST_M2M_PEND,
  54        ST_M2M_SUSPENDED,
  55        ST_M2M_SUSPENDING,
  56};
  57
  58enum gsc_irq {
  59        GSC_IRQ_DONE,
  60        GSC_IRQ_OVERRUN
  61};
  62
  63/**
  64 * enum gsc_datapath - the path of data used for G-Scaler
  65 * @GSC_CAMERA: from camera
  66 * @GSC_DMA: from/to DMA
  67 * @GSC_LOCAL: to local path
  68 * @GSC_WRITEBACK: from FIMD
  69 */
  70enum gsc_datapath {
  71        GSC_CAMERA = 0x1,
  72        GSC_DMA,
  73        GSC_MIXER,
  74        GSC_FIMD,
  75        GSC_WRITEBACK,
  76};
  77
  78enum gsc_color_fmt {
  79        GSC_RGB = 0x1,
  80        GSC_YUV420 = 0x2,
  81        GSC_YUV422 = 0x4,
  82        GSC_YUV444 = 0x8,
  83};
  84
  85enum gsc_yuv_fmt {
  86        GSC_LSB_Y = 0x10,
  87        GSC_LSB_C,
  88        GSC_CBCR = 0x20,
  89        GSC_CRCB,
  90};
  91
  92#define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
  93#define is_rgb(x) (!!((x) & 0x1))
  94#define is_yuv420(x) (!!((x) & 0x2))
  95#define is_yuv422(x) (!!((x) & 0x4))
  96
  97#define gsc_m2m_active(dev)     test_bit(ST_M2M_RUN, &(dev)->state)
  98#define gsc_m2m_pending(dev)    test_bit(ST_M2M_PEND, &(dev)->state)
  99#define gsc_m2m_opened(dev)     test_bit(ST_M2M_OPEN, &(dev)->state)
 100
 101#define ctrl_to_ctx(__ctrl) \
 102        container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
 103/**
 104 * struct gsc_fmt - the driver's internal color format data
 105 * @mbus_code: Media Bus pixel code, -1 if not applicable
 106 * @pixelformat: the fourcc code for this format, 0 if not applicable
 107 * @yorder: Y/C order
 108 * @corder: Chrominance order control
 109 * @num_planes: number of physically non-contiguous data planes
 110 * @nr_comp: number of physically contiguous data planes
 111 * @depth: per plane driver's private 'number of bits per pixel'
 112 * @flags: flags indicating which operation mode format applies to
 113 */
 114struct gsc_fmt {
 115        u32 mbus_code;
 116        u32     pixelformat;
 117        u32     color;
 118        u32     yorder;
 119        u32     corder;
 120        u16     num_planes;
 121        u16     num_comp;
 122        u8      depth[VIDEO_MAX_PLANES];
 123        u32     flags;
 124};
 125
 126/**
 127 * struct gsc_input_buf - the driver's video buffer
 128 * @vb: videobuf2 buffer
 129 * @list : linked list structure for buffer queue
 130 * @idx : index of G-Scaler input buffer
 131 */
 132struct gsc_input_buf {
 133        struct vb2_v4l2_buffer vb;
 134        struct list_head        list;
 135        int                     idx;
 136};
 137
 138/**
 139 * struct gsc_addr - the G-Scaler physical address set
 140 * @y:   luminance plane address
 141 * @cb:  Cb plane address
 142 * @cr:  Cr plane address
 143 */
 144struct gsc_addr {
 145        dma_addr_t y;
 146        dma_addr_t cb;
 147        dma_addr_t cr;
 148};
 149
 150/* struct gsc_ctrls - the G-Scaler control set
 151 * @rotate: rotation degree
 152 * @hflip: horizontal flip
 153 * @vflip: vertical flip
 154 * @global_alpha: the alpha value of current frame
 155 */
 156struct gsc_ctrls {
 157        struct v4l2_ctrl *rotate;
 158        struct v4l2_ctrl *hflip;
 159        struct v4l2_ctrl *vflip;
 160        struct v4l2_ctrl *global_alpha;
 161};
 162
 163/**
 164 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
 165 * @pre_shfactor:       pre sclaer shift factor
 166 * @pre_hratio:         horizontal ratio of the prescaler
 167 * @pre_vratio:         vertical ratio of the prescaler
 168 * @main_hratio:        the main scaler's horizontal ratio
 169 * @main_vratio:        the main scaler's vertical ratio
 170 */
 171struct gsc_scaler {
 172        u32 pre_shfactor;
 173        u32 pre_hratio;
 174        u32 pre_vratio;
 175        u32 main_hratio;
 176        u32 main_vratio;
 177};
 178
 179struct gsc_dev;
 180
 181struct gsc_ctx;
 182
 183/**
 184 * struct gsc_frame - source/target frame properties
 185 * @f_width:    SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
 186 * @f_height:   SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
 187 * @crop:       cropped(source)/scaled(destination) size
 188 * @payload:    image size in bytes (w x h x bpp)
 189 * @addr:       image frame buffer physical addresses
 190 * @fmt:        G-Scaler color format pointer
 191 * @colorspace: value indicating v4l2_colorspace
 192 * @alpha:      frame's alpha value
 193 */
 194struct gsc_frame {
 195        u32 f_width;
 196        u32 f_height;
 197        struct v4l2_rect crop;
 198        unsigned long payload[VIDEO_MAX_PLANES];
 199        struct gsc_addr addr;
 200        const struct gsc_fmt *fmt;
 201        u32 colorspace;
 202        u8 alpha;
 203};
 204
 205/**
 206 * struct gsc_m2m_device - v4l2 memory-to-memory device data
 207 * @vfd: the video device node for v4l2 m2m mode
 208 * @m2m_dev: v4l2 memory-to-memory device data
 209 * @ctx: hardware context data
 210 * @refcnt: the reference counter
 211 */
 212struct gsc_m2m_device {
 213        struct video_device     *vfd;
 214        struct v4l2_m2m_dev     *m2m_dev;
 215        struct gsc_ctx          *ctx;
 216        int                     refcnt;
 217};
 218
 219/**
 220 *  struct gsc_pix_max - image pixel size limits in various IP configurations
 221 *
 222 *  @org_scaler_bypass_w: max pixel width when the scaler is disabled
 223 *  @org_scaler_bypass_h: max pixel height when the scaler is disabled
 224 *  @org_scaler_input_w: max pixel width when the scaler is enabled
 225 *  @org_scaler_input_h: max pixel height when the scaler is enabled
 226 *  @real_rot_dis_w: max pixel src cropped height with the rotator is off
 227 *  @real_rot_dis_h: max pixel src croppped width with the rotator is off
 228 *  @real_rot_en_w: max pixel src cropped width with the rotator is on
 229 *  @real_rot_en_h: max pixel src cropped height with the rotator is on
 230 *  @target_rot_dis_w: max pixel dst scaled width with the rotator is off
 231 *  @target_rot_dis_h: max pixel dst scaled height with the rotator is off
 232 *  @target_rot_en_w: max pixel dst scaled width with the rotator is on
 233 *  @target_rot_en_h: max pixel dst scaled height with the rotator is on
 234 */
 235struct gsc_pix_max {
 236        u16 org_scaler_bypass_w;
 237        u16 org_scaler_bypass_h;
 238        u16 org_scaler_input_w;
 239        u16 org_scaler_input_h;
 240        u16 real_rot_dis_w;
 241        u16 real_rot_dis_h;
 242        u16 real_rot_en_w;
 243        u16 real_rot_en_h;
 244        u16 target_rot_dis_w;
 245        u16 target_rot_dis_h;
 246        u16 target_rot_en_w;
 247        u16 target_rot_en_h;
 248};
 249
 250/**
 251 *  struct gsc_pix_min - image pixel size limits in various IP configurations
 252 *
 253 *  @org_w: minimum source pixel width
 254 *  @org_h: minimum source pixel height
 255 *  @real_w: minimum input crop pixel width
 256 *  @real_h: minimum input crop pixel height
 257 *  @target_rot_dis_w: minimum output scaled pixel height when rotator is off
 258 *  @target_rot_dis_h: minimum output scaled pixel height when rotator is off
 259 *  @target_rot_en_w: minimum output scaled pixel height when rotator is on
 260 *  @target_rot_en_h: minimum output scaled pixel height when rotator is on
 261 */
 262struct gsc_pix_min {
 263        u16 org_w;
 264        u16 org_h;
 265        u16 real_w;
 266        u16 real_h;
 267        u16 target_rot_dis_w;
 268        u16 target_rot_dis_h;
 269        u16 target_rot_en_w;
 270        u16 target_rot_en_h;
 271};
 272
 273struct gsc_pix_align {
 274        u16 org_h;
 275        u16 org_w;
 276        u16 offset_h;
 277        u16 real_w;
 278        u16 real_h;
 279        u16 target_w;
 280        u16 target_h;
 281};
 282
 283/**
 284 * struct gsc_variant - G-Scaler variant information
 285 */
 286struct gsc_variant {
 287        struct gsc_pix_max *pix_max;
 288        struct gsc_pix_min *pix_min;
 289        struct gsc_pix_align *pix_align;
 290        u16             in_buf_cnt;
 291        u16             out_buf_cnt;
 292        u16             sc_up_max;
 293        u16             sc_down_max;
 294        u16             poly_sc_down_max;
 295        u16             pre_sc_down_max;
 296        u16             local_sc_down;
 297};
 298
 299/**
 300 * struct gsc_driverdata - per device type driver data for init time.
 301 *
 302 * @variant: the variant information for this driver.
 303 * @num_entities: the number of g-scalers
 304 */
 305struct gsc_driverdata {
 306        struct gsc_variant *variant[GSC_MAX_DEVS];
 307        const char      *clk_names[GSC_MAX_CLOCKS];
 308        int             num_clocks;
 309        int             num_entities;
 310};
 311
 312/**
 313 * struct gsc_dev - abstraction for G-Scaler entity
 314 * @slock:      the spinlock protecting this data structure
 315 * @lock:       the mutex protecting this data structure
 316 * @pdev:       pointer to the G-Scaler platform device
 317 * @variant:    the IP variant information
 318 * @id:         G-Scaler device index (0..GSC_MAX_DEVS)
 319 * @clock:      clocks required for G-Scaler operation
 320 * @regs:       the mapped hardware registers
 321 * @irq_queue:  interrupt handler waitqueue
 322 * @m2m:        memory-to-memory V4L2 device information
 323 * @state:      flags used to synchronize m2m and capture mode operation
 324 * @vdev:       video device for G-Scaler instance
 325 */
 326struct gsc_dev {
 327        spinlock_t                      slock;
 328        struct mutex                    lock;
 329        struct platform_device          *pdev;
 330        struct gsc_variant              *variant;
 331        u16                             id;
 332        int                             num_clocks;
 333        struct clk                      *clock[GSC_MAX_CLOCKS];
 334        void __iomem                    *regs;
 335        wait_queue_head_t               irq_queue;
 336        struct gsc_m2m_device           m2m;
 337        unsigned long                   state;
 338        struct video_device             vdev;
 339        struct v4l2_device              v4l2_dev;
 340};
 341
 342/**
 343 * gsc_ctx - the device context data
 344 * @s_frame:            source frame properties
 345 * @d_frame:            destination frame properties
 346 * @in_path:            input mode (DMA or camera)
 347 * @out_path:           output mode (DMA or FIFO)
 348 * @scaler:             image scaler properties
 349 * @flags:              additional flags for image conversion
 350 * @state:              flags to keep track of user configuration
 351 * @gsc_dev:            the G-Scaler device this context applies to
 352 * @m2m_ctx:            memory-to-memory device context
 353 * @fh:                 v4l2 file handle
 354 * @ctrl_handler:       v4l2 controls handler
 355 * @gsc_ctrls           G-Scaler control set
 356 * @ctrls_rdy:          true if the control handler is initialized
 357 */
 358struct gsc_ctx {
 359        struct gsc_frame        s_frame;
 360        struct gsc_frame        d_frame;
 361        enum gsc_datapath       in_path;
 362        enum gsc_datapath       out_path;
 363        struct gsc_scaler       scaler;
 364        u32                     flags;
 365        u32                     state;
 366        int                     rotation;
 367        unsigned int            hflip:1;
 368        unsigned int            vflip:1;
 369        struct gsc_dev          *gsc_dev;
 370        struct v4l2_m2m_ctx     *m2m_ctx;
 371        struct v4l2_fh          fh;
 372        struct v4l2_ctrl_handler ctrl_handler;
 373        struct gsc_ctrls        gsc_ctrls;
 374        bool                    ctrls_rdy;
 375        enum v4l2_colorspace out_colorspace;
 376};
 377
 378void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
 379int gsc_register_m2m_device(struct gsc_dev *gsc);
 380void gsc_unregister_m2m_device(struct gsc_dev *gsc);
 381void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
 382
 383u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
 384const struct gsc_fmt *get_format(int index);
 385const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
 386int gsc_enum_fmt(struct v4l2_fmtdesc *f);
 387int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
 388void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
 389int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
 390void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
 391int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s);
 392int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
 393                                                        u32 *ratio);
 394void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
 395void gsc_check_src_scale_info(struct gsc_variant *var,
 396                                struct gsc_frame *s_frame,
 397                                u32 *wratio, u32 tx, u32 ty, u32 *hratio);
 398int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
 399                           int dh, int rot, int out_path);
 400int gsc_set_scaler_info(struct gsc_ctx *ctx);
 401int gsc_ctrls_create(struct gsc_ctx *ctx);
 402void gsc_ctrls_delete(struct gsc_ctx *ctx);
 403int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
 404                     struct gsc_frame *frame, struct gsc_addr *addr);
 405
 406static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
 407{
 408        unsigned long flags;
 409
 410        spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 411        ctx->state |= state;
 412        spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 413}
 414
 415static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
 416{
 417        unsigned long flags;
 418
 419        spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 420        ctx->state &= ~state;
 421        spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 422}
 423
 424static inline int is_tiled(const struct gsc_fmt *fmt)
 425{
 426        return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
 427}
 428
 429static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
 430{
 431        u32 cfg = readl(dev->regs + GSC_ENABLE);
 432
 433        if (on)
 434                cfg |= GSC_ENABLE_ON;
 435        else
 436                cfg &= ~GSC_ENABLE_ON;
 437
 438        writel(cfg, dev->regs + GSC_ENABLE);
 439}
 440
 441static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
 442{
 443        u32 cfg = readl(dev->regs + GSC_IRQ);
 444        if (cfg & GSC_IRQ_STATUS_OR_IRQ)
 445                return GSC_IRQ_OVERRUN;
 446        else
 447                return GSC_IRQ_DONE;
 448
 449}
 450
 451static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
 452{
 453        u32 cfg = readl(dev->regs + GSC_IRQ);
 454        if (irq == GSC_IRQ_OVERRUN)
 455                cfg |= GSC_IRQ_STATUS_OR_IRQ;
 456        else if (irq == GSC_IRQ_DONE)
 457                cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
 458        writel(cfg, dev->regs + GSC_IRQ);
 459}
 460
 461static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
 462{
 463        unsigned long flags;
 464        bool ret;
 465
 466        spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
 467        ret = (ctx->state & mask) == mask;
 468        spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
 469        return ret;
 470}
 471
 472static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
 473                                              enum v4l2_buf_type type)
 474{
 475        struct gsc_frame *frame;
 476
 477        if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
 478                frame = &ctx->s_frame;
 479        } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
 480                frame = &ctx->d_frame;
 481        } else {
 482                pr_err("Wrong buffer/video queue type (%d)", type);
 483                return ERR_PTR(-EINVAL);
 484        }
 485
 486        return frame;
 487}
 488
 489void gsc_hw_set_sw_reset(struct gsc_dev *dev);
 490int gsc_wait_reset(struct gsc_dev *dev);
 491
 492void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
 493void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
 494void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
 495void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
 496void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
 497                                                        int index);
 498void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
 499                                                        int index);
 500void gsc_hw_set_input_path(struct gsc_ctx *ctx);
 501void gsc_hw_set_in_size(struct gsc_ctx *ctx);
 502void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
 503void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
 504void gsc_hw_set_output_path(struct gsc_ctx *ctx);
 505void gsc_hw_set_out_size(struct gsc_ctx *ctx);
 506void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
 507void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
 508void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
 509void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
 510void gsc_hw_set_rotation(struct gsc_ctx *ctx);
 511void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
 512void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
 513
 514#endif /* GSC_CORE_H_ */
 515