linux/drivers/mmc/host/cb710-mmc.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 *  cb710/mmc.c
   4 *
   5 *  Copyright by Michał Mirosław, 2008-2009
   6 */
   7#include <linux/kernel.h>
   8#include <linux/module.h>
   9#include <linux/pci.h>
  10#include <linux/delay.h>
  11#include "cb710-mmc.h"
  12
  13static const u8 cb710_clock_divider_log2[8] = {
  14/*      1, 2, 4, 8, 16, 32, 128, 512 */
  15        0, 1, 2, 3,  4,  5,   7,   9
  16};
  17#define CB710_MAX_DIVIDER_IDX   \
  18        (ARRAY_SIZE(cb710_clock_divider_log2) - 1)
  19
  20static const u8 cb710_src_freq_mhz[16] = {
  21        33, 10, 20, 25, 30, 35, 40, 45,
  22        50, 55, 60, 65, 70, 75, 80, 85
  23};
  24
  25static void cb710_mmc_select_clock_divider(struct mmc_host *mmc, int hz)
  26{
  27        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
  28        struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev;
  29        u32 src_freq_idx;
  30        u32 divider_idx;
  31        int src_hz;
  32
  33        /* on CB710 in HP nx9500:
  34         *   src_freq_idx == 0
  35         *   indexes 1-7 work as written in the table
  36         *   indexes 0,8-15 give no clock output
  37         */
  38        pci_read_config_dword(pdev, 0x48, &src_freq_idx);
  39        src_freq_idx = (src_freq_idx >> 16) & 0xF;
  40        src_hz = cb710_src_freq_mhz[src_freq_idx] * 1000000;
  41
  42        for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) {
  43                if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx])
  44                        break;
  45        }
  46
  47        if (src_freq_idx)
  48                divider_idx |= 0x8;
  49        else if (divider_idx == 0)
  50                divider_idx = 1;
  51
  52        cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28);
  53
  54        dev_dbg(cb710_slot_dev(slot),
  55                "clock set to %d Hz, wanted %d Hz; src_freq_idx = %d, divider_idx = %d|%d\n",
  56                src_hz >> cb710_clock_divider_log2[divider_idx & 7],
  57                hz, src_freq_idx, divider_idx & 7, divider_idx & 8);
  58}
  59
  60static void __cb710_mmc_enable_irq(struct cb710_slot *slot,
  61        unsigned short enable, unsigned short mask)
  62{
  63        /* clear global IE
  64         * - it gets set later if any interrupt sources are enabled */
  65        mask |= CB710_MMC_IE_IRQ_ENABLE;
  66
  67        /* look like interrupt is fired whenever
  68         * WORD[0x0C] & WORD[0x10] != 0;
  69         * -> bit 15 port 0x0C seems to be global interrupt enable
  70         */
  71
  72        enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT)
  73                & ~mask) | enable;
  74
  75        if (enable)
  76                enable |= CB710_MMC_IE_IRQ_ENABLE;
  77
  78        cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable);
  79}
  80
  81static void cb710_mmc_enable_irq(struct cb710_slot *slot,
  82        unsigned short enable, unsigned short mask)
  83{
  84        struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot));
  85        unsigned long flags;
  86
  87        spin_lock_irqsave(&reader->irq_lock, flags);
  88        /* this is the only thing irq_lock protects */
  89        __cb710_mmc_enable_irq(slot, enable, mask);
  90        spin_unlock_irqrestore(&reader->irq_lock, flags);
  91}
  92
  93static void cb710_mmc_reset_events(struct cb710_slot *slot)
  94{
  95        cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF);
  96        cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF);
  97        cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF);
  98}
  99
 100static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable)
 101{
 102        if (enable)
 103                cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
 104                        CB710_MMC_C1_4BIT_DATA_BUS, 0);
 105        else
 106                cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT,
 107                        0, CB710_MMC_C1_4BIT_DATA_BUS);
 108}
 109
 110static int cb710_check_event(struct cb710_slot *slot, u8 what)
 111{
 112        u16 status;
 113
 114        status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT);
 115
 116        if (status & CB710_MMC_S0_FIFO_UNDERFLOW) {
 117                /* it is just a guess, so log it */
 118                dev_dbg(cb710_slot_dev(slot),
 119                        "CHECK : ignoring bit 6 in status %04X\n", status);
 120                cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
 121                        CB710_MMC_S0_FIFO_UNDERFLOW);
 122                status &= ~CB710_MMC_S0_FIFO_UNDERFLOW;
 123        }
 124
 125        if (status & CB710_MMC_STATUS_ERROR_EVENTS) {
 126                dev_dbg(cb710_slot_dev(slot),
 127                        "CHECK : returning EIO on status %04X\n", status);
 128                cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF);
 129                cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
 130                        CB710_MMC_S1_RESET);
 131                return -EIO;
 132        }
 133
 134        /* 'what' is a bit in MMC_STATUS1 */
 135        if ((status >> 8) & what) {
 136                cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what);
 137                return 1;
 138        }
 139
 140        return 0;
 141}
 142
 143static int cb710_wait_for_event(struct cb710_slot *slot, u8 what)
 144{
 145        int err = 0;
 146        unsigned limit = 2000000;       /* FIXME: real timeout */
 147
 148#ifdef CONFIG_CB710_DEBUG
 149        u32 e, x;
 150        e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
 151#endif
 152
 153        while (!(err = cb710_check_event(slot, what))) {
 154                if (!--limit) {
 155                        cb710_dump_regs(cb710_slot_to_chip(slot),
 156                                CB710_DUMP_REGS_MMC);
 157                        err = -ETIMEDOUT;
 158                        break;
 159                }
 160                udelay(1);
 161        }
 162
 163#ifdef CONFIG_CB710_DEBUG
 164        x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
 165
 166        limit = 2000000 - limit;
 167        if (limit > 100)
 168                dev_dbg(cb710_slot_dev(slot),
 169                        "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n",
 170                        limit, what, e, x);
 171#endif
 172        return err < 0 ? err : 0;
 173}
 174
 175
 176static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask)
 177{
 178        unsigned limit = 500000;        /* FIXME: real timeout */
 179        int err = 0;
 180
 181#ifdef CONFIG_CB710_DEBUG
 182        u32 e, x;
 183        e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
 184#endif
 185
 186        while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) {
 187                if (!--limit) {
 188                        cb710_dump_regs(cb710_slot_to_chip(slot),
 189                                CB710_DUMP_REGS_MMC);
 190                        err = -ETIMEDOUT;
 191                        break;
 192                }
 193                udelay(1);
 194        }
 195
 196#ifdef CONFIG_CB710_DEBUG
 197        x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
 198
 199        limit = 500000 - limit;
 200        if (limit > 100)
 201                dev_dbg(cb710_slot_dev(slot),
 202                        "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n",
 203                        limit, mask, e, x);
 204#endif
 205        return err;
 206}
 207
 208static void cb710_mmc_set_transfer_size(struct cb710_slot *slot,
 209        size_t count, size_t blocksize)
 210{
 211        cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 212        cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT,
 213                ((count - 1) << 16)|(blocksize - 1));
 214
 215        dev_vdbg(cb710_slot_dev(slot), "set up for %zu block%s of %zu bytes\n",
 216                count, count == 1 ? "" : "s", blocksize);
 217}
 218
 219static void cb710_mmc_fifo_hack(struct cb710_slot *slot)
 220{
 221        /* without this, received data is prepended with 8-bytes of zeroes */
 222        u32 r1, r2;
 223        int ok = 0;
 224
 225        r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
 226        r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT);
 227        if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT)
 228            & CB710_MMC_S0_FIFO_UNDERFLOW) {
 229                cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT,
 230                        CB710_MMC_S0_FIFO_UNDERFLOW);
 231                ok = 1;
 232        }
 233
 234        dev_dbg(cb710_slot_dev(slot),
 235                "FIFO-read-hack: expected STATUS0 bit was %s\n",
 236                ok ? "set." : "NOT SET!");
 237        dev_dbg(cb710_slot_dev(slot),
 238                "FIFO-read-hack: dwords ignored: %08X %08X - %s\n",
 239                r1, r2, (r1|r2) ? "BAD (NOT ZERO)!" : "ok");
 240}
 241
 242static int cb710_mmc_receive_pio(struct cb710_slot *slot,
 243        struct sg_mapping_iter *miter, size_t dw_count)
 244{
 245        if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) {
 246                int err = cb710_wait_for_event(slot,
 247                        CB710_MMC_S1_PIO_TRANSFER_DONE);
 248                if (err)
 249                        return err;
 250        }
 251
 252        cb710_sg_dwiter_write_from_io(miter,
 253                slot->iobase + CB710_MMC_DATA_PORT, dw_count);
 254
 255        return 0;
 256}
 257
 258static bool cb710_is_transfer_size_supported(struct mmc_data *data)
 259{
 260        return !(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8));
 261}
 262
 263static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
 264{
 265        struct sg_mapping_iter miter;
 266        size_t len, blocks = data->blocks;
 267        int err = 0;
 268
 269        /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks
 270         * except single 8B block */
 271        if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)))
 272                return -EINVAL;
 273
 274        sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_TO_SG);
 275
 276        cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
 277                15, CB710_MMC_C2_READ_PIO_SIZE_MASK);
 278
 279        cb710_mmc_fifo_hack(slot);
 280
 281        while (blocks-- > 0) {
 282                len = data->blksz;
 283
 284                while (len >= 16) {
 285                        err = cb710_mmc_receive_pio(slot, &miter, 4);
 286                        if (err)
 287                                goto out;
 288                        len -= 16;
 289                }
 290
 291                if (!len)
 292                        continue;
 293
 294                cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
 295                        len - 1, CB710_MMC_C2_READ_PIO_SIZE_MASK);
 296
 297                len = (len >= 8) ? 4 : 2;
 298                err = cb710_mmc_receive_pio(slot, &miter, len);
 299                if (err)
 300                        goto out;
 301        }
 302out:
 303        sg_miter_stop(&miter);
 304        return err;
 305}
 306
 307static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data)
 308{
 309        struct sg_mapping_iter miter;
 310        size_t len, blocks = data->blocks;
 311        int err = 0;
 312
 313        /* TODO: I don't know how/if the hardware handles multiple
 314         * non-16B-boundary blocks */
 315        if (unlikely(data->blocks > 1 && data->blksz & 15))
 316                return -EINVAL;
 317
 318        sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_FROM_SG);
 319
 320        cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
 321                0, CB710_MMC_C2_READ_PIO_SIZE_MASK);
 322
 323        while (blocks-- > 0) {
 324                len = (data->blksz + 15) >> 4;
 325                do {
 326                        if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT)
 327                            & CB710_MMC_S2_FIFO_EMPTY)) {
 328                                err = cb710_wait_for_event(slot,
 329                                        CB710_MMC_S1_PIO_TRANSFER_DONE);
 330                                if (err)
 331                                        goto out;
 332                        }
 333                        cb710_sg_dwiter_read_to_io(&miter,
 334                                slot->iobase + CB710_MMC_DATA_PORT, 4);
 335                } while (--len);
 336        }
 337out:
 338        sg_miter_stop(&miter);
 339        return err;
 340}
 341
 342static u16 cb710_encode_cmd_flags(struct cb710_mmc_reader *reader,
 343        struct mmc_command *cmd)
 344{
 345        unsigned int flags = cmd->flags;
 346        u16 cb_flags = 0;
 347
 348        /* Windows driver returned 0 for commands for which no response
 349         * is expected. It happened that there were only two such commands
 350         * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might
 351         * as well be a bug in that driver.
 352         *
 353         * Original driver set bit 14 for MMC/SD application
 354         * commands. There's no difference 'on the wire' and
 355         * it apparently works without it anyway.
 356         */
 357
 358        switch (flags & MMC_CMD_MASK) {
 359        case MMC_CMD_AC:        cb_flags = CB710_MMC_CMD_AC;    break;
 360        case MMC_CMD_ADTC:      cb_flags = CB710_MMC_CMD_ADTC;  break;
 361        case MMC_CMD_BC:        cb_flags = CB710_MMC_CMD_BC;    break;
 362        case MMC_CMD_BCR:       cb_flags = CB710_MMC_CMD_BCR;   break;
 363        }
 364
 365        if (flags & MMC_RSP_BUSY)
 366                cb_flags |= CB710_MMC_RSP_BUSY;
 367
 368        cb_flags |= cmd->opcode << CB710_MMC_CMD_CODE_SHIFT;
 369
 370        if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
 371                cb_flags |= CB710_MMC_DATA_READ;
 372
 373        if (flags & MMC_RSP_PRESENT) {
 374                /* Windows driver set 01 at bits 4,3 except for
 375                 * MMC_SET_BLOCKLEN where it set 10. Maybe the
 376                 * hardware can do something special about this
 377                 * command? The original driver looks buggy/incomplete
 378                 * anyway so we ignore this for now.
 379                 *
 380                 * I assume that 00 here means no response is expected.
 381                 */
 382                cb_flags |= CB710_MMC_RSP_PRESENT;
 383
 384                if (flags & MMC_RSP_136)
 385                        cb_flags |= CB710_MMC_RSP_136;
 386                if (!(flags & MMC_RSP_CRC))
 387                        cb_flags |= CB710_MMC_RSP_NO_CRC;
 388        }
 389
 390        return cb_flags;
 391}
 392
 393static void cb710_receive_response(struct cb710_slot *slot,
 394        struct mmc_command *cmd)
 395{
 396        unsigned rsp_opcode, wanted_opcode;
 397
 398        /* Looks like final byte with CRC is always stripped (same as SDHCI) */
 399        if (cmd->flags & MMC_RSP_136) {
 400                u32 resp[4];
 401
 402                resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT);
 403                resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT);
 404                resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT);
 405                resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
 406                rsp_opcode = resp[0] >> 24;
 407
 408                cmd->resp[0] = (resp[0] << 8)|(resp[1] >> 24);
 409                cmd->resp[1] = (resp[1] << 8)|(resp[2] >> 24);
 410                cmd->resp[2] = (resp[2] << 8)|(resp[3] >> 24);
 411                cmd->resp[3] = (resp[3] << 8);
 412        } else {
 413                rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F;
 414                cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT);
 415        }
 416
 417        wanted_opcode = (cmd->flags & MMC_RSP_OPCODE) ? cmd->opcode : 0x3F;
 418        if (rsp_opcode != wanted_opcode)
 419                cmd->error = -EILSEQ;
 420}
 421
 422static int cb710_mmc_transfer_data(struct cb710_slot *slot,
 423        struct mmc_data *data)
 424{
 425        int error, to;
 426
 427        if (data->flags & MMC_DATA_READ)
 428                error = cb710_mmc_receive(slot, data);
 429        else
 430                error = cb710_mmc_send(slot, data);
 431
 432        to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE);
 433        if (!error)
 434                error = to;
 435
 436        if (!error)
 437                data->bytes_xfered = data->blksz * data->blocks;
 438        return error;
 439}
 440
 441static int cb710_mmc_command(struct mmc_host *mmc, struct mmc_command *cmd)
 442{
 443        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 444        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 445        struct mmc_data *data = cmd->data;
 446
 447        u16 cb_cmd = cb710_encode_cmd_flags(reader, cmd);
 448        dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd);
 449
 450        if (data) {
 451                if (!cb710_is_transfer_size_supported(data)) {
 452                        data->error = -EINVAL;
 453                        return -1;
 454                }
 455                cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz);
 456        }
 457
 458        cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10);
 459        cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd);
 460        cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 461        cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg);
 462        cb710_mmc_reset_events(slot);
 463        cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 464        cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0);
 465
 466        cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT);
 467        if (cmd->error)
 468                return -1;
 469
 470        if (cmd->flags & MMC_RSP_PRESENT) {
 471                cb710_receive_response(slot, cmd);
 472                if (cmd->error)
 473                        return -1;
 474        }
 475
 476        if (data)
 477                data->error = cb710_mmc_transfer_data(slot, data);
 478        return 0;
 479}
 480
 481static void cb710_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 482{
 483        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 484        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 485
 486        WARN_ON(reader->mrq != NULL);
 487
 488        reader->mrq = mrq;
 489        cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
 490
 491        if (!cb710_mmc_command(mmc, mrq->cmd) && mrq->stop)
 492                cb710_mmc_command(mmc, mrq->stop);
 493
 494        tasklet_schedule(&reader->finish_req_tasklet);
 495}
 496
 497static int cb710_mmc_powerup(struct cb710_slot *slot)
 498{
 499#ifdef CONFIG_CB710_DEBUG
 500        struct cb710_chip *chip = cb710_slot_to_chip(slot);
 501#endif
 502        int err;
 503
 504        /* a lot of magic for now */
 505        dev_dbg(cb710_slot_dev(slot), "bus powerup\n");
 506        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 507        err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 508        if (unlikely(err))
 509                return err;
 510        cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0);
 511        cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0);
 512        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 513        mdelay(1);
 514        dev_dbg(cb710_slot_dev(slot), "after delay 1\n");
 515        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 516        err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 517        if (unlikely(err))
 518                return err;
 519        cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0);
 520        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 521        mdelay(1);
 522        dev_dbg(cb710_slot_dev(slot), "after delay 2\n");
 523        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 524        err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 525        if (unlikely(err))
 526                return err;
 527        cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08);
 528        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 529        mdelay(2);
 530        dev_dbg(cb710_slot_dev(slot), "after delay 3\n");
 531        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 532        cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
 533        cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0);
 534        cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0);
 535        cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0);
 536        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 537        err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20);
 538        if (unlikely(err))
 539                return err;
 540        /* This port behaves weird: quick byte reads of 0x08,0x09 return
 541         * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when
 542         * read/written from userspace...  What am I missing here?
 543         * (it doesn't depend on write-to-read delay) */
 544        cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF);
 545        cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0);
 546        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 547        dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n");
 548
 549        return cb710_check_event(slot, 0);
 550}
 551
 552static void cb710_mmc_powerdown(struct cb710_slot *slot)
 553{
 554        cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81);
 555        cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80);
 556}
 557
 558static void cb710_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 559{
 560        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 561        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 562        int err;
 563
 564        cb710_mmc_select_clock_divider(mmc, ios->clock);
 565
 566        if (ios->power_mode != reader->last_power_mode) {
 567                switch (ios->power_mode) {
 568                case MMC_POWER_ON:
 569                        err = cb710_mmc_powerup(slot);
 570                        if (err) {
 571                                dev_warn(cb710_slot_dev(slot),
 572                                        "powerup failed (%d)- retrying\n", err);
 573                                cb710_mmc_powerdown(slot);
 574                                udelay(1);
 575                                err = cb710_mmc_powerup(slot);
 576                                if (err)
 577                                        dev_warn(cb710_slot_dev(slot),
 578                                                "powerup retry failed (%d) - expect errors\n",
 579                                        err);
 580                        }
 581                        reader->last_power_mode = MMC_POWER_ON;
 582                        break;
 583                case MMC_POWER_OFF:
 584                        cb710_mmc_powerdown(slot);
 585                        reader->last_power_mode = MMC_POWER_OFF;
 586                        break;
 587                case MMC_POWER_UP:
 588                default:
 589                        /* ignore */
 590                        break;
 591                }
 592        }
 593
 594        cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1);
 595
 596        cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0);
 597}
 598
 599static int cb710_mmc_get_ro(struct mmc_host *mmc)
 600{
 601        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 602
 603        return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
 604                & CB710_MMC_S3_WRITE_PROTECTED;
 605}
 606
 607static int cb710_mmc_get_cd(struct mmc_host *mmc)
 608{
 609        struct cb710_slot *slot = cb710_mmc_to_slot(mmc);
 610
 611        return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT)
 612                & CB710_MMC_S3_CARD_DETECTED;
 613}
 614
 615static int cb710_mmc_irq_handler(struct cb710_slot *slot)
 616{
 617        struct mmc_host *mmc = cb710_slot_to_mmc(slot);
 618        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 619        u32 status, config1, config2, irqen;
 620
 621        status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT);
 622        irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT);
 623        config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT);
 624        config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT);
 625
 626        dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, "
 627                "ie: %08X, c2: %08X, c1: %08X\n",
 628                status, irqen, config2, config1);
 629
 630        if (status & (CB710_MMC_S1_CARD_CHANGED << 8)) {
 631                /* ack the event */
 632                cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT,
 633                        CB710_MMC_S1_CARD_CHANGED);
 634                if ((irqen & CB710_MMC_IE_CISTATUS_MASK)
 635                    == CB710_MMC_IE_CISTATUS_MASK)
 636                        mmc_detect_change(mmc, HZ/5);
 637        } else {
 638                dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n");
 639                spin_lock(&reader->irq_lock);
 640                __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK);
 641                spin_unlock(&reader->irq_lock);
 642        }
 643
 644        return 1;
 645}
 646
 647static void cb710_mmc_finish_request_tasklet(unsigned long data)
 648{
 649        struct mmc_host *mmc = (void *)data;
 650        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 651        struct mmc_request *mrq = reader->mrq;
 652
 653        reader->mrq = NULL;
 654        mmc_request_done(mmc, mrq);
 655}
 656
 657static const struct mmc_host_ops cb710_mmc_host = {
 658        .request = cb710_mmc_request,
 659        .set_ios = cb710_mmc_set_ios,
 660        .get_ro = cb710_mmc_get_ro,
 661        .get_cd = cb710_mmc_get_cd,
 662};
 663
 664#ifdef CONFIG_PM
 665
 666static int cb710_mmc_suspend(struct platform_device *pdev, pm_message_t state)
 667{
 668        struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
 669
 670        cb710_mmc_enable_irq(slot, 0, ~0);
 671        return 0;
 672}
 673
 674static int cb710_mmc_resume(struct platform_device *pdev)
 675{
 676        struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
 677
 678        cb710_mmc_enable_irq(slot, 0, ~0);
 679        return 0;
 680}
 681
 682#endif /* CONFIG_PM */
 683
 684static int cb710_mmc_init(struct platform_device *pdev)
 685{
 686        struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
 687        struct cb710_chip *chip = cb710_slot_to_chip(slot);
 688        struct mmc_host *mmc;
 689        struct cb710_mmc_reader *reader;
 690        int err;
 691        u32 val;
 692
 693        mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot));
 694        if (!mmc)
 695                return -ENOMEM;
 696
 697        platform_set_drvdata(pdev, mmc);
 698
 699        /* harmless (maybe) magic */
 700        pci_read_config_dword(chip->pdev, 0x48, &val);
 701        val = cb710_src_freq_mhz[(val >> 16) & 0xF];
 702        dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val);
 703        val *= 1000000;
 704
 705        mmc->ops = &cb710_mmc_host;
 706        mmc->f_max = val;
 707        mmc->f_min = val >> cb710_clock_divider_log2[CB710_MAX_DIVIDER_IDX];
 708        mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
 709        mmc->caps = MMC_CAP_4_BIT_DATA;
 710
 711        reader = mmc_priv(mmc);
 712
 713        tasklet_init(&reader->finish_req_tasklet,
 714                cb710_mmc_finish_request_tasklet, (unsigned long)mmc);
 715        spin_lock_init(&reader->irq_lock);
 716        cb710_dump_regs(chip, CB710_DUMP_REGS_MMC);
 717
 718        cb710_mmc_enable_irq(slot, 0, ~0);
 719        cb710_set_irq_handler(slot, cb710_mmc_irq_handler);
 720
 721        err = mmc_add_host(mmc);
 722        if (unlikely(err))
 723                goto err_free_mmc;
 724
 725        dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n",
 726                mmc_hostname(mmc));
 727
 728        cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0);
 729
 730        return 0;
 731
 732err_free_mmc:
 733        dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err);
 734
 735        cb710_set_irq_handler(slot, NULL);
 736        mmc_free_host(mmc);
 737        return err;
 738}
 739
 740static int cb710_mmc_exit(struct platform_device *pdev)
 741{
 742        struct cb710_slot *slot = cb710_pdev_to_slot(pdev);
 743        struct mmc_host *mmc = cb710_slot_to_mmc(slot);
 744        struct cb710_mmc_reader *reader = mmc_priv(mmc);
 745
 746        cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS);
 747
 748        mmc_remove_host(mmc);
 749
 750        /* IRQs should be disabled now, but let's stay on the safe side */
 751        cb710_mmc_enable_irq(slot, 0, ~0);
 752        cb710_set_irq_handler(slot, NULL);
 753
 754        /* clear config ports - just in case */
 755        cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0);
 756        cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0);
 757
 758        tasklet_kill(&reader->finish_req_tasklet);
 759
 760        mmc_free_host(mmc);
 761        return 0;
 762}
 763
 764static struct platform_driver cb710_mmc_driver = {
 765        .driver.name = "cb710-mmc",
 766        .probe = cb710_mmc_init,
 767        .remove = cb710_mmc_exit,
 768#ifdef CONFIG_PM
 769        .suspend = cb710_mmc_suspend,
 770        .resume = cb710_mmc_resume,
 771#endif
 772};
 773
 774module_platform_driver(cb710_mmc_driver);
 775
 776MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>");
 777MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part");
 778MODULE_LICENSE("GPL");
 779MODULE_ALIAS("platform:cb710-mmc");
 780